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GET /api/1.0/patches/88862/?format=api
{ "id": 88862, "url": "http://patchwork.dpdk.org/api/1.0/patches/88862/?format=api", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/1.0/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk" }, "msgid": "<20210310134858.8104-2-wisamm@nvidia.com>", "date": "2021-03-10T13:48:52", "name": "[v2,1/7] app/flow-perf: start using more generic wrapper for cycles", "commit_ref": null, "pull_url": null, "state": "new", "archived": true, "hash": "8e2d3c24316a2a2f7fe4b735d06b63e94cd4e66e", "submitter": { "id": 1963, "url": "http://patchwork.dpdk.org/api/1.0/people/1963/?format=api", "name": "Wisam Monther", "email": "wisamm@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20210310134858.8104-2-wisamm@nvidia.com/mbox/", "series": [ { "id": 15581, "url": "http://patchwork.dpdk.org/api/1.0/series/15581/?format=api", "date": "2021-03-10T13:48:52", "name": "[v2,1/7] app/flow-perf: start using more generic wrapper for cycles", "version": 2, "mbox": "http://patchwork.dpdk.org/series/15581/mbox/" } ], "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/88862/checks/", "tags": {}, "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8CF6CA0567;\n\tWed, 10 Mar 2021 14:49:24 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id AC48722A65D;\n\tWed, 10 Mar 2021 14:49:22 +0100 (CET)", "from NAM02-SN1-obe.outbound.protection.outlook.com\n (mail-eopbgr770053.outbound.protection.outlook.com [40.107.77.53])\n by mails.dpdk.org (Postfix) with ESMTP id 4BA1F40687\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Wisam Jaddo <wisamm@nvidia.com>", "To": "<arybchenko@solarflare.com>, <thomas@monjalon.net>, <akozyrev@nvidia.com>,\n <rasland@nvidia.com>, <dev@dpdk.org>", "Date": "Wed, 10 Mar 2021 15:48:52 +0200", "Message-ID": "<20210310134858.8104-2-wisamm@nvidia.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210310134858.8104-1-wisamm@nvidia.com>", "References": "<20210307091202.586-2-wisamm@nvidia.com>\n <20210310134858.8104-1-wisamm@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.145.6]", "X-ClientProxiedBy": "HQMAIL107.nvidia.com (172.20.187.13) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "321786b1-e4da-4017-b8d1-08d8e3cb4c8f", "X-MS-TrafficTypeDiagnostic": "BN7PR12MB2755:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <BN7PR12MB2755581D89F846D8B575C8F2A4919@BN7PR12MB2755.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:1051;", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n JrOtbLq4DWJmPYumuPkBjotwJ0E2ocuCQebrgXHQF+2D3HOjyLkjynKIW+l0YK2JTxE885AXoMK6Vm+f9XQIhJnj7qMhklPSxcqjzg9O9aNFVLH9gYQrYNIijCv7NRfhPTmQueRuErYNJQ+S6IgGwOmor7PNm3FbrdEIhd2OSgZOpCSGyp+I60N0XDaejU8iDd491RB7uZM3BfkWrOWOTvX7cursIgOgaoU3ZbLRS4ornjehvWlqGUfu0h54xOcbYiTrehCOhuuS8ofoERt6FMGYPhb9s3u6LIkOtJiUaBzJiYZFurwHo0qkEgx+Nko5o0KMIJgF1cze9kP09FmyR7wxcreXQxFHpKlASBZgdz6WQOQC/2fDTf/xbFXOaqa2XXBeY6l64vRC+pJIjrcuaEBjy01iFO7sQZCEDnyCNGwFyotZ6/VWCD9i6Zb75LKG3cgCfeFmbrvmTQQnYMxt1w2ty0Xg7NFpC3L5BtJDnRPNCX2bRlNUu6dGUsHXGayqBVOXeoV2X8A7BNE/rL/AzIaObGQr/4Xwz9szlPjY6MK9FGOKnk8ISTbol5ItPNx2yMZeqf7y7z7pxcwZutORZRYXgJe4A4vp8vvf+ixGRAqDlXFkTQYE7G1p6YHmQqjUZYlP8BBRuYV22bsrRk0GJRVO6CmXi3/M3SEa3WQ/sw6Bi+qWU+vV/JLNUq0K3PV6yNEPXBTSyyN3xQucQtkwiQ==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(39860400002)(136003)(346002)(396003)(376002)(36840700001)(46966006)(336012)(5660300002)(55016002)(1076003)(36756003)(34020700004)(82310400003)(36906005)(6666004)(8676002)(86362001)(16526019)(8936002)(83380400001)(110136005)(356005)(70206006)(26005)(426003)(6286002)(478600001)(7696005)(82740400003)(186003)(36860700001)(316002)(7636003)(2906002)(2616005)(70586007)(47076005)(41533002);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "10 Mar 2021 13:49:17.4139 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 321786b1-e4da-4017-b8d1-08d8e3cb4c8f", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT015.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN7PR12MB2755", "Subject": "[dpdk-dev] [PATCH v2 1/7] app/flow-perf: start using more generic\n wrapper for cycles", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "rdtsc() is x86 related, while this might fail for other archs,\nso it's better to use more generic API for cycles measurement.\n\nSigned-off-by: Wisam Jaddo <wisamm@nvidia.com>\n---\n app/test-flow-perf/main.c | 24 ++++++++++++------------\n 1 file changed, 12 insertions(+), 12 deletions(-)", "diff": "diff --git a/app/test-flow-perf/main.c b/app/test-flow-perf/main.c\nindex 99d0463456..8b5a11c15e 100644\n--- a/app/test-flow-perf/main.c\n+++ b/app/test-flow-perf/main.c\n@@ -969,7 +969,7 @@ meters_handler(int port_id, uint8_t core_id, uint8_t ops)\n \tend_counter = (core_id + 1) * rules_count_per_core;\n \n \tcpu_time_used = 0;\n-\tstart_batch = rte_rdtsc();\n+\tstart_batch = rte_get_timer_cycles();\n \tfor (counter = start_counter; counter < end_counter; counter++) {\n \t\tif (ops == METER_CREATE)\n \t\t\tcreate_meter_rule(port_id, counter);\n@@ -984,10 +984,10 @@ meters_handler(int port_id, uint8_t core_id, uint8_t ops)\n \t\tif (!((counter + 1) % rules_batch)) {\n \t\t\trules_batch_idx = ((counter + 1) / rules_batch) - 1;\n \t\t\tcpu_time_per_batch[rules_batch_idx] =\n-\t\t\t\t((double)(rte_rdtsc() - start_batch))\n-\t\t\t\t/ rte_get_tsc_hz();\n+\t\t\t\t((double)(rte_get_timer_cycles() - start_batch))\n+\t\t\t\t/ rte_get_timer_hz();\n \t\t\tcpu_time_used += cpu_time_per_batch[rules_batch_idx];\n-\t\t\tstart_batch = rte_rdtsc();\n+\t\t\tstart_batch = rte_get_timer_cycles();\n \t\t}\n \t}\n \n@@ -1089,7 +1089,7 @@ destroy_flows(int port_id, uint8_t core_id, struct rte_flow **flows_list)\n \tif (flow_group > 0 && core_id == 0)\n \t\trules_count_per_core++;\n \n-\tstart_batch = rte_rdtsc();\n+\tstart_batch = rte_get_timer_cycles();\n \tfor (i = 0; i < (uint32_t) rules_count_per_core; i++) {\n \t\tif (flows_list[i] == 0)\n \t\t\tbreak;\n@@ -1107,12 +1107,12 @@ destroy_flows(int port_id, uint8_t core_id, struct rte_flow **flows_list)\n \t\t * for this batch.\n \t\t */\n \t\tif (!((i + 1) % rules_batch)) {\n-\t\t\tend_batch = rte_rdtsc();\n+\t\t\tend_batch = rte_get_timer_cycles();\n \t\t\tdelta = (double) (end_batch - start_batch);\n \t\t\trules_batch_idx = ((i + 1) / rules_batch) - 1;\n-\t\t\tcpu_time_per_batch[rules_batch_idx] = delta / rte_get_tsc_hz();\n+\t\t\tcpu_time_per_batch[rules_batch_idx] = delta / rte_get_timer_hz();\n \t\t\tcpu_time_used += cpu_time_per_batch[rules_batch_idx];\n-\t\t\tstart_batch = rte_rdtsc();\n+\t\t\tstart_batch = rte_get_timer_cycles();\n \t\t}\n \t}\n \n@@ -1185,7 +1185,7 @@ insert_flows(int port_id, uint8_t core_id)\n \t\tflows_list[flow_index++] = flow;\n \t}\n \n-\tstart_batch = rte_rdtsc();\n+\tstart_batch = rte_get_timer_cycles();\n \tfor (counter = start_counter; counter < end_counter; counter++) {\n \t\tflow = generate_flow(port_id, flow_group,\n \t\t\tflow_attrs, flow_items, flow_actions,\n@@ -1211,12 +1211,12 @@ insert_flows(int port_id, uint8_t core_id)\n \t\t * for this batch.\n \t\t */\n \t\tif (!((counter + 1) % rules_batch)) {\n-\t\t\tend_batch = rte_rdtsc();\n+\t\t\tend_batch = rte_get_timer_cycles();\n \t\t\tdelta = (double) (end_batch - start_batch);\n \t\t\trules_batch_idx = ((counter + 1) / rules_batch) - 1;\n-\t\t\tcpu_time_per_batch[rules_batch_idx] = delta / rte_get_tsc_hz();\n+\t\t\tcpu_time_per_batch[rules_batch_idx] = delta / rte_get_timer_hz();\n \t\t\tcpu_time_used += cpu_time_per_batch[rules_batch_idx];\n-\t\t\tstart_batch = rte_rdtsc();\n+\t\t\tstart_batch = rte_get_timer_cycles();\n \t\t}\n \t}\n \n", "prefixes": [ "v2", "1/7" ] }