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helo=mail.nvidia.com;", "From": "Sean Zhang <xiazhang@nvidia.com>", "To": "<orika@nvidia.com>, <matan@nvidia.com>", "CC": "<thomas@monjalon.net>, <dev@dpdk.org>", "Subject": "[RFC 0/3] Add support for GRE optional fields matching", "Date": "Thu, 30 Dec 2021 05:08:14 +0200", "Message-ID": "<20211230030817.15264-1-xiazhang@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL111.nvidia.com (172.20.187.18) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "8f3c65fe-89d1-48b8-5957-08d9cb41abad", "X-MS-TrafficTypeDiagnostic": "BYAPR12MB3175:EE_", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <BYAPR12MB31757A7E99D7D96B5780F6BBA2459@BYAPR12MB3175.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:9508;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n oE4obMk4ds4o5ucsYBw4+2r/Lx8feNI3dSiEjjehQMFqCLsopXGRdnedQuUedCmRY6nJBEjrY9DZbhJz8cbecUPGtPleKhFzmVT0qmkGIWbcykFnPwggwR7lbzRqSUHwAiHmAdvMlH5/EJZzxE42CG/IC63ltT4YCmivUA31y9I/IbyKPd7WiTaNjvoLYB1u7vu9+5WhW75l64D2FKs6L+IGX/TQ2XlMOnLKGSfYK77k1kqL86lcKxLqZqMuJMat0VmKbQKkWJrxI327wbCuHNmaHNCU5WgUZvKxzGDTihY2LOEUgqGyOmPVICf9w1l7jl/G7kttYnx7uFqHsPwM8nQsOZgHX4WyA1q6Th8UrnIjEaK+RtgNMHPGx+L8Jn9nFKl6X+K5LXWrcKKYYKpvYPH/D2UhqJ34UaNwR5zzksHNpblH4bwXGCE6yfF7JK1myWnkWdqjwZ/1UnqnSIZDOLbx0KloUAONf/WQCXBGGHfQCtguoL2Mp0sbraLEmE2v5O6efpymdYlAQNeYgm+vnpsjjAP0ea6U+g+8/CHU/BQYy+7PhV8QU4MI2LE+0zDnvsWiwTFx//ajtmwaM0lRCf2PQOh9LhlqTCuyHW6AaMShgRQE5pV/OEiZ8kbb96dbFHNgNaamvIYckKv0LaxslPau1KCFDxVl4SyMOhPznjuVP8FXvE3j5++pbHu84oV3dfAs5c/KTZp5Lisy7lLt/nUA1rWu0vm47zCk62RkLA0WSKcuWEp3dyG5/rsUI9uF8MApJTJ3Z2UZ0866Vg0/0fuYCux4y1YdX68uvr1U4VA=", "X-Forefront-Antispam-Report": "CIP:12.22.5.238; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(4636009)(46966006)(36840700001)(40470700002)(508600001)(7696005)(1076003)(82310400004)(16526019)(55016003)(81166007)(110136005)(8936002)(36756003)(6636002)(40460700001)(70206006)(86362001)(36860700001)(356005)(4326008)(8676002)(5660300002)(6666004)(2616005)(47076005)(54906003)(316002)(186003)(2906002)(426003)(6286002)(336012)(70586007)(26005)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Dec 2021 03:08:36.1494 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 8f3c65fe-89d1-48b8-5957-08d9cb41abad", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.238];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT017.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BYAPR12MB3175", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This patch set adds support for matching optional fields of GRE header.\nThe optional fields are checksum, key and sequence number. Currently, key\nfield is supported with pattern gre_key item '.. / gre / gre_key value is\nxx / ..' with field gre_key in misc, but misc does not support matching of\nchecksum and sequence number of GRE.\nTo support matching of checksum and sequence number fields in GRE,\nrdma-core needs the capbility of misc5 and support tunnel_header 0-3. Since\ntunnel_header1 is used to match checksum, tunnel_header2 for key and\ntunnel_header3 for sequence by hardware. If checksum and sequence number\nnot present in the pattern, use misc as before for the matching.\nApplication can still use gre_key item 'gre_key value is xx' for key\nmatching, the effect is the same if use 'gre_option key is xx'.\nIf using gre_option item, the flags in gre item should be correspondingly\nset. For example, if using gre_option to match checksum, the c_bit should\nbe set '1' (.. / gre c_bit is 1 / gre_option checksum is xx / ..).\n\nSean Zhang (3):\n ethdev: support GRE optional fields\n app/testpmd: add gre_option item command\n net/mlx5: support matching on optional fields of GRE\n\n app/test-pmd/cmdline_flow.c | 57 ++++++++++++\n doc/guides/prog_guide/rte_flow.rst | 16 ++++\n doc/guides/testpmd_app_ug/testpmd_funcs.rst | 6 ++\n drivers/common/mlx5/mlx5_devx_cmds.c | 3 +\n drivers/net/mlx5/linux/mlx5_os.c | 2 +\n drivers/net/mlx5/mlx5.h | 1 +\n drivers/net/mlx5/mlx5_flow.c | 94 ++++++++++++++++++++\n drivers/net/mlx5/mlx5_flow.h | 6 ++\n drivers/net/mlx5/mlx5_flow_dv.c | 133 ++++++++++++++++++++++++++++\n lib/ethdev/rte_flow.c | 1 +\n lib/ethdev/rte_flow.h | 18 ++++\n 11 files changed, 337 insertions(+)" }