Cover Detail
Show a cover letter.
GET /api/covers/109906/?format=api
{ "id": 109906, "url": "http://patchwork.dpdk.org/api/covers/109906/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/cover/20220420081650.2043183-1-feifei.wang2@arm.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220420081650.2043183-1-feifei.wang2@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220420081650.2043183-1-feifei.wang2@arm.com", "date": "2022-04-20T08:16:45", "name": "[v1,0/5] Direct re-arming of buffers on receive side", "submitter": { "id": 1771, "url": "http://patchwork.dpdk.org/api/people/1771/?format=api", "name": "Feifei Wang", "email": "feifei.wang2@arm.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/cover/20220420081650.2043183-1-feifei.wang2@arm.com/mbox/", "series": [ { "id": 22568, "url": "http://patchwork.dpdk.org/api/series/22568/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=22568", "date": "2022-04-20T08:16:45", "name": "Direct re-arming of buffers on receive side", "version": 1, "mbox": "http://patchwork.dpdk.org/series/22568/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/covers/109906/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BF19AA00BE;\n\tWed, 20 Apr 2022 10:16:59 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 971584068E;\n\tWed, 20 Apr 2022 10:16:59 +0200 (CEST)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by mails.dpdk.org (Postfix) with ESMTP id A475B40687\n for <dev@dpdk.org>; Wed, 20 Apr 2022 10:16:58 +0200 (CEST)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 208C81FB;\n Wed, 20 Apr 2022 01:16:58 -0700 (PDT)", "from net-x86-dell-8268.shanghai.arm.com\n (net-x86-dell-8268.shanghai.arm.com [10.169.210.114])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B56153F73B;\n Wed, 20 Apr 2022 01:16:56 -0700 (PDT)" ], "From": "Feifei Wang <feifei.wang2@arm.com>", "To": "", "Cc": "dev@dpdk.org,\n\tnd@arm.com,\n\tFeifei Wang <feifei.wang2@arm.com>", "Subject": "[PATCH v1 0/5] Direct re-arming of buffers on receive side", "Date": "Wed, 20 Apr 2022 16:16:45 +0800", "Message-Id": "<20220420081650.2043183-1-feifei.wang2@arm.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Currently, the transmit side frees the buffers into the lcore cache and\nthe receive side allocates buffers from the lcore cache. The transmit\nside typically frees 32 buffers resulting in 32*8=256B of stores to\nlcore cache. The receive side allocates 32 buffers and stores them in\nthe receive side software ring, resulting in 32*8=256B of stores and\n256B of load from the lcore cache.\n\nThis patch proposes a mechanism to avoid freeing to/allocating from\nthe lcore cache. i.e. the receive side will free the buffers from\ntransmit side directly into it's software ring. This will avoid the 256B\nof loads and stores introduced by the lcore cache. It also frees up the\ncache lines used by the lcore cache.\n\nHowever, this solution poses several constraints:\n\n1)The receive queue needs to know which transmit queue it should take\nthe buffers from. The application logic decides which transmit port to\nuse to send out the packets. In many use cases the NIC might have a\nsingle port ([1], [2], [3]), in which case a given transmit queue is\nalways mapped to a single receive queue (1:1 Rx queue: Tx queue). This\nis easy to configure.\n\nIf the NIC has 2 ports (there are several references), then we will have\n1:2 (RX queue: TX queue) mapping which is still easy to configure.\nHowever, if this is generalized to 'N' ports, the configuration can be\nlong. More over the PMD would have to scan a list of transmit queues to\npull the buffers from.\n\n2)The other factor that needs to be considered is 'run-to-completion' vs\n'pipeline' models. In the run-to-completion model, the receive side and\nthe transmit side are running on the same lcore serially. In the pipeline\nmodel. The receive side and transmit side might be running on different\nlcores in parallel. This requires locking. This is not supported at this\npoint.\n\n3)Tx and Rx buffers must be from the same mempool. And we also must\nensure Tx buffer free number is equal to Rx buffer free number:\n(txq->tx_rs_thresh == RTE_I40E_RXQ_REARM_THRESH)\nThus, 'tx_next_dd' can be updated correctly in direct-rearm mode. This\nis due to tx_next_dd is a variable to compute tx sw-ring free location.\nIts value will be one more round than the position where next time free\nstarts.\n\nCurrent status in this RFC:\n1)An API is added to allow for mapping a TX queue to a RX queue.\n Currently it supports 1:1 mapping.\n2)The i40e driver is changed to do the direct re-arm of the receive\n side.\n3)L3fwd application is modified to do the direct rearm mapping\nautomatically without user config. This follows the rules that the\nthread can map TX queue to a RX queue based on the first received\npackage destination port.\n\nTesting status:\n1.The testing results for L3fwd are as follows:\n-------------------------------------------------------------------\nenabled direct rearm\n-------------------------------------------------------------------\nArm:\nN1SDP(neon path):\nwithout fast-free mode\t\twith fast-free mode\n\t+14.1%\t\t\t\t+7.0%\n\nAmpere Altra(neon path):\nwithout fast-free mode\t\twith fast-free mode\n\t+17.1\t\t\t\t+14.0%\n\nX86:\nDell-8268(limit frequency):\nsse path:\nwithout fast-free mode\t\twith fast-free mode\n\t+6.96%\t\t\t\t+2.02%\navx2 path:\nwithout fast-free mode\t\twith fast-free mode\n\t+9.04%\t\t\t\t+7.75%\navx512 path:\nwithout fast-free mode\t\twith fast-free mode\n\t+5.43%\t\t\t\t+1.57%\n-------------------------------------------------------------------\nThis patch can not affect base performance of normal mode.\nFurthermore, the reason for that limiting the CPU frequency is\nthat dell-8268 can encounter i40e NIC bottleneck with maximum\nfrequency.\n\n2.The testing results for VPP-L3fwd are as follows:\n-------------------------------------------------------------------\nArm:\nN1SDP(neon path):\nwith direct re-arm mode enabled\n\t+7.0%\n-------------------------------------------------------------------\nFor Ampere Altra and X86,VPP-L3fwd test has not been done.\n\nReference:\n[1] https://store.nvidia.com/en-us/networking/store/product/MCX623105AN-CDAT/NVIDIAMCX623105ANCDATConnectX6DxENAdapterCard100GbECryptoDisabled/\n[2] https://www.intel.com/content/www/us/en/products/sku/192561/intel-ethernet-network-adapter-e810cqda1/specifications.html\n[3] https://www.broadcom.com/products/ethernet-connectivity/network-adapters/100gb-nic-ocp/n1100g\n\nFeifei Wang (5):\n net/i40e: remove redundant Dtype initialization\n net/i40e: enable direct rearm mode\n ethdev: add API for direct rearm mode\n net/i40e: add direct rearm mode internal API\n examples/l3fwd: enable direct rearm mode\n\n drivers/net/i40e/i40e_ethdev.c | 34 +++\n drivers/net/i40e/i40e_rxtx.c | 4 -\n drivers/net/i40e/i40e_rxtx.h | 4 +\n drivers/net/i40e/i40e_rxtx_common_avx.h | 269 ++++++++++++++++++++++++\n drivers/net/i40e/i40e_rxtx_vec_avx2.c | 14 +-\n drivers/net/i40e/i40e_rxtx_vec_avx512.c | 249 +++++++++++++++++++++-\n drivers/net/i40e/i40e_rxtx_vec_neon.c | 141 ++++++++++++-\n drivers/net/i40e/i40e_rxtx_vec_sse.c | 170 ++++++++++++++-\n examples/l3fwd/l3fwd_lpm.c | 16 +-\n lib/ethdev/ethdev_driver.h | 15 ++\n lib/ethdev/rte_ethdev.c | 14 ++\n lib/ethdev/rte_ethdev.h | 31 +++\n lib/ethdev/version.map | 1 +\n 13 files changed, 949 insertions(+), 13 deletions(-)" }