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{
    "id": 40691,
    "url": "http://patchwork.dpdk.org/api/covers/40691/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/cover/20180606123128.7868-1-maxime.coquelin@redhat.com/",
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    "msgid": "<20180606123128.7868-1-maxime.coquelin@redhat.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20180606123128.7868-1-maxime.coquelin@redhat.com",
    "date": "2018-06-06T12:31:23",
    "name": "[dpdk-dev,v2,0/5] net/virtio: Tx path selection and offload improvements",
    "submitter": {
        "id": 512,
        "url": "http://patchwork.dpdk.org/api/people/512/?format=api",
        "name": "Maxime Coquelin",
        "email": "maxime.coquelin@redhat.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/cover/20180606123128.7868-1-maxime.coquelin@redhat.com/mbox/",
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        {
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            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20",
            "date": "2018-06-06T12:31:23",
            "name": "net/virtio: Tx path selection and offload improvements",
            "version": 2,
            "mbox": "http://patchwork.dpdk.org/series/20/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/covers/40691/comments/",
    "headers": {
        "Return-Path": "<maxime.coquelin@redhat.com>",
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            "from mx1.redhat.com (mx3-rdu2.redhat.com [66.187.233.73])\n\tby dpdk.org (Postfix) with ESMTP id A6EEFAA90\n\tfor <dev@dpdk.org>; Wed,  6 Jun 2018 14:31:43 +0200 (CEST)",
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        ],
        "From": "Maxime Coquelin <maxime.coquelin@redhat.com>",
        "To": "zhihong.wang@intel.com,\n\ttiwei.bie@intel.com,\n\tdev@dpdk.org",
        "Cc": "Maxime Coquelin <maxime.coquelin@redhat.com>",
        "Date": "Wed,  6 Jun 2018 14:31:23 +0200",
        "Message-Id": "<20180606123128.7868-1-maxime.coquelin@redhat.com>",
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            "inspected by milter-greylist-4.5.16 (mx1.redhat.com\n\t[10.11.55.7]); \n\tWed, 06 Jun 2018 12:31:43 +0000 (UTC) for IP:'10.11.54.5'\n\tDOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com'\n\tHELO:'smtp.corp.redhat.com' FROM:'maxime.coquelin@redhat.com' RCPT:''"
        ],
        "Subject": "[dpdk-dev] [PATCH v2 0/5] net/virtio: Tx path selection and offload\n\timprovements",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
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        "X-List-Received-Date": "Wed, 06 Jun 2018 12:31:44 -0000"
    },
    "content": "This series addresses a problem seen when running benchmars,\nwhere we see a big difference in Tx performance depending on\nwhether Rx mergeable is enabled or not.\nWith patch 1, Tx simple path is selected even when Rx-mrg is\nnegotiated.\n\nDigging a bit further, I found that Tx simple path could be\nselected even when offload features had been negotiated.\nWith patch 2, guest does not try to negotiate Tx offload\nfeatures that haven't been selected by the application.\nIt means that without restarting the guest, we can now switch\nfrom Tx simple path when application do no request offloads,\nto Tx standard path when the application request offloads.\nNote that to do so, one must stop the port first [0].\nAnother advantage of doing this than using Tx simple path\nwhen guest application does not use offload features, is\nthat on host side, the virtio net header parsing is skipped\nin dequeue function.\n\nPatch 3 fixes an issue with Rx offload, as simple path was\nbe used if application requested TCP LRO only.\n\nFinally, patch 4 aims at improving the offload feature checks\nin the standard paths.\n\nBelow are benchmarks results when offloads are enabled at\ndevice level and simple Tx is disabled (default).\n\nRx-mrg=off benchmarks:\n+------------+-------+-------------+-------------+----------+\n|    Run     |  PVP  | Guest->Host | Host->Guest | Loopback |\n+------------+-------+-------------+-------------+----------+\n| v18.05     | 14.47 |       17.02 |       17.57 |    13.15 |\n| + series   | 11.73 |       13.90 |       17.50 |    13.19 |\n+------------+-------+-------------+-------------+----------+\n\nRx-mrg=on benchmarks:\n+------------+-------+-------------+-------------+----------+\n|    Run     |  PVP  | Guest->Host | Host->Guest | Loopback |\n+------------+-------+-------------+-------------+----------+\n| v18.05     |  9.53 |       13.80 |       16.70 |    13.11 |\n| + series   |  9.58 |       13.93 |       16.70 |    13.11 |\n+------------+-------+-------------+-------------+----------+\n\nBelow are benchmarks results when offloads are enabled at\ndevice level and simple Tx is unlocked (with passing\n'simple_tx_support=1' as Virtio device devarg).\n\nRx-mrg=off benchmarks:\n+------------+-------+-------------+-------------+----------+\n|    Run     |  PVP  | Guest->Host | Host->Guest | Loopback |\n+------------+-------+-------------+-------------+----------+\n| v18.05     | 14.47 |       17.02 |       17.57 |    13.15 |\n| + series   | 14.88 |       19.64 |       17.50 |    13.14 |\n+------------+-------+-------------+-------------+----------+\n\nRx-mrg=on benchmarks:\n+------------+-------+-------------+-------------+----------+\n|    Run     |  PVP  | Guest->Host | Host->Guest | Loopback |\n+------------+-------+-------------+-------------+----------+\n| v18.05     |  9.53 |       13.80 |       16.70 |    13.11 |\n| + series   | 12.62 |       19.69 |       16.70 |    13.11 |\n+------------+-------+-------------+-------------+----------+\n\n\n[0]:\ntestpmd> port start 0\nEAL: Error disabling MSI-X interrupts for fd 17\nset_rxtx_funcs(): virtio: using mergeable buffer Rx path on port 0\nset_rxtx_funcs(): virtio: using simple Tx path on port 0\nPort 0: 52:54:00:58:D7:01\nChecking link statuses...\nDone\ntestpmd> show port 0 tx_offload capabilities \nTx Offloading Capabilities of port 0 :\n  Per Queue :\n  Per Port  : VLAN_INSERT UDP_CKSUM TCP_CKSUM TCP_TSO MULTI_SEGS\n         \ntestpmd> show port 0 tx_offload configuration\nTx Offloading Configuration of port 0 :\n  Port :\n  Queue[ 0] :\n\ntestpmd> port stop 0\nStopping ports...\nChecking link statuses...\nDone                \ntestpmd> csum set tcp hw 0\nParse tunnel is off\nIP checksum offload is sw\nUDP checksum offload is sw\nTCP checksum offload is hw\nSCTP checksum offload is sw\nOuter-Ip checksum offload is sw\ntestpmd> port start 0\nConfiguring Port 0 (socket 0)\nEAL: Error disabling MSI-X interrupts for fd 17\nset_rxtx_funcs(): virtio: using mergeable buffer Rx path on port 0\nset_rxtx_funcs(): virtio: using standard Tx path on port 0\nPort 0: 52:54:00:58:D7:01\nChecking link statuses...\nDone                                         \ntestpmd> show port 0 tx_offload configuration\nTx Offloading Configuration of port 0 :\n  Port : TCP_CKSUM\n  Queue[ 0] :\n\n\nChanges in v2:\n==============\n- Introduce a devarg to disable simple Tx path by default (Tiwei)\n- Use standard PATH if VLAN strip or insert offloads are requested (Tiwei)\n- Use boolean instead of int/uint8_t for has_tx/rx_offload (Tiwei)\n\nMaxime Coquelin (5):\n  net/virtio: prevent simple Tx path selection by default\n  net/virtio: use simple path for Tx even if Rx mergeable\n  net/vhost: improve Tx path selection\n  net/virtio: don't use simple Rx if TCP LRO or VLAN strip requested\n  net/virtio: improve offload check performance\n\n doc/guides/nics/virtio.rst         |   9 +++\n drivers/net/virtio/virtio_ethdev.c | 117 +++++++++++++++++++++++++++++++++++--\n drivers/net/virtio/virtio_ethdev.h |   3 -\n drivers/net/virtio/virtio_pci.h    |   4 ++\n drivers/net/virtio/virtio_rxtx.c   |  31 ++--------\n 5 files changed, 130 insertions(+), 34 deletions(-)"
}