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{
    "id": 50,
    "url": "http://patchwork.dpdk.org/api/covers/50/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/cover/20230812075506.361769-1-yuying.zhang@intel.com/",
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        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
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    "msgid": "<20230812075506.361769-1-yuying.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230812075506.361769-1-yuying.zhang@intel.com",
    "date": "2023-08-12T07:55:01",
    "name": "[v1,0/5] add rte flow support for cpfl",
    "submitter": {
        "id": 1844,
        "url": "http://patchwork.dpdk.org/api/people/1844/?format=api",
        "name": "Zhang, Yuying",
        "email": "yuying.zhang@intel.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/cover/20230812075506.361769-1-yuying.zhang@intel.com/mbox/",
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            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29205",
            "date": "2023-08-12T07:55:01",
            "name": "add rte flow support for cpfl",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/29205/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/covers/50/comments/",
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
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        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 058224303E;\n\tSat, 12 Aug 2023 09:32:14 +0200 (CEST)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CB8A2410DC;\n\tSat, 12 Aug 2023 09:32:13 +0200 (CEST)",
            "from mgamail.intel.com (mgamail.intel.com [192.55.52.93])\n by mails.dpdk.org (Postfix) with ESMTP id 7998C40151\n for <dev@dpdk.org>; Sat, 12 Aug 2023 09:32:12 +0200 (CEST)",
            "from fmsmga008.fm.intel.com ([10.253.24.58])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 12 Aug 2023 00:32:11 -0700",
            "from dpdk-yuyingzh-icelake.sh.intel.com ([10.67.116.226])\n by fmsmga008.fm.intel.com with ESMTP; 12 Aug 2023 00:32:09 -0700"
        ],
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        "X-ExtLoop1": "1",
        "From": "Yuying Zhang <yuying.zhang@intel.com>",
        "To": "dev@dpdk.org, beilei.xing@intel.com, qi.z.zhang@intel.com,\n jingjing.wu@intel.com",
        "Cc": "Yuying Zhang <yuying.zhang@intel.com>",
        "Subject": "[PATCH v1 0/5] add rte flow support for cpfl",
        "Date": "Sat, 12 Aug 2023 07:55:01 +0000",
        "Message-Id": "<20230812075506.361769-1-yuying.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
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        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
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        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "This patchset add rte_flow support for cpfl driver.\nIt depends on the following two patch sets:\nhttp://patchwork.dpdk.org/project/dpdk/cover/20230809155134.539287-1-beilei.xing@intel.com/\nhttp://patchwork.dpdk.org/project/dpdk/cover/20230811100012.2078135-1-wenjing.qiao@intel.com/\n\nYuying Zhang (5):\n  net/cpfl: setup rte flow skeleton\n  common/idpf/base: refine idpf ctlq message structure\n  net/cpfl: add cpfl control queue message handle\n  net/cpfl: add fxp rule module\n  net/cpfl: add fxp flow engine\n\n drivers/common/idpf/base/idpf_controlq_api.h |   3 +\n drivers/net/cpfl/cpfl_controlq.c             | 419 ++++++++++++-\n drivers/net/cpfl/cpfl_controlq.h             |  24 +\n drivers/net/cpfl/cpfl_ethdev.c               |  54 ++\n drivers/net/cpfl/cpfl_ethdev.h               |  94 +++\n drivers/net/cpfl/cpfl_flow.c                 | 331 ++++++++++\n drivers/net/cpfl/cpfl_flow.h                 |  88 +++\n drivers/net/cpfl/cpfl_flow_engine_fxp.c      | 610 +++++++++++++++++++\n drivers/net/cpfl/cpfl_fxp_rule.c             | 288 +++++++++\n drivers/net/cpfl/cpfl_fxp_rule.h             |  87 +++\n drivers/net/cpfl/meson.build                 |   5 +-\n 11 files changed, 2001 insertions(+), 2 deletions(-)\n create mode 100644 drivers/net/cpfl/cpfl_flow.c\n create mode 100644 drivers/net/cpfl/cpfl_flow.h\n create mode 100644 drivers/net/cpfl/cpfl_flow_engine_fxp.c\n create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.c\n create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.h"
}