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{
    "id": 93378,
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    "web_url": "http://patchwork.dpdk.org/project/dpdk/cover/20210524012346.496560-1-haiyue.wang@intel.com/",
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    "msgid": "<20210524012346.496560-1-haiyue.wang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210524012346.496560-1-haiyue.wang@intel.com",
    "date": "2021-05-24T01:23:42",
    "name": "[v7,0/3] fix PF reset causes VF memory request failure",
    "submitter": {
        "id": 1044,
        "url": "http://patchwork.dpdk.org/api/people/1044/?format=api",
        "name": "Wang, Haiyue",
        "email": "haiyue.wang@intel.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/cover/20210524012346.496560-1-haiyue.wang@intel.com/mbox/",
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            "date": "2021-05-24T01:23:42",
            "name": "fix PF reset causes VF memory request failure",
            "version": 7,
            "mbox": "http://patchwork.dpdk.org/series/17079/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/covers/93378/comments/",
    "headers": {
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        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A7F51A0547;\n\tMon, 24 May 2021 03:44:38 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 18F2B4003E;\n\tMon, 24 May 2021 03:44:38 +0200 (CEST)",
            "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id E69CF4003C\n for <dev@dpdk.org>; Mon, 24 May 2021 03:44:35 +0200 (CEST)",
            "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 May 2021 18:44:33 -0700",
            "from npg-dpdk-haiyue-1.sh.intel.com ([10.67.118.220])\n by orsmga008.jf.intel.com with ESMTP; 23 May 2021 18:44:32 -0700"
        ],
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        "X-ExtLoop1": "1",
        "From": "Haiyue Wang <haiyue.wang@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "qi.z.zhang@intel.com, liang-min.wang@intel.com, david.marchand@redhat.com,\n Haiyue Wang <haiyue.wang@intel.com>",
        "Date": "Mon, 24 May 2021 09:23:42 +0800",
        "Message-Id": "<20210524012346.496560-1-haiyue.wang@intel.com>",
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        "In-Reply-To": "<20210421050243.130585-1-haiyue.wang@intel.com>",
        "References": "<20210421050243.130585-1-haiyue.wang@intel.com>",
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        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v7 0/3] fix PF reset causes VF memory request\n failure",
        "X-BeenThere": "dev@dpdk.org",
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        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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    "content": "Trigger the VF reset from PF reset,\n\n        echo 1 > /sys/bus/pci/devices/PF-BDF/reset\n\nthe PCI bus master bit will cleared on VF, so the VF needs to enable\nthis bit before restart.\n\nThis patch set adds the API to enable PCI bus master.\n\nv7: fix the commit message typo, and update some description.\nv6: update the annotate symbol version, and add some comments in source code\nv5: error handling if bus master enable failed\nv4: change the API to set type, so can enable or disable\nv3: added the missed annotate symbol add time\nv2: rebase to new librte directory path\n\nHaiyue Wang (3):\n  bus/pci: set PCI master in command register\n  net/iavf: enable PCI bus master after reset\n  net/i40e: enable PCI bus master after reset\n\n drivers/bus/pci/pci_common.c      | 28 ++++++++++++++++++++++++++++\n drivers/bus/pci/rte_bus_pci.h     | 14 ++++++++++++++\n drivers/bus/pci/version.map       |  3 +++\n drivers/net/i40e/i40e_ethdev_vf.c | 13 ++++++++++++-\n drivers/net/iavf/iavf_ethdev.c    | 10 +++++++++-\n lib/pci/rte_pci.h                 |  4 ++++\n 6 files changed, 70 insertions(+), 2 deletions(-)"
}