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helo=mail.nvidia.com;", "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>", "CC": "<rasland@nvidia.com>, <orika@nvidia.com>, <dev@dpdk.org>", "Date": "Wed, 30 Jun 2021 15:45:47 +0300", "Message-ID": "<20210630124609.8711-1-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20210527093403.1153127-1-suanmingm@nvidia.com>", "References": "<20210527093403.1153127-1-suanmingm@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL101.nvidia.com (172.20.187.10) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "214e671d-14ab-4360-dd60-08d93bc51429", "X-MS-TrafficTypeDiagnostic": "BN8PR12MB3217:", "X-Microsoft-Antispam-PRVS": "\n <BN8PR12MB3217184380F87059A0F33A16C1019@BN8PR12MB3217.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:8882;", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n +BHPzbY+DFyqXxgOIWO3plq4j25226lrjkaRIn/xbbCr9mRyzhD2tTqYaCISl9qgmVfvd/gaeRt+E3BkZRHLeitz8zVAhKwmO02jkWMULEK4K285EIgo7t5AaEW4VuKWuvrzn1P05aZwkc1uakkP/P7gIXO3Nd26AxVETr5L4x1pxLoe7k64K1utO0z+fwQAVWBOX+JX3LIPvbza7lle/CK5KWTg9DS5EkwOaRlOYrkei/hZAndHPS1qlKAFdvJW8mqSg8bj2GqyhCDGy2jfyeweH96ZfRxu7ZYTQn5qpqopBp+wMqUGXXTvy35PLf3p4Q5wBVS15MGXgFHUpq8rrpiSPIqyzNuVdEJLvvN+uKivCFMF+wE9utyRAW9ELAtbQfeY8po7x9Zz2SpBOPysqgv/B4dUaEiUkxYLLB6c0inP4EbQk1isF0pa/6NWSRyurhAMusu7SLdNKqNdz7ZdXV81myyTH0JakKkmMzwK/LxNb8/RfryjtCoBPXOqyZwWjsbf9REotZ2tpTV4xNVzLJGQwne+JeTAorMswukXSAeiAA5LDk8Z0IABz08+hTmw1kQdvyT8fPXHZOeYjpff9kYp2rTCMBHLzxsJ2EzIVQaabzon9bYH/NUWujGiI1KlN2wHfJkFcL3AkX21uI90h/qo4lk8GcaHu5EGyM+42zIChSQpQemcyW0CuiyD8Pk0C/D5b3w7r4ohNYNRntYaSA==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(346002)(376002)(396003)(39860400002)(136003)(36840700001)(46966006)(186003)(7696005)(426003)(82310400003)(4326008)(336012)(6286002)(16526019)(5660300002)(36756003)(2906002)(70206006)(55016002)(478600001)(26005)(70586007)(2616005)(6666004)(8936002)(356005)(54906003)(86362001)(110136005)(83380400001)(36860700001)(316002)(8676002)(6636002)(1076003)(7636003)(47076005)(82740400003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Jun 2021 12:46:28.0830 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 214e671d-14ab-4360-dd60-08d93bc51429", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT042.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN8PR12MB3217", "Subject": "[dpdk-dev] [PATCH v2 00/22] net/mlx5: insertion rate optimization", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch series optimize the flow insertion rate with adding\nlocal cache to index pool and list.\n\nFor object which wants efficient index allocate and free, local\ncache will be very helpful.\n\nFor index pool, two level cache is added, one as local and another\nas global. The global cache is able to save all the allocated\nindex. That means all the allocated index will not be freed. Once\nthe local cache is full, the extra index will be flushed to the\nglobal cache. Once local cache is empty, first try to fetch more\nindex from global, if global is still empty, allocate new trunk\nand more index.\n\nFor list, sub local core list is introduced. The allocated objects\nwill be added and released only from local list without any locks.\nOnly the objects need to be shared will be synced from global list.\n\n---\n\nv2: add the list per-lcore cache optimization\n\n---\n\nMatan Azrad (9):\n net/mlx5: optimize modify header action memory\n net/mlx5: remove cache term from the list utility\n net/mlx5: add per lcore cache to the list utility\n net/mlx5: minimize list critical sections\n net/mlx5: manage list cache entries release\n net/mlx5: relax the list utility atomic operations\n net/mlx5: allocate list memory by the create API\n common/mlx5: add per-lcore cache to hash list utility\n net/mlx5: move modify header allocator to ipool\n\nSuanming Mou (13):\n net/mlx5: allow limiting the index pool maximum index\n net/mlx5: add indexed pool local cache\n net/mlx5: add index pool foreach define\n net/mlx5: replace flow list with index pool\n net/mlx5: adjust the hash bucket size\n common/mlx5: allocate cache list memory individually\n net/mlx5: enable index pool per-core cache\n net/mlx5: optimize hash list table allocate on demand\n common/mlx5: optimize cache list object memory\n net/mlx5: change memory release configuration\n net/mlx5: support index pool none local core operations\n net/mlx5: support list none local core operations\n net/mlx5: optimize Rx queue match\n\n doc/guides/nics/mlx5.rst | 5 +\n doc/guides/rel_notes/release_21_08.rst | 6 +\n drivers/common/mlx5/linux/mlx5_glue.h | 1 +\n drivers/common/mlx5/mlx5_common.h | 2 +\n drivers/common/mlx5/mlx5_common_utils.c | 569 ++++++++---\n drivers/common/mlx5/mlx5_common_utils.h | 283 ++++--\n drivers/net/mlx5/linux/mlx5_flow_os.h | 3 +-\n drivers/net/mlx5/linux/mlx5_os.c | 209 ++--\n drivers/net/mlx5/mlx5.c | 34 +-\n drivers/net/mlx5/mlx5.h | 46 +-\n drivers/net/mlx5/mlx5_defs.h | 12 +-\n drivers/net/mlx5/mlx5_flow.c | 305 +++---\n drivers/net/mlx5/mlx5_flow.h | 210 ++--\n drivers/net/mlx5/mlx5_flow_dv.c | 1203 +++++++++++++++--------\n drivers/net/mlx5/mlx5_rx.h | 14 +-\n drivers/net/mlx5/mlx5_rxq.c | 136 ++-\n drivers/net/mlx5/mlx5_trigger.c | 8 +-\n drivers/net/mlx5/mlx5_utils.c | 617 ++++++++----\n drivers/net/mlx5/mlx5_utils.h | 255 ++---\n drivers/net/mlx5/windows/mlx5_os.c | 11 +-\n 20 files changed, 2518 insertions(+), 1411 deletions(-)" }