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GET /api/patches/103424/?format=api
{ "id": 103424, "url": "http://patchwork.dpdk.org/api/patches/103424/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211102053918.4063391-5-junfeng.guo@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211102053918.4063391-5-junfeng.guo@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211102053918.4063391-5-junfeng.guo@intel.com", "date": "2021-11-02T05:39:18", "name": "[v9,4/4] net/ice: enable protocol agnostic flow offloading in FDIR", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e2189606539147715d0112d8d7620ee091e87ecb", "submitter": { "id": 1785, "url": "http://patchwork.dpdk.org/api/people/1785/?format=api", "name": "Junfeng Guo", "email": "junfeng.guo@intel.com" }, "delegate": { "id": 1540, "url": "http://patchwork.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211102053918.4063391-5-junfeng.guo@intel.com/mbox/", "series": [ { "id": 20192, "url": "http://patchwork.dpdk.org/api/series/20192/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20192", "date": "2021-11-02T05:39:14", "name": "enable protocol agnostic flow offloading in FDIR", "version": 9, "mbox": "http://patchwork.dpdk.org/series/20192/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/103424/comments/", "check": "fail", "checks": "http://patchwork.dpdk.org/api/patches/103424/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2EA83A0C4E;\n\tTue, 2 Nov 2021 06:40:49 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 110B7410FD;\n\tTue, 2 Nov 2021 06:40:44 +0100 (CET)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id A181B4068F\n for <dev@dpdk.org>; Tue, 2 Nov 2021 06:40:42 +0100 (CET)", "from orsmga007.jf.intel.com ([10.7.209.58])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 01 Nov 2021 22:40:41 -0700", "from dpdk-junfengguo-v1.sh.intel.com ([10.67.119.216])\n by orsmga007.jf.intel.com with ESMTP; 01 Nov 2021 22:40:36 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10155\"; a=\"231446390\"", "E=Sophos;i=\"5.87,201,1631602800\"; d=\"scan'208\";a=\"231446390\"", "E=Sophos;i=\"5.87,201,1631602800\"; d=\"scan'208\";a=\"488945172\"" ], "X-ExtLoop1": "1", "From": "Junfeng Guo <junfeng.guo@intel.com>", "To": "qi.z.zhang@intel.com,\n\tjingjing.wu@intel.com,\n\tbeilei.xing@intel.com", "Cc": "dev@dpdk.org, ferruh.yigit@intel.com, ting.xu@intel.com,\n junfeng.guo@intel.com", "Date": "Tue, 2 Nov 2021 13:39:18 +0800", "Message-Id": "<20211102053918.4063391-5-junfeng.guo@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20211102053918.4063391-1-junfeng.guo@intel.com>", "References": "<20211101083612.2380503-5-junfeng.guo@intel.com>\n <20211102053918.4063391-1-junfeng.guo@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v9 4/4] net/ice: enable protocol agnostic flow\n offloading in FDIR", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Protocol agnostic flow offloading in Flow Director is enabled by this\npatch based on the Parser Library, using existing rte_flow raw API.\n\nNote that the raw flow requires:\n1. byte string of raw target packet bits.\n2. byte string of mask of target packet.\n\nHere is an example:\nFDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:\n\nflow create 0 ingress pattern raw \\\npattern spec \\\n00000000000000000000000008004500001400004000401000000000000001020304 \\\npattern mask \\\n000000000000000000000000000000000000000000000000000000000000ffffffff \\\n/ end actions queue index 3 / mark id 3 / end\n\nNote that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto)\nis optional in our cases. To avoid redundancy, we just omit the mask\nof 0x0800 (with 0xFFFF) in the mask byte string example. The prefix\n'0x' for the spec and mask byte (hex) strings are also omitted here.\n\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n doc/guides/rel_notes/release_21_11.rst | 1 +\n drivers/net/ice/ice_ethdev.h | 14 ++\n drivers/net/ice/ice_fdir_filter.c | 231 +++++++++++++++++++++++++\n drivers/net/ice/ice_generic_flow.c | 7 +\n drivers/net/ice/ice_generic_flow.h | 3 +\n 5 files changed, 256 insertions(+)", "diff": "diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst\nindex 98d50a160b..36fdee0a98 100644\n--- a/doc/guides/rel_notes/release_21_11.rst\n+++ b/doc/guides/rel_notes/release_21_11.rst\n@@ -167,6 +167,7 @@ New Features\n \n * **Updated Intel ice driver.**\n \n+ * Added protocol agnostic flow offloading support in Flow Director.\n * Added 1PPS out support by a devargs.\n * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow.\n * Added DEV_RX_OFFLOAD_TIMESTAMP support.\ndiff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex 0e42c4c063..d021e7fd0b 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -318,6 +318,11 @@ struct ice_fdir_filter_conf {\n \tuint64_t input_set_o; /* used for non-tunnel or tunnel outer fields */\n \tuint64_t input_set_i; /* only for tunnel inner fields */\n \tuint32_t mark_flag;\n+\n+\tstruct ice_parser_profile *prof;\n+\tbool parser_ena;\n+\tu8 *pkt_buf;\n+\tu8 pkt_len;\n };\n \n #define ICE_MAX_FDIR_FILTER_NUM\t\t(1024 * 16)\n@@ -487,6 +492,14 @@ struct ice_devargs {\n \tuint8_t pps_out_ena;\n };\n \n+/**\n+ * Structure to store fdir fv entry.\n+ */\n+struct ice_fdir_prof_info {\n+\tstruct ice_parser_profile prof;\n+\tu64 fdir_actived_cnt;\n+};\n+\n /**\n * Structure to store private data for each PF/VF instance.\n */\n@@ -510,6 +523,7 @@ struct ice_adapter {\n \tstruct rte_timecounter tx_tstamp_tc;\n \tbool ptp_ena;\n \tuint64_t time_hw;\n+\tstruct ice_fdir_prof_info fdir_prof_info[ICE_MAX_PTGS];\n #ifdef RTE_ARCH_X86\n \tbool rx_use_avx2;\n \tbool rx_use_avx512;\ndiff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c\nindex bd627e3aa8..b5cd6d4ae6 100644\n--- a/drivers/net/ice/ice_fdir_filter.c\n+++ b/drivers/net/ice/ice_fdir_filter.c\n@@ -107,6 +107,7 @@\n \tICE_INSET_NAT_T_ESP_SPI)\n \n static struct ice_pattern_match_item ice_fdir_pattern_list[] = {\n+\t{pattern_raw,\t\t\t\t\tICE_INSET_NONE,\t\t\tICE_INSET_NONE,\t\t\tICE_INSET_NONE},\n \t{pattern_ethertype,\t\t\t\tICE_FDIR_INSET_ETH,\t\tICE_INSET_NONE,\t\t\tICE_INSET_NONE},\n \t{pattern_eth_ipv4,\t\t\t\tICE_FDIR_INSET_ETH_IPV4,\tICE_INSET_NONE,\t\t\tICE_INSET_NONE},\n \t{pattern_eth_ipv4_udp,\t\t\t\tICE_FDIR_INSET_ETH_IPV4_UDP,\tICE_INSET_NONE,\t\t\tICE_INSET_NONE},\n@@ -1188,6 +1189,24 @@ ice_fdir_is_tunnel_profile(enum ice_fdir_tunnel_type tunnel_type)\n \t\treturn 0;\n }\n \n+static int\n+ice_fdir_add_del_raw(struct ice_pf *pf,\n+\t\t struct ice_fdir_filter_conf *filter,\n+\t\t bool add)\n+{\n+\tstruct ice_hw *hw = ICE_PF_TO_HW(pf);\n+\n+\tunsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;\n+\trte_memcpy(pkt, filter->pkt_buf, filter->pkt_len);\n+\n+\tstruct ice_fltr_desc desc;\n+\tmemset(&desc, 0, sizeof(desc));\n+\tfilter->input.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;\n+\tice_fdir_get_prgm_desc(hw, &filter->input, &desc, add);\n+\n+\treturn ice_fdir_programming(pf, &desc);\n+}\n+\n static int\n ice_fdir_add_del_filter(struct ice_pf *pf,\n \t\t\tstruct ice_fdir_filter_conf *filter,\n@@ -1303,6 +1322,68 @@ ice_fdir_create_filter(struct ice_adapter *ad,\n \tstruct ice_fdir_fltr_pattern key;\n \tbool is_tun;\n \tint ret;\n+\tint i;\n+\n+\tif (filter->parser_ena) {\n+\t\tstruct ice_hw *hw = ICE_PF_TO_HW(pf);\n+\n+\t\tint id = ice_find_first_bit(filter->prof->ptypes, UINT16_MAX);\n+\t\tint ptg = hw->blk[ICE_BLK_FD].xlt1.t[id];\n+\t\tu16 ctrl_vsi = pf->fdir.fdir_vsi->idx;\n+\t\tu16 main_vsi = pf->main_vsi->idx;\n+\t\tbool fv_found = false;\n+\n+\t\tstruct ice_fdir_prof_info *pi = &ad->fdir_prof_info[ptg];\n+\t\tif (pi->fdir_actived_cnt != 0) {\n+\t\t\tfor (i = 0; i < ICE_MAX_FV_WORDS; i++)\n+\t\t\t\tif (pi->prof.fv[i].proto_id !=\n+\t\t\t\t filter->prof->fv[i].proto_id ||\n+\t\t\t\t pi->prof.fv[i].offset !=\n+\t\t\t\t filter->prof->fv[i].offset ||\n+\t\t\t\t pi->prof.fv[i].msk !=\n+\t\t\t\t filter->prof->fv[i].msk)\n+\t\t\t\t\tbreak;\n+\t\t\tif (i == ICE_MAX_FV_WORDS) {\n+\t\t\t\tfv_found = true;\n+\t\t\t\tpi->fdir_actived_cnt++;\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (!fv_found) {\n+\t\t\tret = ice_flow_set_hw_prof(hw, main_vsi, ctrl_vsi,\n+\t\t\t\t\t\t filter->prof, ICE_BLK_FD);\n+\t\t\tif (ret)\n+\t\t\t\tgoto error;\n+\t\t}\n+\n+\t\tret = ice_fdir_add_del_raw(pf, filter, true);\n+\t\tif (ret)\n+\t\t\tgoto error;\n+\n+\t\tif (!fv_found) {\n+\t\t\tfor (i = 0; i < filter->prof->fv_num; i++) {\n+\t\t\t\tpi->prof.fv[i].proto_id =\n+\t\t\t\t\tfilter->prof->fv[i].proto_id;\n+\t\t\t\tpi->prof.fv[i].offset =\n+\t\t\t\t\tfilter->prof->fv[i].offset;\n+\t\t\t\tpi->prof.fv[i].msk = filter->prof->fv[i].msk;\n+\t\t\t}\n+\t\t\tpi->fdir_actived_cnt = 1;\n+\t\t}\n+\n+\t\tif (filter->mark_flag == 1)\n+\t\t\tice_fdir_rx_parsing_enable(ad, 1);\n+\n+\t\tentry = rte_zmalloc(\"fdir_entry\", sizeof(*entry), 0);\n+\t\tif (!entry)\n+\t\t\tgoto error;\n+\n+\t\trte_memcpy(entry, filter, sizeof(*filter));\n+\n+\t\tflow->rule = entry;\n+\n+\t\treturn 0;\n+\t}\n \n \tice_fdir_extract_fltr_key(&key, filter);\n \tnode = ice_fdir_entry_lookup(fdir_info, &key);\n@@ -1381,6 +1462,11 @@ ice_fdir_create_filter(struct ice_adapter *ad,\n free_entry:\n \trte_free(entry);\n \treturn -rte_errno;\n+\n+error:\n+\trte_free(filter->prof);\n+\trte_free(filter->pkt_buf);\n+\treturn -rte_errno;\n }\n \n static int\n@@ -1397,6 +1483,44 @@ ice_fdir_destroy_filter(struct ice_adapter *ad,\n \n \tfilter = (struct ice_fdir_filter_conf *)flow->rule;\n \n+\tif (filter->parser_ena) {\n+\t\tstruct ice_hw *hw = ICE_PF_TO_HW(pf);\n+\n+\t\tint id = ice_find_first_bit(filter->prof->ptypes, UINT16_MAX);\n+\t\tint ptg = hw->blk[ICE_BLK_FD].xlt1.t[id];\n+\t\tu16 ctrl_vsi = pf->fdir.fdir_vsi->idx;\n+\t\tu16 main_vsi = pf->main_vsi->idx;\n+\t\tenum ice_block blk = ICE_BLK_FD;\n+\t\tu16 vsi_num;\n+\n+\t\tret = ice_fdir_add_del_raw(pf, filter, false);\n+\t\tif (ret)\n+\t\t\treturn -rte_errno;\n+\n+\t\tstruct ice_fdir_prof_info *pi = &ad->fdir_prof_info[ptg];\n+\t\tif (pi->fdir_actived_cnt != 0) {\n+\t\t\tpi->fdir_actived_cnt--;\n+\t\t\tif (!pi->fdir_actived_cnt) {\n+\t\t\t\tvsi_num = ice_get_hw_vsi_num(hw, ctrl_vsi);\n+\t\t\t\tice_rem_prof_id_flow(hw, blk, vsi_num, id);\n+\n+\t\t\t\tvsi_num = ice_get_hw_vsi_num(hw, main_vsi);\n+\t\t\t\tice_rem_prof_id_flow(hw, blk, vsi_num, id);\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (filter->mark_flag == 1)\n+\t\t\tice_fdir_rx_parsing_enable(ad, 0);\n+\n+\t\tflow->rule = NULL;\n+\n+\t\trte_free(filter->prof);\n+\t\trte_free(filter->pkt_buf);\n+\t\trte_free(filter);\n+\n+\t\treturn 0;\n+\t}\n+\n \tis_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);\n \n \tif (filter->counter) {\n@@ -1675,6 +1799,7 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,\n \tenum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;\n \tenum rte_flow_item_type l4 = RTE_FLOW_ITEM_TYPE_END;\n \tenum ice_fdir_tunnel_type tunnel_type = ICE_FDIR_TUNNEL_TYPE_NONE;\n+\tconst struct rte_flow_item_raw *raw_spec, *raw_mask;\n \tconst struct rte_flow_item_eth *eth_spec, *eth_mask;\n \tconst struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_last, *ipv4_mask;\n \tconst struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask;\n@@ -1702,6 +1827,9 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,\n \tstruct ice_fdir_extra *p_ext_data;\n \tstruct ice_fdir_v4 *p_v4 = NULL;\n \tstruct ice_fdir_v6 *p_v6 = NULL;\n+\tstruct ice_parser_result rslt;\n+\tstruct ice_parser *psr;\n+\tuint8_t item_num = 0;\n \n \tfor (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {\n \t\tif (item->type == RTE_FLOW_ITEM_TYPE_VXLAN)\n@@ -1713,6 +1841,7 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,\n \t\t item->type == RTE_FLOW_ITEM_TYPE_GTP_PSC) {\n \t\t\tis_outer = false;\n \t\t}\n+\t\titem_num++;\n \t}\n \n \t/* This loop parse flow pattern and distinguish Non-tunnel and tunnel\n@@ -1733,6 +1862,101 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,\n \t\t\t &input_set_i : &input_set_o;\n \n \t\tswitch (item_type) {\n+\t\tcase RTE_FLOW_ITEM_TYPE_RAW:\n+\t\t\traw_spec = item->spec;\n+\t\t\traw_mask = item->mask;\n+\n+\t\t\tif (item_num != 1)\n+\t\t\t\tbreak;\n+\n+\t\t\t/* convert raw spec & mask from byte string to int */\n+\t\t\tunsigned char *tmp_spec =\n+\t\t\t\t(uint8_t *)(uintptr_t)raw_spec->pattern;\n+\t\t\tunsigned char *tmp_mask =\n+\t\t\t\t(uint8_t *)(uintptr_t)raw_mask->pattern;\n+\t\t\tuint16_t udp_port = 0;\n+\t\t\tuint16_t tmp_val = 0;\n+\t\t\tuint8_t pkt_len = 0;\n+\t\t\tuint8_t tmp = 0;\n+\t\t\tint i, j;\n+\n+\t\t\tpkt_len = strlen((char *)(uintptr_t)raw_spec->pattern);\n+\t\t\tif (strlen((char *)(uintptr_t)raw_mask->pattern) !=\n+\t\t\t\tpkt_len)\n+\t\t\t\treturn -rte_errno;\n+\n+\t\t\tfor (i = 0, j = 0; i < pkt_len; i += 2, j++) {\n+\t\t\t\ttmp = tmp_spec[i];\n+\t\t\t\tif (tmp >= 'a' && tmp <= 'f')\n+\t\t\t\t\ttmp_val = tmp - 'a' + 10;\n+\t\t\t\tif (tmp >= 'A' && tmp <= 'F')\n+\t\t\t\t\ttmp_val = tmp - 'A' + 10;\n+\t\t\t\tif (tmp >= '0' && tmp <= '9')\n+\t\t\t\t\ttmp_val = tmp - '0';\n+\n+\t\t\t\ttmp_val *= 16;\n+\t\t\t\ttmp = tmp_spec[i + 1];\n+\t\t\t\tif (tmp >= 'a' && tmp <= 'f')\n+\t\t\t\t\ttmp_spec[j] = tmp_val + tmp - 'a' + 10;\n+\t\t\t\tif (tmp >= 'A' && tmp <= 'F')\n+\t\t\t\t\ttmp_spec[j] = tmp_val + tmp - 'A' + 10;\n+\t\t\t\tif (tmp >= '0' && tmp <= '9')\n+\t\t\t\t\ttmp_spec[j] = tmp_val + tmp - '0';\n+\n+\t\t\t\ttmp = tmp_mask[i];\n+\t\t\t\tif (tmp >= 'a' && tmp <= 'f')\n+\t\t\t\t\ttmp_val = tmp - 'a' + 10;\n+\t\t\t\tif (tmp >= 'A' && tmp <= 'F')\n+\t\t\t\t\ttmp_val = tmp - 'A' + 10;\n+\t\t\t\tif (tmp >= '0' && tmp <= '9')\n+\t\t\t\t\ttmp_val = tmp - '0';\n+\n+\t\t\t\ttmp_val *= 16;\n+\t\t\t\ttmp = tmp_mask[i + 1];\n+\t\t\t\tif (tmp >= 'a' && tmp <= 'f')\n+\t\t\t\t\ttmp_mask[j] = tmp_val + tmp - 'a' + 10;\n+\t\t\t\tif (tmp >= 'A' && tmp <= 'F')\n+\t\t\t\t\ttmp_mask[j] = tmp_val + tmp - 'A' + 10;\n+\t\t\t\tif (tmp >= '0' && tmp <= '9')\n+\t\t\t\t\ttmp_mask[j] = tmp_val + tmp - '0';\n+\t\t\t}\n+\n+\t\t\tpkt_len /= 2;\n+\n+\t\t\tif (ice_parser_create(&ad->hw, &psr))\n+\t\t\t\treturn -rte_errno;\n+\t\t\tif (ice_get_open_tunnel_port(&ad->hw, TNL_VXLAN,\n+\t\t\t\t\t\t &udp_port))\n+\t\t\t\tice_parser_vxlan_tunnel_set(psr, udp_port,\n+\t\t\t\t\t\t\t true);\n+\t\t\tif (ice_parser_run(psr, tmp_spec, pkt_len, &rslt))\n+\t\t\t\treturn -rte_errno;\n+\t\t\tice_parser_destroy(psr);\n+\n+\t\t\tif (!tmp_mask)\n+\t\t\t\treturn -rte_errno;\n+\n+\t\t\tfilter->prof = (struct ice_parser_profile *)\n+\t\t\t\tice_malloc(&ad->hw, sizeof(*filter->prof));\n+\t\t\tif (!filter->prof)\n+\t\t\t\treturn -ENOMEM;\n+\n+\t\t\tif (ice_parser_profile_init(&rslt, tmp_spec, tmp_mask,\n+\t\t\t\tpkt_len, ICE_BLK_FD, true, filter->prof))\n+\t\t\t\treturn -rte_errno;\n+\n+\t\t\tu8 *pkt_buf = (u8 *)ice_malloc(&ad->hw, pkt_len + 1);\n+\t\t\tif (!pkt_buf)\n+\t\t\t\treturn -ENOMEM;\n+\t\t\trte_memcpy(pkt_buf, tmp_spec, pkt_len);\n+\t\t\tfilter->pkt_buf = pkt_buf;\n+\n+\t\t\tfilter->pkt_len = pkt_len;\n+\n+\t\t\tfilter->parser_ena = true;\n+\n+\t\t\tbreak;\n+\n \t\tcase RTE_FLOW_ITEM_TYPE_ETH:\n \t\t\tflow_type = ICE_FLTR_PTYPE_NON_IP_L2;\n \t\t\teth_spec = item->spec;\n@@ -2198,6 +2422,7 @@ ice_fdir_parse(struct ice_adapter *ad,\n \tstruct ice_fdir_filter_conf *filter = &pf->fdir.conf;\n \tstruct ice_pattern_match_item *item = NULL;\n \tuint64_t input_set;\n+\tbool raw = false;\n \tint ret;\n \n \tmemset(filter, 0, sizeof(*filter));\n@@ -2213,7 +2438,13 @@ ice_fdir_parse(struct ice_adapter *ad,\n \tret = ice_fdir_parse_pattern(ad, pattern, error, filter);\n \tif (ret)\n \t\tgoto error;\n+\n+\tif (item->pattern_list[0] == RTE_FLOW_ITEM_TYPE_RAW)\n+\t\traw = true;\n+\n \tinput_set = filter->input_set_o | filter->input_set_i;\n+\tinput_set = raw ? ~input_set : input_set;\n+\n \tif (!input_set || filter->input_set_o &\n \t ~(item->input_set_mask_o | ICE_INSET_ETHERTYPE) ||\n \t filter->input_set_i & ~item->input_set_mask_i) {\ndiff --git a/drivers/net/ice/ice_generic_flow.c b/drivers/net/ice/ice_generic_flow.c\nindex 02f854666a..d3391c86c0 100644\n--- a/drivers/net/ice/ice_generic_flow.c\n+++ b/drivers/net/ice/ice_generic_flow.c\n@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = {\n \tRTE_FLOW_ITEM_TYPE_END,\n };\n \n+/* raw */\n+enum rte_flow_item_type pattern_raw[] = {\n+\tRTE_FLOW_ITEM_TYPE_RAW,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n /* L2 */\n enum rte_flow_item_type pattern_ethertype[] = {\n \tRTE_FLOW_ITEM_TYPE_ETH,\n@@ -2081,6 +2087,7 @@ struct ice_ptype_match {\n };\n \n static struct ice_ptype_match ice_ptype_map[] = {\n+\t{pattern_raw,\t\t\t\t\tICE_PTYPE_IPV4_PAY},\n \t{pattern_eth_ipv4,\t\t\t\tICE_PTYPE_IPV4_PAY},\n \t{pattern_eth_ipv4_udp,\t\t\t\tICE_PTYPE_IPV4_UDP_PAY},\n \t{pattern_eth_ipv4_tcp,\t\t\t\tICE_PTYPE_IPV4_TCP_PAY},\ndiff --git a/drivers/net/ice/ice_generic_flow.h b/drivers/net/ice/ice_generic_flow.h\nindex 8845a3e156..1b030c0466 100644\n--- a/drivers/net/ice/ice_generic_flow.h\n+++ b/drivers/net/ice/ice_generic_flow.h\n@@ -124,6 +124,9 @@\n /* empty pattern */\n extern enum rte_flow_item_type pattern_empty[];\n \n+/* raw pattern */\n+extern enum rte_flow_item_type pattern_raw[];\n+\n /* L2 */\n extern enum rte_flow_item_type pattern_ethertype[];\n extern enum rte_flow_item_type pattern_ethertype_vlan[];\n", "prefixes": [ "v9", "4/4" ] }