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GET /api/patches/103425/?format=api
{ "id": 103425, "url": "http://patchwork.dpdk.org/api/patches/103425/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211102055802.1801583-1-rkudurumalla@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211102055802.1801583-1-rkudurumalla@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211102055802.1801583-1-rkudurumalla@marvell.com", "date": "2021-11-02T05:58:01", "name": "[1/2] common/cnxk: change policer timeuint to configured value", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e4cd764098b79ae5bef1899f6141d3f42ba03e1c", "submitter": { "id": 2289, "url": "http://patchwork.dpdk.org/api/people/2289/?format=api", "name": "Rakesh Kudurumalla", "email": "rkudurumalla@marvell.com" }, "delegate": null, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211102055802.1801583-1-rkudurumalla@marvell.com/mbox/", "series": [ { "id": 20193, "url": "http://patchwork.dpdk.org/api/series/20193/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20193", "date": "2021-11-02T05:58:01", "name": "[1/2] common/cnxk: change policer timeuint to configured value", "version": 1, "mbox": "http://patchwork.dpdk.org/series/20193/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/103425/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/103425/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1A920A0C4E;\n\tTue, 2 Nov 2021 06:59:16 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 30BB24069F;\n\tTue, 2 Nov 2021 06:59:15 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 55D2A4068F\n for <dev@dpdk.org>; Tue, 2 Nov 2021 06:59:13 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 1A25eJbp012452;\n Mon, 1 Nov 2021 22:59:03 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3c2ycv82af-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 01 Nov 2021 22:59:03 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Mon, 1 Nov 2021 22:59:01 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Mon, 1 Nov 2021 22:59:01 -0700", "from localhost.localdomain (unknown [10.28.48.103])\n by maili.marvell.com (Postfix) with ESMTP id B5AB53F706C;\n Mon, 1 Nov 2021 22:58:57 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-transfer-encoding :\n content-type; s=pfpt0220; bh=UA7cEHD9O2YZsIpWwz2UnKnxPYfzesV+2Wc9GXK7Gvc=;\n b=kSaJae7KVy70HCU928AMTSgEC5ajfsSWUoDnJqblaAMIIWUmh2Jo+pf1ovSJd88Lz9Yy\n Ri32WMo/F5BxfqXBpeyAzOk1BgBS1rfBhGA1PLo6UZSba08KJKdT7fNOZhr7HHXpbufc\n pxBugllJvmpD/nrOCFXRoEfoLmXwki2CiTC7heLOWVwgmEBDMSAQZKq0rWPW2M7MC72v\n 7XXWfE5hmFfygIycAIOjCg/0C1R7sHmBYesE2IhVbBEHh2x1nqVybYwnPBUtm2vO7x1e\n n8OeqeTKYq1RpF03dgiloYrqEZfIJ+gwx8sEsDBJWp53LF62fNQVxJepE0znw261AQcL 1Q==", "From": "Rakesh Kudurumalla <rkudurumalla@marvell.com>", "To": "<jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>", "CC": "<dev@dpdk.org>, Rakesh Kudurumalla <rkudurumalla@marvell.com>", "Date": "Tue, 2 Nov 2021 11:28:01 +0530", "Message-ID": "<20211102055802.1801583-1-rkudurumalla@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "0yjZXt838pohlWnOPAg0uihTAirYAL9Q", "X-Proofpoint-ORIG-GUID": "0yjZXt838pohlWnOPAg0uihTAirYAL9Q", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475\n definitions=2021-11-02_01,2021-11-01_01,2020-04-07_01", "Subject": "[dpdk-dev] [PATCH 1/2] common/cnxk: change policer timeuint to\n configured value", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Ingress meter rate is calculated based on hardcoded\npolicer timeunit. Patch adds mbox interface to\nretrieve configured policer timeunit\n\nSigned-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>\n---\n drivers/common/cnxk/hw/nix.h | 12 ++---\n drivers/common/cnxk/roc_mbox.h | 31 +++++++++++++\n drivers/common/cnxk/roc_nix.h | 4 ++\n drivers/common/cnxk/roc_nix_bpf.c | 76 +++++++++++++++++++++++--------\n drivers/common/cnxk/roc_npc.c | 1 +\n drivers/common/cnxk/version.map | 1 +\n 6 files changed, 99 insertions(+), 26 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h\nindex b9e65c942f..dd2ebecc6a 100644\n--- a/drivers/common/cnxk/hw/nix.h\n+++ b/drivers/common/cnxk/hw/nix.h\n@@ -2115,10 +2115,10 @@ struct nix_lso_format {\n \n /** NIX policer rate limits */\n #define NIX_BPF_MAX_RATE_DIV_EXP 12\n-#define NIX_BPF_MAX_RATE_EXPONENT 0xf\n+#define NIX_BPF_MAX_RATE_EXPONENT 0x16\n #define NIX_BPF_MAX_RATE_MANTISSA 0xff\n \n-#define NIX_BPF_RATE_CONST 2000000ULL\n+#define NIX_BPF_RATE_CONST 8000000000ULL\n \n /* NIX rate calculation in Bits/Sec\n *\tPIR_ADD = ((256 + NIX_*_PIR[RATE_MANTISSA])\n@@ -2129,14 +2129,14 @@ struct nix_lso_format {\n *\t\t<< NIX_*_CIR[RATE_EXPONENT]) / 256\n *\tCIR = (2E6 * CIR_ADD / (CCLK_TICKS << NIX_*_CIR[RATE_DIVIDER_EXPONENT]))\n */\n-#define NIX_BPF_RATE(exponent, mantissa, div_exp) \\\n+#define NIX_BPF_RATE(policer_timeunit, exponent, mantissa, div_exp) \\\n \t((NIX_BPF_RATE_CONST * ((256 + (mantissa)) << (exponent))) / \\\n-\t (((1ull << (div_exp)) * 256)))\n+\t (((1ull << (div_exp)) * 256 * policer_timeunit)))\n \n /* Meter rate limits in Bits/Sec */\n-#define NIX_BPF_RATE_MIN NIX_BPF_RATE(0, 0, NIX_BPF_MAX_RATE_DIV_EXP)\n+#define NIX_BPF_RATE_MIN NIX_BPF_RATE(1000000000, 0, 0, 0)\n #define NIX_BPF_RATE_MAX \\\n-\tNIX_BPF_RATE(NIX_BPF_MAX_RATE_EXPONENT, NIX_BPF_MAX_RATE_MANTISSA, 0)\n+\tNIX_BPF_RATE(1, NIX_BPF_MAX_RATE_EXPONENT, NIX_BPF_MAX_RATE_MANTISSA, 0)\n \n #define NIX_BPF_DEFAULT_ADJUST_MANTISSA 511\n #define NIX_BPF_DEFAULT_ADJUST_EXPONENT 0\ndiff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h\nindex 22f6ebcd92..b63fe108c9 100644\n--- a/drivers/common/cnxk/roc_mbox.h\n+++ b/drivers/common/cnxk/roc_mbox.h\n@@ -131,6 +131,8 @@ struct mbox_msghdr {\n \tM(TIM_ENABLE_RING, 0x803, tim_enable_ring, tim_ring_req, \\\n \t tim_enable_rsp) \\\n \tM(TIM_DISABLE_RING, 0x804, tim_disable_ring, tim_ring_req, msg_rsp) \\\n+\tM(TIM_GET_MIN_INTVL, 0x805, tim_get_min_intvl, tim_intvl_req, \\\n+\t tim_intvl_rsp) \\\n \t/* CPT mbox IDs (range 0xA00 - 0xBFF) */ \\\n \tM(CPT_LF_ALLOC, 0xA00, cpt_lf_alloc, cpt_lf_alloc_req_msg, msg_rsp) \\\n \tM(CPT_LF_FREE, 0xA01, cpt_lf_free, msg_req, msg_rsp) \\\n@@ -143,6 +145,7 @@ struct mbox_msghdr {\n \tM(CPT_STATS, 0xA05, cpt_sts_get, cpt_sts_req, cpt_sts_rsp) \\\n \tM(CPT_RXC_TIME_CFG, 0xA06, cpt_rxc_time_cfg, cpt_rxc_time_cfg_req, \\\n \t msg_rsp) \\\n+\tM(CPT_CTX_CACHE_SYNC, 0xA07, cpt_ctx_cache_sync, msg_req, msg_rsp) \\\n \tM(CPT_RX_INLINE_LF_CFG, 0xBFE, cpt_rx_inline_lf_cfg, \\\n \t cpt_rx_inline_lf_cfg_msg, msg_rsp) \\\n \tM(CPT_GET_CAPS, 0xBFD, cpt_caps_get, msg_req, cpt_caps_rsp_msg) \\\n@@ -238,6 +241,12 @@ struct mbox_msghdr {\n \tM(NIX_BANDPROF_ALLOC, 0x801d, nix_bandprof_alloc, \\\n \t nix_bandprof_alloc_req, nix_bandprof_alloc_rsp) \\\n \tM(NIX_BANDPROF_FREE, 0x801e, nix_bandprof_free, nix_bandprof_free_req, \\\n+\t msg_rsp) \\\n+\tM(NIX_BANDPROF_GET_HWINFO, 0x801f, nix_bandprof_get_hwinfo, msg_req, \\\n+\t nix_bandprof_get_hwinfo_rsp) \\\n+\tM(NIX_CPT_BP_ENABLE, 0x8020, nix_cpt_bp_enable, nix_bp_cfg_req, \\\n+\t nix_bp_cfg_rsp) \\\n+\tM(NIX_CPT_BP_DISABLE, 0x8021, nix_cpt_bp_disable, nix_bp_cfg_req, \\\n \t msg_rsp)\n \n /* Messages initiated by AF (range 0xC00 - 0xDFF) */\n@@ -1070,6 +1079,7 @@ struct nix_rx_cfg {\n \tstruct mbox_msghdr hdr;\n #define NIX_RX_OL3_VERIFY BIT(0)\n #define NIX_RX_OL4_VERIFY BIT(1)\n+#define NIX_RX_DROP_RE\t BIT(2)\n \tuint8_t __io len_verify; /* Outer L3/L4 len check */\n #define NIX_RX_CSUM_OL4_VERIFY BIT(0)\n \tuint8_t __io csum_verify; /* Outer L4 checksum verification */\n@@ -1172,6 +1182,12 @@ struct nix_bandprof_free_req {\n \tuint16_t __io prof_idx[NIX_RX_BAND_PROF_LAYER_MAX][BANDPROF_PER_PFFUNC];\n };\n \n+struct nix_bandprof_get_hwinfo_rsp {\n+\tstruct mbox_msghdr hdr;\n+\tuint16_t __io prof_count[NIX_RX_BAND_PROF_LAYER_MAX];\n+\tuint32_t __io policer_timeunit;\n+};\n+\n /* SSO mailbox error codes\n * Range 501 - 600.\n */\n@@ -1798,6 +1814,9 @@ struct tim_config_req {\n \tuint32_t __io chunksize;\n \tuint32_t __io interval;\n \tuint8_t __io gpioedge;\n+\tuint8_t __io rsvd[7];\n+\tuint64_t __io intervalns;\n+\tuint64_t __io clockfreq;\n };\n \n struct tim_lf_alloc_rsp {\n@@ -1811,6 +1830,18 @@ struct tim_enable_rsp {\n \tuint32_t __io currentbucket;\n };\n \n+struct tim_intvl_req {\n+\tstruct mbox_msghdr hdr;\n+\tuint8_t __io clocksource;\n+\tuint64_t __io clockfreq;\n+};\n+\n+struct tim_intvl_rsp {\n+\tstruct mbox_msghdr hdr;\n+\tuint64_t __io intvl_cyc;\n+\tuint64_t __io intvl_ns;\n+};\n+\n struct sdp_node_info {\n \t/* Node to which this PF belons to */\n \tuint8_t __io node_id;\ndiff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h\nindex 343bb2f8b7..4d68a03aa2 100644\n--- a/drivers/common/cnxk/roc_nix.h\n+++ b/drivers/common/cnxk/roc_nix.h\n@@ -11,6 +11,7 @@\n #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF\n #define ROC_NIX_BPF_LEVEL_MAX\t 3\n #define ROC_NIX_BPF_STATS_MAX\t 12\n+#define ROC_NIX_MTR_ID_INVALID UINT32_MAX\n \n enum roc_nix_rss_reta_sz {\n \tROC_NIX_RSS_RETA_SZ_64 = 64,\n@@ -618,6 +619,9 @@ bool __roc_api roc_nix_tm_is_user_hierarchy_enabled(struct roc_nix *nix);\n int __roc_api roc_nix_tm_tree_type_get(struct roc_nix *nix);\n \n /* Ingress Policer API */\n+int __roc_api roc_nix_bpf_timeunit_get(struct roc_nix *roc_nix,\n+\t\t\t\t uint32_t *time_unit);\n+\n int __roc_api\n roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,\n \t\t uint16_t count[ROC_NIX_BPF_LEVEL_MAX] /* Out */);\ndiff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c\nindex df57958683..6996a54be0 100644\n--- a/drivers/common/cnxk/roc_nix_bpf.c\n+++ b/drivers/common/cnxk/roc_nix_bpf.c\n@@ -35,15 +35,16 @@ get_mbox(struct roc_nix *roc_nix)\n \n static inline uint64_t\n meter_rate_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p,\n-\t\t uint64_t *div_exp_p)\n+\t\t uint64_t *div_exp_p, uint32_t timeunit_p)\n {\n \tuint64_t div_exp, exponent, mantissa;\n+\tuint32_t time_us = timeunit_p;\n \n \t/* Boundary checks */\n \tif (value < NIX_BPF_RATE_MIN || value > NIX_BPF_RATE_MAX)\n \t\treturn 0;\n \n-\tif (value <= NIX_BPF_RATE(0, 0, 0)) {\n+\tif (value <= NIX_BPF_RATE(time_us, 0, 0, 0)) {\n \t\t/* Calculate rate div_exp and mantissa using\n \t\t * the following formula:\n \t\t *\n@@ -93,7 +94,7 @@ meter_rate_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p,\n \t\t*mantissa_p = mantissa;\n \n \t/* Calculate real rate value */\n-\treturn NIX_BPF_RATE(exponent, mantissa, div_exp);\n+\treturn NIX_BPF_RATE(time_us, exponent, mantissa, div_exp);\n }\n \n static inline uint64_t\n@@ -337,14 +338,41 @@ roc_nix_bpf_stats_to_idx(enum roc_nix_bpf_stats level_f)\n \treturn idx;\n }\n \n+int\n+roc_nix_bpf_timeunit_get(struct roc_nix *roc_nix, uint32_t *time_unit)\n+{\n+\tstruct nix_bandprof_get_hwinfo_rsp *rsp;\n+\tstruct mbox *mbox = get_mbox(roc_nix);\n+\tstruct msg_req *req;\n+\tint rc = -ENOSPC;\n+\n+\tif (roc_model_is_cn9k())\n+\t\treturn NIX_ERR_HW_NOTSUP;\n+\n+\treq = mbox_alloc_msg_nix_bandprof_get_hwinfo(mbox);\n+\tif (req == NULL)\n+\t\tgoto exit;\n+\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\tgoto exit;\n+\n+\t*time_unit = rsp->policer_timeunit;\n+\n+exit:\n+\treturn rc;\n+}\n+\n int\n roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,\n \t\t uint16_t count[ROC_NIX_BPF_LEVEL_MAX])\n {\n \tuint8_t mask = lvl_mask & NIX_BPF_LEVEL_F_MASK;\n+\tstruct nix_bandprof_get_hwinfo_rsp *rsp;\n+\tstruct mbox *mbox = get_mbox(roc_nix);\n \tuint8_t leaf_idx, mid_idx, top_idx;\n-\n-\tPLT_SET_USED(roc_nix);\n+\tstruct msg_req *req;\n+\tint rc = -ENOSPC;\n \n \tif (roc_model_is_cn9k())\n \t\treturn NIX_ERR_HW_NOTSUP;\n@@ -352,27 +380,29 @@ roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,\n \tif (!mask)\n \t\treturn NIX_ERR_PARAM;\n \n-\t/* Currently No MBOX interface is available to get number\n-\t * of bandwidth profiles. So numbers per level are hard coded,\n-\t * considering 3 RPM blocks and each block has 4 LMAC's.\n-\t * So total 12 physical interfaces are in system. Each interface\n-\t * supports following bandwidth profiles.\n-\t */\n+\treq = mbox_alloc_msg_nix_bandprof_get_hwinfo(mbox);\n+\tif (req == NULL)\n+\t\tgoto exit;\n+\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\tgoto exit;\n \n \tleaf_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_LEAF);\n \tmid_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_MID);\n \ttop_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_TOP);\n \n \tif (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID)\n-\t\tcount[leaf_idx] = NIX_MAX_BPF_COUNT_LEAF_LAYER;\n+\t\tcount[leaf_idx] = rsp->prof_count[sw_to_hw_lvl_map[leaf_idx]];\n \n \tif (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID)\n-\t\tcount[mid_idx] = NIX_MAX_BPF_COUNT_MID_LAYER;\n+\t\tcount[mid_idx] = rsp->prof_count[sw_to_hw_lvl_map[mid_idx]];\n \n \tif (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID)\n-\t\tcount[top_idx] = NIX_MAX_BPF_COUNT_TOP_LAYER;\n+\t\tcount[top_idx] = rsp->prof_count[sw_to_hw_lvl_map[top_idx]];\n \n-\treturn 0;\n+exit:\n+\treturn rc;\n }\n \n int\n@@ -514,7 +544,9 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,\n \tuint64_t exponent_p = 0, mantissa_p = 0, div_exp_p = 0;\n \tstruct mbox *mbox = get_mbox(roc_nix);\n \tstruct nix_cn10k_aq_enq_req *aq;\n+\tuint32_t policer_timeunit;\n \tuint8_t level_idx;\n+\tint rc;\n \n \tif (roc_model_is_cn9k())\n \t\treturn NIX_ERR_HW_NOTSUP;\n@@ -522,6 +554,10 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,\n \tif (!cfg)\n \t\treturn NIX_ERR_PARAM;\n \n+\trc = roc_nix_bpf_timeunit_get(roc_nix, &policer_timeunit);\n+\tif (rc)\n+\t\treturn rc;\n+\n \tlevel_idx = roc_nix_bpf_level_to_idx(lvl_flag);\n \tif (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)\n \t\treturn NIX_ERR_PARAM;\n@@ -544,7 +580,7 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,\n \tswitch (cfg->alg) {\n \tcase ROC_NIX_BPF_ALGO_2697:\n \t\tmeter_rate_to_nix(cfg->algo2697.cir, &exponent_p, &mantissa_p,\n-\t\t\t\t &div_exp_p);\n+\t\t\t\t &div_exp_p, policer_timeunit);\n \t\taq->prof.cir_mantissa = mantissa_p;\n \t\taq->prof.cir_exponent = exponent_p;\n \n@@ -566,12 +602,12 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,\n \n \tcase ROC_NIX_BPF_ALGO_2698:\n \t\tmeter_rate_to_nix(cfg->algo2698.cir, &exponent_p, &mantissa_p,\n-\t\t\t\t &div_exp_p);\n+\t\t\t\t &div_exp_p, policer_timeunit);\n \t\taq->prof.cir_mantissa = mantissa_p;\n \t\taq->prof.cir_exponent = exponent_p;\n \n \t\tmeter_rate_to_nix(cfg->algo2698.pir, &exponent_p, &mantissa_p,\n-\t\t\t\t &div_exp_p);\n+\t\t\t\t &div_exp_p, policer_timeunit);\n \t\taq->prof.peir_mantissa = mantissa_p;\n \t\taq->prof.peir_exponent = exponent_p;\n \n@@ -595,12 +631,12 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,\n \n \tcase ROC_NIX_BPF_ALGO_4115:\n \t\tmeter_rate_to_nix(cfg->algo4115.cir, &exponent_p, &mantissa_p,\n-\t\t\t\t &div_exp_p);\n+\t\t\t\t &div_exp_p, policer_timeunit);\n \t\taq->prof.cir_mantissa = mantissa_p;\n \t\taq->prof.cir_exponent = exponent_p;\n \n \t\tmeter_rate_to_nix(cfg->algo4115.eir, &exponent_p, &mantissa_p,\n-\t\t\t\t &div_exp_p);\n+\t\t\t\t &div_exp_p, policer_timeunit);\n \t\taq->prof.peir_mantissa = mantissa_p;\n \t\taq->prof.peir_exponent = exponent_p;\n \ndiff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c\nindex 0a7966b52e..503c74748f 100644\n--- a/drivers/common/cnxk/roc_npc.c\n+++ b/drivers/common/cnxk/roc_npc.c\n@@ -307,6 +307,7 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct roc_npc_attr *attr,\n \n \t/* Initialize actions */\n \tflow->ctr_id = NPC_COUNTER_NONE;\n+\tflow->mtr_id = ROC_NIX_MTR_ID_INVALID;\n \tpf_func = npc->pf_func;\n \n \tfor (; actions->type != ROC_NPC_ACTION_TYPE_END; actions++) {\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex bf47b33b3e..1f97fad89f 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -97,6 +97,7 @@ INTERNAL {\n \troc_nix_bpf_stats_read;\n \troc_nix_bpf_stats_reset;\n \troc_nix_bpf_stats_to_idx;\n+\troc_nix_bpf_timeunit_get;\n \troc_nix_cq_dump;\n \troc_nix_cq_fini;\n \troc_nix_cq_init;\n", "prefixes": [ "1/2" ] }