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GET /api/patches/104671/?format=api
{ "id": 104671, "url": "http://patchwork.dpdk.org/api/patches/104671/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211124132609.3315173-1-akozyrev@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211124132609.3315173-1-akozyrev@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211124132609.3315173-1-akozyrev@nvidia.com", "date": "2021-11-24T13:26:09", "name": "net/mlx5: fix GENEVE and VXLAN-GPE item matching", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ac105ac1fecaf7e070084c668a46f4b59da6f97d", "submitter": { "id": 1873, "url": "http://patchwork.dpdk.org/api/people/1873/?format=api", "name": "Alexander Kozyrev", "email": "akozyrev@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211124132609.3315173-1-akozyrev@nvidia.com/mbox/", "series": [ { "id": 20752, "url": "http://patchwork.dpdk.org/api/series/20752/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20752", "date": "2021-11-24T13:26:09", "name": "net/mlx5: fix GENEVE and VXLAN-GPE item matching", "version": 1, "mbox": "http://patchwork.dpdk.org/series/20752/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/104671/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/104671/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 23B6EA0C52;\n\tWed, 24 Nov 2021 14:26:38 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id DCE1941233;\n\tWed, 24 Nov 2021 14:26:37 +0100 (CET)", "from NAM12-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam12on2074.outbound.protection.outlook.com [40.107.244.74])\n by mails.dpdk.org (Postfix) with ESMTP id 772D04115C;\n Wed, 24 Nov 2021 14:26:35 +0100 (CET)", "from BN9PR03CA0846.namprd03.prod.outlook.com (2603:10b6:408:13d::11)\n by MWHPR12MB1807.namprd12.prod.outlook.com (2603:10b6:300:113::14)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4713.22; 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dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "Alexander Kozyrev <akozyrev@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<stable@dpdk.org>, <rasland@nvidia.com>, <viacheslavo@nvidia.com>,\n <matan@nvidia.com>, <getelson@nvidia.com>", "Subject": "[PATCH] net/mlx5: fix GENEVE and VXLAN-GPE item matching", "Date": "Wed, 24 Nov 2021 15:26:09 +0200", "Message-ID": "<20211124132609.3315173-1-akozyrev@nvidia.com>", "X-Mailer": "git-send-email 2.18.2", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL101.nvidia.com (172.20.187.10) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "2c0ca005-96b8-48dd-a265-08d9af4e0810", "X-MS-TrafficTypeDiagnostic": "MWHPR12MB1807:", "X-Microsoft-Antispam-PRVS": "\n <MWHPR12MB1807A08816C35923D2F38FC5AF619@MWHPR12MB1807.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:8273;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n Em9EfCUwcrbrdjkiN9Vvfl4uGlaQH29dFwR8YMxG0JgOmAcaikmOZ0sFkRnuoPFeG4VlkVabdavRTxPX8Ic/4t8C7YY/1fC/LcevBfGBPCrFHjUTzDDBnfF1BO2zE8saV6ZYt72hvgkV7BYzLxSNyrTedcJpnW3KPqZB5ap9MaaibcaoC8OGTan73L/1IzHpuDNprr8nmXq1akRsWiOABOZVwKQwwx9gOuQNBZ5gK0UU84RkCVL5QLlKIbGG+K60VPmB/BbOafSzYSMP0PM3ugOCgel2a+Vfs65aOc3d14n5bsR+wRSWJC6eJqWWmBhKWxeYjUSF7kpgPQtGRxbAHyB/X1AC9QOxsS5zJ3XyM2hW1R5SQWPvYSV8r/Q0N7qnPdGQ5U6EniJ24kZtJrKhV4FekBYkSiKX4AdHuFBjQqQ5FPTemsU6ozM6RMr+R5Ua+XWCxMti0YpVw27akgjVzdXl6f29FG0pDGYZGdzKtZOjPj+VZWXoQmbeevs0mZWqXCXnu0hyjA+VFyY5GE5wSAsGJbHGdJ8/gsQuFYJK6ewCFqeaNUlw52Sp9LqNwJTysfXbk5/MVXLwACZ0OkT1nPbF8ErKVx/txmg3UxhvPVwnqqDwqvGzF1UIg1aDQaFpvoEEubfM2kO+hAR6wls90OznXsyb+ep4mWl5paBdDagAFCjtbcsycVh5yev8dwlslW/1wvHHl/yOuhiUJhpjYg==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(36840700001)(46966006)(6286002)(107886003)(426003)(5660300002)(54906003)(82310400004)(2616005)(70206006)(55016003)(8676002)(186003)(4326008)(1076003)(6666004)(86362001)(83380400001)(336012)(16526019)(26005)(508600001)(356005)(36860700001)(2906002)(7636003)(8936002)(70586007)(316002)(36756003)(6916009)(7696005)(47076005)(450100002);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "24 Nov 2021 13:26:32.5404 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 2c0ca005-96b8-48dd-a265-08d9af4e0810", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT011.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MWHPR12MB1807", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "GENEVE and VXLAN-GPE item matching is done similarly to GRE matching.\nUsers can skip the specification of the protocol type and expect that\nthis type is deducted from the inner header type automatically.\nBut the inner header type may not be specified in order to match all the\nprotocol types. In this case, PMD should not specify the protocol type.\nCheck if we have the inner header type before setting the protocol type.\n\nFixes: 690391dd0e (\"net/mlx5: fix GENEVE protocol type translation\")\nFixes: 861fa3796f (\"net/mlx5: fix VXLAN-GPE next protocol translation\")\nCc: stable@dpdk.org\n\nSigned-off-by: Alexander Kozyrev <akozyrev@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow_dv.c | 6 ++++--\n 1 file changed, 4 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 1a9c040f3c..3da122cbb9 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -9057,7 +9057,6 @@ flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,\n \tm_protocol = vxlan_m->protocol;\n \tv_protocol = vxlan_v->protocol;\n \tif (!m_protocol) {\n-\t\tm_protocol = 0xff;\n \t\t/* Force next protocol to ensure next headers parsing. */\n \t\tif (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)\n \t\t\tv_protocol = RTE_VXLAN_GPE_TYPE_ETH;\n@@ -9065,6 +9064,8 @@ flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,\n \t\t\tv_protocol = RTE_VXLAN_GPE_TYPE_IPV4;\n \t\telse if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)\n \t\t\tv_protocol = RTE_VXLAN_GPE_TYPE_IPV6;\n+\t\tif (v_protocol)\n+\t\t\tm_protocol = 0xFF;\n \t}\n \tMLX5_SET(fte_match_set_misc3, misc_m,\n \t\t outer_vxlan_gpe_next_protocol, m_protocol);\n@@ -9135,8 +9136,9 @@ flow_dv_translate_item_geneve(void *matcher, void *key,\n \tprotocol_v = rte_be_to_cpu_16(geneve_v->protocol);\n \tif (!protocol_m) {\n \t\t/* Force next protocol to prevent matchers duplication */\n-\t\tprotocol_m = 0xFFFF;\n \t\tprotocol_v = mlx5_translate_tunnel_etypes(pattern_flags);\n+\t\tif (protocol_v)\n+\t\t\tprotocol_m = 0xFFFF;\n \t}\n \tMLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type, protocol_m);\n \tMLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,\n", "prefixes": [] }