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GET /api/patches/104706/?format=api
{ "id": 104706, "url": "http://patchwork.dpdk.org/api/patches/104706/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211125202044.3483813-1-dkozlyuk@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211125202044.3483813-1-dkozlyuk@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211125202044.3483813-1-dkozlyuk@nvidia.com", "date": "2021-11-25T20:20:44", "name": "common/mlx5: fix MR lookup on slow path", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "b8c058eb7fd904f69a695c5f494a0e9a9ec2254e", "submitter": { "id": 2248, "url": "http://patchwork.dpdk.org/api/people/2248/?format=api", "name": "Dmitry Kozlyuk", "email": "dkozlyuk@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211125202044.3483813-1-dkozlyuk@nvidia.com/mbox/", "series": [ { "id": 20781, "url": "http://patchwork.dpdk.org/api/series/20781/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20781", "date": "2021-11-25T20:20:44", "name": "common/mlx5: fix MR lookup on slow path", "version": 1, "mbox": "http://patchwork.dpdk.org/series/20781/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/104706/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/104706/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2591EA0C52;\n\tThu, 25 Nov 2021 21:21:10 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C4DA140DF5;\n\tThu, 25 Nov 2021 21:21:09 +0100 (CET)", "from NAM11-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam11on2051.outbound.protection.outlook.com [40.107.236.51])\n by mails.dpdk.org (Postfix) with ESMTP id 8E5B140140\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Dmitry Kozlyuk <dkozlyuk@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "Thomas Monjalon <thomas@monjalon.net>, Raslan Darawsheh\n <rasland@nvidia.com>, Viacheslav Ovsiienko <viacheslavo@nvidia.com>, \"Matan\n Azrad\" <matan@nvidia.com>", "Subject": "[PATCH] common/mlx5: fix MR lookup on slow path", "Date": "Thu, 25 Nov 2021 22:20:44 +0200", "Message-ID": "<20211125202044.3483813-1-dkozlyuk@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL111.nvidia.com (172.20.187.18) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "789d4bd6-1242-4629-985a-08d9b0511b54", "X-MS-TrafficTypeDiagnostic": "MN2PR12MB3517:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <MN2PR12MB3517F60C1D70D79A1EC20EBFB9629@MN2PR12MB3517.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:1169;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n t0bIwompnrOeIjN1F5y+r5+4sG+8CH8wVPxcz7Vq14AMkk97KagTt2e1js1+uGpn6aGvFQhG3Uc2HRVcdY9EIpWdxft+3iyGVN7PbXRUfMBtpQUzAx9xJNpIxf0bMFktFwtZw2UbAtru5g9EAkSOII0jCILtKZiNAm0ILNdsbJP6VearqHBL2SWa7Uw67Xzx44RdiLNu8ZbWqplBkuKufme/USGNlT4vCRDaI0Dao0M1CTo5V6aqgHOK1KEIDr1TKi3tborpeQTC992o+DhP6qGVNFS9BXSAjGQDFxNzuwEYOY+VS8pG9OpZCyXJDj7FHcUKEUS0gQnW+zlqrU6jfP/Y8+RlsY97zTSMwYnJvMUBJXgYHS3PwsDHNMa0/2bH8CxGeorb3COubU70U/ZpGvgKdsHh7wi0Od3KZw35Pm2aRdrd7SoFMEYDy+DJo16gUUn8+j9warDS+IiDpabtQIu0D76hP57/avwmXR5HC6GKz11UuOzUrK2ePZ4rugDkLqNEMwp0z2mBgRLsN82RpHkrE8UuL9CsggKJM3v66oI0z4LwKlMRYbtI9Daif4qTjZShqNg62FUH7YU9oWO8c/TY6j2dVY48MVr5a9zhjWcNmXe3tzdPgOwOQxiidBc4DYoS2QyeqkCsRxTK9WYXe7IgDf0+66r+FAvSJyWin7ZZVPP2APFDYKU2jeP04jIICZ/IAcrUqC8Twsj2hyf/fg==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(36840700001)(46966006)(70206006)(83380400001)(70586007)(356005)(336012)(36860700001)(6666004)(26005)(8676002)(16526019)(186003)(426003)(1076003)(4326008)(36756003)(86362001)(6286002)(2616005)(8936002)(7696005)(107886003)(316002)(2906002)(6916009)(82310400004)(55016003)(7636003)(54906003)(5660300002)(508600001)(47076005);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "25 Nov 2021 20:21:04.6034 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 789d4bd6-1242-4629-985a-08d9b0511b54", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT049.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN2PR12MB3517", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Memory region (MR) was being looked up incorrectly\nfor the data address of an externally-attached mbuf.\nA search was attempted for the mempool of the mbuf,\nwhile mbuf data address does not belong to this mempool\nin case of externally-attached mbuf.\nOnly attempt the search:\n1) for not externally-attached mbufs;\n2) for mbufs coming from MPRQ mempool;\n3) for externally-attached mbufs from mempools\n with pinned external buffers.\n\nFixes: 08ac03580ef2 (\"common/mlx5: fix mempool registration\")\n\nSigned-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>\nReviewed-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/mlx5_common_mr.c | 22 +++++++++++++++-------\n 1 file changed, 15 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c\nindex 01f35ebcdf..c694aaf28c 100644\n--- a/drivers/common/mlx5/mlx5_common_mr.c\n+++ b/drivers/common/mlx5/mlx5_common_mr.c\n@@ -2002,21 +2002,29 @@ mlx5_mr_mb2mr_bh(struct mlx5_mr_ctrl *mr_ctrl, struct rte_mbuf *mb)\n \t\t\t dev_gen);\n \tstruct mlx5_common_device *cdev =\n \t\tcontainer_of(share_cache, struct mlx5_common_device, mr_scache);\n+\tbool external, mprq, pinned = false;\n \n \t/* Recover MPRQ mempool. */\n-\tif (RTE_MBUF_HAS_EXTBUF(mb) &&\n-\t mb->shinfo->free_cb == mlx5_mprq_buf_free_cb) {\n+\texternal = RTE_MBUF_HAS_EXTBUF(mb);\n+\tif (external && mb->shinfo->free_cb == mlx5_mprq_buf_free_cb) {\n+\t\tmprq = true;\n \t\tbuf = mb->shinfo->fcb_opaque;\n \t\tmp = buf->mp;\n \t} else {\n+\t\tmprq = false;\n \t\tmp = mlx5_mb2mp(mb);\n+\t\tpinned = rte_pktmbuf_priv_flags(mp) &\n+\t\t\t RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF;\n+\t}\n+\tif (!external || mprq || pinned) {\n+\t\tlkey = mlx5_mr_mempool2mr_bh(mr_ctrl, mp, addr);\n+\t\tif (lkey != UINT32_MAX)\n+\t\t\treturn lkey;\n+\t\t/* MPRQ is always registered. */\n+\t\tMLX5_ASSERT(!mprq);\n \t}\n-\tlkey = mlx5_mr_mempool2mr_bh(mr_ctrl, mp, addr);\n-\tif (lkey != UINT32_MAX)\n-\t\treturn lkey;\n \t/* Register pinned external memory if the mempool is not used for Rx. */\n-\tif (cdev->config.mr_mempool_reg_en &&\n-\t (rte_pktmbuf_priv_flags(mp) & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)) {\n+\tif (cdev->config.mr_mempool_reg_en && pinned) {\n \t\tif (mlx5_mr_mempool_register(cdev, mp, true) < 0)\n \t\t\treturn UINT32_MAX;\n \t\tlkey = mlx5_mr_mempool2mr_bh(mr_ctrl, mp, addr);\n", "prefixes": [] }