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GET /api/patches/104769/?format=api
{ "id": 104769, "url": "http://patchwork.dpdk.org/api/patches/104769/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211130054809.2697001-1-asekhar@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211130054809.2697001-1-asekhar@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211130054809.2697001-1-asekhar@marvell.com", "date": "2021-11-30T05:48:09", "name": "common/cnxk: update cpu directive in NPA assembly code", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "e926526e22eeb845ca08a94895460424bc36578d", "submitter": { "id": 2125, "url": "http://patchwork.dpdk.org/api/people/2125/?format=api", "name": "Ashwin Sekhar T K", "email": "asekhar@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211130054809.2697001-1-asekhar@marvell.com/mbox/", "series": [ { "id": 20811, "url": "http://patchwork.dpdk.org/api/series/20811/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20811", "date": "2021-11-30T05:48:09", "name": "common/cnxk: update cpu directive in NPA assembly code", "version": 1, "mbox": "http://patchwork.dpdk.org/series/20811/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/104769/comments/", "check": "fail", "checks": "http://patchwork.dpdk.org/api/patches/104769/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AEA3EA0C58;\n\tTue, 30 Nov 2021 06:50:06 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4E1F34068F;\n\tTue, 30 Nov 2021 06:50:06 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id E56C94068B\n for <dev@dpdk.org>; Tue, 30 Nov 2021 06:50:04 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 1AU01luS025977\n for <dev@dpdk.org>; Mon, 29 Nov 2021 21:50:04 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3cn23wu1y2-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Mon, 29 Nov 2021 21:50:03 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Mon, 29 Nov 2021 21:50:02 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Mon, 29 Nov 2021 21:50:02 -0800", "from lab-ci-142.marvell.com (unknown [10.28.36.142])\n by maili.marvell.com (Postfix) with ESMTP id 90A5F3F7073;\n Mon, 29 Nov 2021 21:49:58 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-transfer-encoding :\n content-type; s=pfpt0220; bh=ycyWnGdOHhoh4IgxY6xYxP64Jntwtbrj9yo6rSBWG9g=;\n b=VSzeghCuHVC7TMlJkHxKOPx+7M041mU6nQqYFAN+rDZfulLO6B2ZB1hT9/6Y0gSuzGTi\n YzFKbthpiRCCYWZKyR8ENv4hFaWclbNGwffZIdQkP2HsQn+709xqH+EDidyrfadmtybh\n Qa0BFPe9evSp8/NcJt2t+mRpKRLLZTU6Mve6twyPUxbvIi7KeRidTkXYkvUMNZ7Tq2YY\n BrCEGQQLl9iOX0NUDLugx/nSnVEdSqtrFA0/YGMquJuf+ZQ4yenljhDTjKwoGLxmOGpq\n ZUy5sveeULi+DCrtKvNYR+0jNQkIRnNdz6m7r2rLUZ98fS47y6fdF4LuGH0I9vT28tGu XQ==", "From": "Ashwin Sekhar T K <asekhar@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<ndabilpuram@marvell.com>, <jerinj@marvell.com>, <skori@marvell.com>,\n <skoteshwar@marvell.com>, <pbhagavatula@marvell.com>,\n <kirankumark@marvell.com>, <psatheesh@marvell.com>,\n <asekhar@marvell.com>, <anoobj@marvell.com>, <gakhil@marvell.com>", "Subject": "[PATCH] common/cnxk: update cpu directive in NPA assembly code", "Date": "Tue, 30 Nov 2021 11:18:09 +0530", "Message-ID": "<20211130054809.2697001-1-asekhar@marvell.com>", "X-Mailer": "git-send-email 2.32.0", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "LQasaCo8B-kV-MDErYDc39E6xQ3KsJWV", "X-Proofpoint-GUID": "LQasaCo8B-kV-MDErYDc39E6xQ3KsJWV", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475\n definitions=2021-11-30_04,2021-11-28_01,2020-04-07_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Update the CPU directive in ROC NPA assembly code snippets.\n\nSigned-off-by: Ashwin Sekhar T K <asekhar@marvell.com>\n---\n drivers/common/cnxk/roc_npa.h | 30 +++++++++++++-----------------\n 1 file changed, 13 insertions(+), 17 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h\nindex 46350fdb48..aeadc3d5e2 100644\n--- a/drivers/common/cnxk/roc_npa.h\n+++ b/drivers/common/cnxk/roc_npa.h\n@@ -433,7 +433,7 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num,\n \tswitch (num) {\n \tcase 30:\n \t\tasm volatile(\n-\t\t\t\".cpu generic+lse\\n\"\n+\t\t\t\".arch_extension lse\\n\"\n \t\t\t\"mov v18.d[0], %[dst]\\n\"\n \t\t\t\"mov v18.d[1], %[loc]\\n\"\n \t\t\t\"mov v19.d[0], %[wdata]\\n\"\n@@ -497,7 +497,7 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num,\n \t\tbreak;\n \tcase 16:\n \t\tasm volatile(\n-\t\t\t\".cpu generic+lse\\n\"\n+\t\t\t\".arch_extension lse\\n\"\n \t\t\t\"mov x16, %[wdata]\\n\"\n \t\t\t\"mov x17, %[wdata]\\n\"\n \t\t\t\"casp x0, x1, x16, x17, [%[loc]]\\n\"\n@@ -517,15 +517,14 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num,\n \t\t\t\"stp x12, x13, [%[dst], #96]\\n\"\n \t\t\t\"stp x14, x15, [%[dst], #112]\\n\"\n \t\t\t:\n-\t\t\t: [wdata] \"r\" (wdata), [dst] \"r\" (buf), [loc] \"r\" (addr)\n+\t\t\t: [wdata] \"r\"(wdata), [dst] \"r\"(buf), [loc] \"r\"(addr)\n \t\t\t: \"memory\", \"x0\", \"x1\", \"x2\", \"x3\", \"x4\", \"x5\", \"x6\",\n \t\t\t \"x7\", \"x8\", \"x9\", \"x10\", \"x11\", \"x12\", \"x13\", \"x14\",\n-\t\t\t \"x15\", \"x16\", \"x17\"\n-\t\t);\n+\t\t\t \"x15\", \"x16\", \"x17\");\n \t\tbreak;\n \tcase 8:\n \t\tasm volatile(\n-\t\t\t\".cpu generic+lse\\n\"\n+\t\t\t\".arch_extension lse\\n\"\n \t\t\t\"mov x16, %[wdata]\\n\"\n \t\t\t\"mov x17, %[wdata]\\n\"\n \t\t\t\"casp x0, x1, x16, x17, [%[loc]]\\n\"\n@@ -537,14 +536,13 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num,\n \t\t\t\"stp x4, x5, [%[dst], #32]\\n\"\n \t\t\t\"stp x6, x7, [%[dst], #48]\\n\"\n \t\t\t:\n-\t\t\t: [wdata] \"r\" (wdata), [dst] \"r\" (buf), [loc] \"r\" (addr)\n+\t\t\t: [wdata] \"r\"(wdata), [dst] \"r\"(buf), [loc] \"r\"(addr)\n \t\t\t: \"memory\", \"x0\", \"x1\", \"x2\", \"x3\", \"x4\", \"x5\", \"x6\",\n-\t\t\t \"x7\", \"x16\", \"x17\"\n-\t\t);\n+\t\t\t \"x7\", \"x16\", \"x17\");\n \t\tbreak;\n \tcase 4:\n \t\tasm volatile(\n-\t\t\t\".cpu generic+lse\\n\"\n+\t\t\t\".arch_extension lse\\n\"\n \t\t\t\"mov x16, %[wdata]\\n\"\n \t\t\t\"mov x17, %[wdata]\\n\"\n \t\t\t\"casp x0, x1, x16, x17, [%[loc]]\\n\"\n@@ -552,21 +550,19 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num,\n \t\t\t\"stp x0, x1, [%[dst]]\\n\"\n \t\t\t\"stp x2, x3, [%[dst], #16]\\n\"\n \t\t\t:\n-\t\t\t: [wdata] \"r\" (wdata), [dst] \"r\" (buf), [loc] \"r\" (addr)\n-\t\t\t: \"memory\", \"x0\", \"x1\", \"x2\", \"x3\", \"x16\", \"x17\"\n-\t\t);\n+\t\t\t: [wdata] \"r\"(wdata), [dst] \"r\"(buf), [loc] \"r\"(addr)\n+\t\t\t: \"memory\", \"x0\", \"x1\", \"x2\", \"x3\", \"x16\", \"x17\");\n \t\tbreak;\n \tcase 2:\n \t\tasm volatile(\n-\t\t\t\".cpu generic+lse\\n\"\n+\t\t\t\".arch_extension lse\\n\"\n \t\t\t\"mov x16, %[wdata]\\n\"\n \t\t\t\"mov x17, %[wdata]\\n\"\n \t\t\t\"casp x0, x1, x16, x17, [%[loc]]\\n\"\n \t\t\t\"stp x0, x1, [%[dst]]\\n\"\n \t\t\t:\n-\t\t\t: [wdata] \"r\" (wdata), [dst] \"r\" (buf), [loc] \"r\" (addr)\n-\t\t\t: \"memory\", \"x0\", \"x1\", \"x16\", \"x17\"\n-\t\t);\n+\t\t\t: [wdata] \"r\"(wdata), [dst] \"r\"(buf), [loc] \"r\"(addr)\n+\t\t\t: \"memory\", \"x0\", \"x1\", \"x16\", \"x17\");\n \t\tbreak;\n \tcase 1:\n \t\tbuf[0] = roc_npa_aura_op_alloc(aura_handle, drop);\n", "prefixes": [] }