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GET /api/patches/104857/?format=api
{ "id": 104857, "url": "http://patchwork.dpdk.org/api/patches/104857/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211203163627.3254236-2-rbhansali@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211203163627.3254236-2-rbhansali@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211203163627.3254236-2-rbhansali@marvell.com", "date": "2021-12-03T16:36:27", "name": "[2/2] net/cnxk: ethdev Rx/Tx queue status callbacks", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "12bdbf55d403b27d9e41454db17a836d13c063f3", "submitter": { "id": 2436, "url": "http://patchwork.dpdk.org/api/people/2436/?format=api", "name": "Rahul Bhansali", "email": "rbhansali@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211203163627.3254236-2-rbhansali@marvell.com/mbox/", "series": [ { "id": 20851, "url": "http://patchwork.dpdk.org/api/series/20851/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20851", "date": "2021-12-03T16:36:26", "name": "[1/2] common/cnxk: get head-tail of Rx and Tx queues", "version": 1, "mbox": "http://patchwork.dpdk.org/series/20851/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/104857/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/104857/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F288FA0C41;\n\tFri, 3 Dec 2021 17:36:48 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id EA2844271E;\n\tFri, 3 Dec 2021 17:36:42 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 6E0CB40041\n for <dev@dpdk.org>; Fri, 3 Dec 2021 17:36:41 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 1B396mrM014942\n for <dev@dpdk.org>; Fri, 3 Dec 2021 08:36:40 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3cq84ykfm2-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 03 Dec 2021 08:36:40 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Fri, 3 Dec 2021 08:36:38 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Fri, 3 Dec 2021 08:36:38 -0800", "from localhost.localdomain (unknown [10.28.48.107])\n by maili.marvell.com (Postfix) with ESMTP id 8155A3F703F;\n Fri, 3 Dec 2021 08:36:36 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=NIayA9/BhuABPaV7VwTDCGIUo7jvtC41ODrFeeW7SMU=;\n b=hzVa7+1vAwRYz3B4WSogs89F1/AVR0806D/h/c8EWklrm5pw/L8S3HZPLsZ2H3OxmpVl\n PXAXb/rcP4SPXtjswi30ZjaOvOafLRu1/WooTrlnroLBSSq/D1ILRGojc2cwNv8rt54E\n zIUEmTowzYJT2gUp3jPl0ybSWZfTAB5vv6BeDVPjXJJtZ2zG9BypkIfjcBol+AzRW0GZ\n U09E0RkmG2rimEHDchMKQ0Id6aNf9Z6aWyCHniKVEFdQVAdWTZB8Nv+XfRouCyVSPmHd\n W9H+kC4efjJ5DV0Vlhx2UzGP4viLbiwXUr9kVNCI5kgWaeyrfp0CVGuniNdAE6ZtGD2P lg==", "From": "Rahul Bhansali <rbhansali@marvell.com>", "To": "<dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<jerinj@marvell.com>, Rahul Bhansali <rbhansali@marvell.com>", "Subject": "[PATCH 2/2] net/cnxk: ethdev Rx/Tx queue status callbacks", "Date": "Fri, 3 Dec 2021 22:06:27 +0530", "Message-ID": "<20211203163627.3254236-2-rbhansali@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20211203163627.3254236-1-rbhansali@marvell.com>", "References": "<20211203163627.3254236-1-rbhansali@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "-743wEqYlkXZCXaizivTO5rLS38RjDij", "X-Proofpoint-GUID": "-743wEqYlkXZCXaizivTO5rLS38RjDij", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2021-12-03_07,2021-12-02_01,2021-12-02_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Provides ethdev callback support of rx_queue_count,\nrx_descriptor_status and tx_descriptor_status.\n\nSigned-off-by: Rahul Bhansali <rbhansali@marvell.com>\n---\n drivers/net/cnxk/cnxk_ethdev.c | 3 ++\n drivers/net/cnxk/cnxk_ethdev.h | 5 +++\n drivers/net/cnxk/cnxk_ethdev_ops.c | 60 ++++++++++++++++++++++++++++++\n 3 files changed, 68 insertions(+)", "diff": "diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex 74f625553d..183fd241d8 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -1595,6 +1595,9 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev)\n \tint rc, max_entries;\n \n \teth_dev->dev_ops = &cnxk_eth_dev_ops;\n+\teth_dev->rx_queue_count = cnxk_nix_rx_queue_count;\n+\teth_dev->rx_descriptor_status = cnxk_nix_rx_descriptor_status;\n+\teth_dev->tx_descriptor_status = cnxk_nix_tx_descriptor_status;\n \n \t/* Alloc security context */\n \tsec_ctx = plt_zmalloc(sizeof(struct rte_security_ctx), 0);\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex 5bfda3d815..43814a81fc 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -559,6 +559,11 @@ void cnxk_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,\n void cnxk_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,\n \t\t\t struct rte_eth_txq_info *qinfo);\n \n+/* Queue status */\n+int cnxk_nix_rx_descriptor_status(void *rxq, uint16_t offset);\n+int cnxk_nix_tx_descriptor_status(void *txq, uint16_t offset);\n+uint32_t cnxk_nix_rx_queue_count(void *rxq);\n+\n /* Lookup configuration */\n const uint32_t *cnxk_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev);\n void *cnxk_nix_fastpath_lookup_mem_get(void);\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c\nindex ce5f1f7240..1255d6b40f 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_ops.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_ops.c\n@@ -694,6 +694,66 @@ cnxk_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid,\n \tmemcpy(&qinfo->conf, &txq_sp->qconf.conf.tx, sizeof(qinfo->conf));\n }\n \n+uint32_t\n+cnxk_nix_rx_queue_count(void *rxq)\n+{\n+\tstruct cnxk_eth_rxq_sp *rxq_sp = cnxk_eth_rxq_to_sp(rxq);\n+\tstruct roc_nix *nix = &rxq_sp->dev->nix;\n+\tuint32_t head, tail;\n+\n+\troc_nix_cq_head_tail_get(nix, rxq_sp->qid, &head, &tail);\n+\treturn (tail - head) % (rxq_sp->qconf.nb_desc);\n+}\n+\n+static inline int\n+nix_offset_has_packet(uint32_t head, uint32_t tail, uint16_t offset, bool is_rx)\n+{\n+\t/* Check given offset(queue index) has packet filled/xmit by HW\n+\t * in case of Rx or Tx.\n+\t * Also, checks for wrap around case.\n+\t */\n+\treturn ((tail > head && offset <= tail && offset >= head) ||\n+\t\t(head > tail && (offset >= head || offset <= tail))) ?\n+\t\t is_rx :\n+\t\t !is_rx;\n+}\n+\n+int\n+cnxk_nix_rx_descriptor_status(void *rxq, uint16_t offset)\n+{\n+\tstruct cnxk_eth_rxq_sp *rxq_sp = cnxk_eth_rxq_to_sp(rxq);\n+\tstruct roc_nix *nix = &rxq_sp->dev->nix;\n+\tuint32_t head, tail;\n+\n+\tif (rxq_sp->qconf.nb_desc <= offset)\n+\t\treturn -EINVAL;\n+\n+\troc_nix_cq_head_tail_get(nix, rxq_sp->qid, &head, &tail);\n+\n+\tif (nix_offset_has_packet(head, tail, offset, 1))\n+\t\treturn RTE_ETH_RX_DESC_DONE;\n+\telse\n+\t\treturn RTE_ETH_RX_DESC_AVAIL;\n+}\n+\n+int\n+cnxk_nix_tx_descriptor_status(void *txq, uint16_t offset)\n+{\n+\tstruct cnxk_eth_txq_sp *txq_sp = cnxk_eth_txq_to_sp(txq);\n+\tstruct roc_nix *nix = &txq_sp->dev->nix;\n+\tuint32_t head = 0, tail = 0;\n+\n+\tif (txq_sp->qconf.nb_desc <= offset)\n+\t\treturn -EINVAL;\n+\n+\troc_nix_sq_head_tail_get(nix, txq_sp->qid, &head, &tail);\n+\n+\tif (nix_offset_has_packet(head, tail, offset, 0))\n+\t\treturn RTE_ETH_TX_DESC_DONE;\n+\telse\n+\t\treturn RTE_ETH_TX_DESC_FULL;\n+}\n+\n /* It is a NOP for cnxk as HW frees the buffer on xmit */\n int\n cnxk_nix_tx_done_cleanup(void *txq, uint32_t free_cnt)\n", "prefixes": [ "2/2" ] }