Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/104942/?format=api
{ "id": 104942, "url": "http://patchwork.dpdk.org/api/patches/104942/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211206121824.3493-15-nipun.gupta@nxp.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211206121824.3493-15-nipun.gupta@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211206121824.3493-15-nipun.gupta@nxp.com", "date": "2021-12-06T12:18:21", "name": "[14/17] net/pfe: disable HW CRC stripping", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cf6030f2a2873ab6b7c40e75c4613aa376f88363", "submitter": { "id": 471, "url": "http://patchwork.dpdk.org/api/people/471/?format=api", "name": "Nipun Gupta", "email": "nipun.gupta@nxp.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211206121824.3493-15-nipun.gupta@nxp.com/mbox/", "series": [ { "id": 20873, "url": "http://patchwork.dpdk.org/api/series/20873/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20873", "date": "2021-12-06T12:18:07", "name": "features and fixes on NXP eth devices", "version": 1, "mbox": "http://patchwork.dpdk.org/series/20873/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/104942/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/104942/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A3661A034F;\n\tMon, 6 Dec 2021 13:20:00 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2BEC74276F;\n\tMon, 6 Dec 2021 13:18:46 +0100 (CET)", "from inva020.nxp.com (inva020.nxp.com [92.121.34.13])\n by mails.dpdk.org (Postfix) with ESMTP id E950C411B6\n for <dev@dpdk.org>; Mon, 6 Dec 2021 13:18:32 +0100 (CET)", "from inva020.nxp.com (localhost [127.0.0.1])\n by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id CC3E11A1333;\n Mon, 6 Dec 2021 13:18:32 +0100 (CET)", "from aprdc01srsp001v.ap-rdc01.nxp.com\n (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16])\n by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 958F31A19B6;\n Mon, 6 Dec 2021 13:18:32 +0100 (CET)", "from lsv03274.swis.in-blr01.nxp.com (lsv03274.swis.in-blr01.nxp.com\n [92.120.147.114])\n by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 0818A183AD05;\n Mon, 6 Dec 2021 20:18:31 +0800 (+08)" ], "From": "nipun.gupta@nxp.com", "To": "dev@dpdk.org", "Cc": "thomas@monjalon.net, ferruh.yigit@intel.com, hemant.agrawal@nxp.com,\n Gagandeep Singh <g.singh@nxp.com>", "Subject": "[PATCH 14/17] net/pfe: disable HW CRC stripping", "Date": "Mon, 6 Dec 2021 17:48:21 +0530", "Message-Id": "<20211206121824.3493-15-nipun.gupta@nxp.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20211206121824.3493-1-nipun.gupta@nxp.com>", "References": "<20211206121824.3493-1-nipun.gupta@nxp.com>", "X-Virus-Scanned": "ClamAV using ClamSMTP", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Gagandeep Singh <g.singh@nxp.com>\n\nLS1012A MAC PCS block has an erratum that is seen with specific\nPHY AR803x. The issue is triggered by the (spec-compliant)\noperation of the AR803x PHY on the LS1012A-FRWY board.\n\nDue to this, good FCS packet is reported as error packet by MAC,\nso for these error packets FCS should be validated and discard\nonly real error packets in PFE engine Rx packet path. Now onwards\nCRC validation will be handled in pfe.ko and DPDK driver can not\nuse CRC Forwarding option.\n\nSigned-off-by: Gagandeep Singh <g.singh@nxp.com>\n---\n drivers/net/pfe/pfe_ethdev.c | 7 +++++--\n drivers/net/pfe/pfe_hal.c | 4 ++--\n 2 files changed, 7 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/net/pfe/pfe_ethdev.c b/drivers/net/pfe/pfe_ethdev.c\nindex 047010e15e..bfcaf51dd9 100644\n--- a/drivers/net/pfe/pfe_ethdev.c\n+++ b/drivers/net/pfe/pfe_ethdev.c\n@@ -1,5 +1,5 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright 2018-2019 NXP\n+ * Copyright 2018-2020 NXP\n */\n \n #include <sys/ioctl.h>\n@@ -422,8 +422,11 @@ pfe_eth_close(struct rte_eth_dev *dev)\n }\n \n static int\n-pfe_eth_configure(struct rte_eth_dev *dev __rte_unused)\n+pfe_eth_configure(struct rte_eth_dev *dev)\n {\n+\tif (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)\n+\t\tPFE_PMD_ERR(\"PMD does not support KEEP_CRC offload\");\n+\n \treturn 0;\n }\n \ndiff --git a/drivers/net/pfe/pfe_hal.c b/drivers/net/pfe/pfe_hal.c\nindex 41d783dbff..f49d1728b2 100644\n--- a/drivers/net/pfe/pfe_hal.c\n+++ b/drivers/net/pfe/pfe_hal.c\n@@ -1,5 +1,5 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright 2018-2019 NXP\n+ * Copyright 2018-2020 NXP\n */\n \n #include <arpa/inet.h>\n@@ -191,7 +191,7 @@ gemac_set_mode(void *base, __rte_unused int mode)\n \tval &= ~EMAC_RCNTRL_LOOP;\n \n \t/*Enable flow control and MII mode*/\n-\tval |= (EMAC_RCNTRL_FCE | EMAC_RCNTRL_MII_MODE | EMAC_RCNTRL_CRC_FWD);\n+\tval |= (EMAC_RCNTRL_FCE | EMAC_RCNTRL_MII_MODE);\n \n \twritel(val, base + EMAC_RCNTRL_REG);\n }\n", "prefixes": [ "14/17" ] }