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GET /api/patches/104950/?format=api
{ "id": 104950, "url": "http://patchwork.dpdk.org/api/patches/104950/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211206163639.2220123-1-rashmi.shetty@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211206163639.2220123-1-rashmi.shetty@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211206163639.2220123-1-rashmi.shetty@intel.com", "date": "2021-12-06T16:36:39", "name": "doc/dlb2: update dlb2 documentation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "eefd1abd2ca6d22a6ecac315f43779cda43be89d", "submitter": { "id": 2381, "url": "http://patchwork.dpdk.org/api/people/2381/?format=api", "name": "Rashmi Shetty", "email": "rashmi.shetty@intel.com" }, "delegate": null, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211206163639.2220123-1-rashmi.shetty@intel.com/mbox/", "series": [ { "id": 20880, "url": "http://patchwork.dpdk.org/api/series/20880/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20880", "date": "2021-12-06T16:36:39", "name": "doc/dlb2: update dlb2 documentation", "version": 1, "mbox": "http://patchwork.dpdk.org/series/20880/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/104950/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/104950/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 83C8FA034F;\n\tMon, 6 Dec 2021 17:37:34 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 09285410E5;\n\tMon, 6 Dec 2021 17:37:34 +0100 (CET)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n by mails.dpdk.org (Postfix) with ESMTP id C8B3E40040\n for <dev@dpdk.org>; Mon, 6 Dec 2021 17:37:31 +0100 (CET)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 06 Dec 2021 08:36:42 -0800", "from txanpdk02.an.intel.com ([10.123.117.76])\n by orsmga008.jf.intel.com with ESMTP; 06 Dec 2021 08:36:41 -0800" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10190\"; a=\"237296122\"", "E=Sophos;i=\"5.87,292,1631602800\"; d=\"scan'208\";a=\"237296122\"", "E=Sophos;i=\"5.87,292,1631602800\"; d=\"scan'208\";a=\"514822967\"" ], "X-ExtLoop1": "1", "From": "Rashmi Shetty <rashmi.shetty@intel.com>", "To": "dev@dpdk.org", "Cc": "jerinj@marvell.com, harry.van.haaren@intel.com, pravin.pathak@intel.com,\n mike.ximing.chen@intel.com, timothy.mcdaniel@intel.com,\n Rashmi Shetty <rashmi.shetty@intel.com>", "Subject": "[PATCH] doc/dlb2: update dlb2 documentation", "Date": "Mon, 6 Dec 2021 10:36:39 -0600", "Message-Id": "<20211206163639.2220123-1-rashmi.shetty@intel.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Number of direct credits, atomic inflight and history list sizes\nare updated to what is supported in DLB2.0. Revised Class of Service\nsection is added.\n\nSigned-off-by: Rashmi Shetty <rashmi.shetty@intel.com>\n---\n doc/guides/eventdevs/dlb2.rst | 32 +++++++++++---------------------\n 1 file changed, 11 insertions(+), 21 deletions(-)", "diff": "diff --git a/doc/guides/eventdevs/dlb2.rst b/doc/guides/eventdevs/dlb2.rst\nindex bce984ca08..c2887a71dc 100644\n--- a/doc/guides/eventdevs/dlb2.rst\n+++ b/doc/guides/eventdevs/dlb2.rst\n@@ -151,7 +151,7 @@ load-balanced queues, and directed credits are used for directed queues.\n These pools' sizes are controlled by the nb_events_limit field in struct\n rte_event_dev_config. The load-balanced pool is sized to contain\n nb_events_limit credits, and the directed pool is sized to contain\n-nb_events_limit/4 credits. The directed pool size can be overridden with the\n+nb_events_limit/2 credits. The directed pool size can be overridden with the\n num_dir_credits devargs argument, like so:\n \n .. code-block:: console\n@@ -239,8 +239,8 @@ queue A.\n Due to this, workers should stop retrying after a time, release the events it\n is attempting to enqueue, and dequeue more events. It is important that the\n worker release the events and don't simply set them aside to retry the enqueue\n-again later, because the port has limited history list size (by default, twice\n-the port's dequeue_depth).\n+again later, because the port has limited history list size (by default, same\n+as port's dequeue_depth).\n \n Priority\n ~~~~~~~~\n@@ -309,17 +309,11 @@ scheduled. The likelihood of this case depends on the eventdev configuration,\n traffic behavior, event processing latency, potential for a worker to be\n interrupted or otherwise delayed, etc.\n \n-By default, the PMD allocates 16 buffer entries for each load-balanced queue,\n-which provides an even division across all 128 queues but potentially wastes\n+By default, the PMD allocates 64 buffer entries for each load-balanced queue,\n+which provides an even division across all 32 queues but potentially wastes\n buffer space (e.g. if not all queues are used, or aren't used for atomic\n scheduling).\n \n-The PMD provides a dev arg to override the default per-queue allocation. To\n-increase per-queue atomic-inflight allocation to (for example) 64:\n-\n- .. code-block:: console\n-\n- --allow ea:00.0,atm_inflights=64\n \n QID Depth Threshold\n ~~~~~~~~~~~~~~~~~~~\n@@ -337,7 +331,7 @@ Per queue threshold metrics are tracked in the DLB xstats, and are also\n returned in the impl_opaque field of each received event.\n \n The per qid threshold can be specified as part of the device args, and\n-can be applied to all queue, a range of queues, or a single queue, as\n+can be applied to all queues, a range of queues, or a single queue, as\n shown below.\n \n .. code-block:: console\n@@ -350,14 +344,10 @@ Class of service\n ~~~~~~~~~~~~~~~~\n \n DLB supports provisioning the DLB bandwidth into 4 classes of service.\n+By default, each of the 4 classes (0-3) correspond to 25% of the DLB\n+hardware bandwidth.\n \n-- Class 4 corresponds to 40% of the DLB hardware bandwidth\n-- Class 3 corresponds to 30% of the DLB hardware bandwidth\n-- Class 2 corresponds to 20% of the DLB hardware bandwidth\n-- Class 1 corresponds to 10% of the DLB hardware bandwidth\n-- Class 0 corresponds to don't care\n-\n-The classes are applied globally to the set of ports contained in this\n+The classes are applied globally to the set of ports contained in the\n scheduling domain, which is more appropriate for the bifurcated\n PMD than for the PF PMD, since the PF PMD supports just 1 scheduling\n domain.\n@@ -366,7 +356,7 @@ Class of service can be specified in the devargs, as follows\n \n .. code-block:: console\n \n- --allow ea:00.0,cos=<0..4>\n+ --allow ea:00.0,cos=<0..3>\n \n Use X86 Vector Instructions\n ~~~~~~~~~~~~~~~~~~~~~~~~~~~\n@@ -379,4 +369,4 @@ follows\n \n .. code-block:: console\n \n- --allow ea:00.0,vector_opts_enabled=<y/Y>\n+ --allow ea:00.0,vector_opts_enable=<y/Y>\n", "prefixes": [] }