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GET /api/patches/105026/?format=api
{ "id": 105026, "url": "http://patchwork.dpdk.org/api/patches/105026/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211208145134.171137-1-michaelba@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211208145134.171137-1-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211208145134.171137-1-michaelba@nvidia.com", "date": "2021-12-08T14:51:34", "name": "net/mlx5: fix the memory socket selection in ASO management", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "a4475f37765b101c7ee85580278d416283a1896d", "submitter": { "id": 1949, "url": "http://patchwork.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211208145134.171137-1-michaelba@nvidia.com/mbox/", "series": [ { "id": 20894, "url": "http://patchwork.dpdk.org/api/series/20894/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=20894", "date": "2021-12-08T14:51:34", "name": "net/mlx5: fix the memory socket selection in ASO management", "version": 1, "mbox": "http://patchwork.dpdk.org/series/20894/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/105026/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/105026/checks/", "tags": {}, "related": [], "headers": { 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"Subject": "[PATCH] net/mlx5: fix the memory socket selection in ASO management", "Date": "Wed, 8 Dec 2021 16:51:34 +0200", "Message-ID": "<20211208145134.171137-1-michaelba@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.5]", "X-ClientProxiedBy": "HQMAIL101.nvidia.com (172.20.187.10) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "82e39c78-eedb-48a0-2950-08d9ba5a5109", "X-MS-TrafficTypeDiagnostic": "DM6PR12MB4300:EE_", "X-Microsoft-Antispam-PRVS": "\n <DM6PR12MB430065C3002B1B5CFDD6F7A2CC6F9@DM6PR12MB4300.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:669;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 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SFS:(4636009)(46966006)(36840700001)(40470700001)(70206006)(6916009)(36860700001)(8676002)(356005)(70586007)(7636003)(5660300002)(1076003)(336012)(47076005)(426003)(2876002)(186003)(16526019)(2616005)(508600001)(40460700001)(83380400001)(26005)(7696005)(2906002)(34070700002)(86362001)(4326008)(36756003)(55016003)(316002)(6286002)(6666004)(450100002)(8936002)(82310400004)(54906003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "08 Dec 2021 14:52:11.4092 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 82e39c78-eedb-48a0-2950-08d9ba5a5109", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[203.18.50.14];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT046.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR12MB4300", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Michael Baum <michaelba@nvidia.com>\n\nIn ASO objects creation (WQE, CQE and MR), socket number is given as\na parameter.\n\nThe selection was wrongly socket 0 hardcoded even if the user didn't\nconfigure memory for this socket.\n\nThis patch replaces the selection to default socket (SOCKET_ID_ANY).\n\nFixes: f935ed4b645a (\"net/mlx5: support flow hit action for aging\")\nCc: stable@dpdk.org\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow_aso.c | 117 +++++++++----------------------\n 1 file changed, 32 insertions(+), 85 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_aso.c b/drivers/net/mlx5/mlx5_flow_aso.c\nindex ddf4328dec..eb7fc43da3 100644\n--- a/drivers/net/mlx5/mlx5_flow_aso.c\n+++ b/drivers/net/mlx5/mlx5_flow_aso.c\n@@ -13,50 +13,6 @@\n #include \"mlx5.h\"\n #include \"mlx5_flow.h\"\n \n-/**\n- * Destroy Completion Queue used for ASO access.\n- *\n- * @param[in] cq\n- * ASO CQ to destroy.\n- */\n-static void\n-mlx5_aso_cq_destroy(struct mlx5_aso_cq *cq)\n-{\n-\tif (cq->cq_obj.cq)\n-\t\tmlx5_devx_cq_destroy(&cq->cq_obj);\n-\tmemset(cq, 0, sizeof(*cq));\n-}\n-\n-/**\n- * Create Completion Queue used for ASO access.\n- *\n- * @param[in] ctx\n- * Context returned from mlx5 open_device() glue function.\n- * @param[in/out] cq\n- * Pointer to CQ to create.\n- * @param[in] log_desc_n\n- * Log of number of descriptors in queue.\n- * @param[in] socket\n- * Socket to use for allocation.\n- * @param[in] uar_page_id\n- * UAR page ID to use.\n- *\n- * @return\n- * 0 on success, a negative errno value otherwise and rte_errno is set.\n- */\n-static int\n-mlx5_aso_cq_create(void *ctx, struct mlx5_aso_cq *cq, uint16_t log_desc_n,\n-\t\t int socket, int uar_page_id)\n-{\n-\tstruct mlx5_devx_cq_attr attr = {\n-\t\t.uar_page_id = uar_page_id,\n-\t};\n-\n-\tcq->log_desc_n = log_desc_n;\n-\tcq->cq_ci = 0;\n-\treturn mlx5_devx_cq_create(ctx, &cq->cq_obj, log_desc_n, &attr, socket);\n-}\n-\n /**\n * Free MR resources.\n *\n@@ -84,21 +40,18 @@ mlx5_aso_dereg_mr(struct mlx5_common_device *cdev, struct mlx5_pmd_mr *mr)\n * Size of MR buffer.\n * @param[in/out] mr\n * Pointer to MR to create.\n- * @param[in] socket\n- * Socket to use for allocation.\n *\n * @return\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n static int\n mlx5_aso_reg_mr(struct mlx5_common_device *cdev, size_t length,\n-\t\tstruct mlx5_pmd_mr *mr, int socket)\n+\t\tstruct mlx5_pmd_mr *mr)\n {\n-\n \tint ret;\n \n \tmr->addr = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, length, 4096,\n-\t\t\t socket);\n+\t\t\t SOCKET_ID_ANY);\n \tif (!mr->addr) {\n \t\tDRV_LOG(ERR, \"Failed to create ASO bits mem for MR.\");\n \t\treturn -1;\n@@ -122,7 +75,7 @@ static void\n mlx5_aso_destroy_sq(struct mlx5_aso_sq *sq)\n {\n \tmlx5_devx_sq_destroy(&sq->sq_obj);\n-\tmlx5_aso_cq_destroy(&sq->cq);\n+\tmlx5_devx_cq_destroy(&sq->cq.cq_obj);\n \tmemset(sq, 0, sizeof(*sq));\n }\n \n@@ -226,35 +179,31 @@ mlx5_aso_ct_init_sq(struct mlx5_aso_sq *sq)\n /**\n * Create Send Queue used for ASO access.\n *\n- * @param[in] ctx\n- * Context returned from mlx5 open_device() glue function.\n+ * @param[in] cdev\n+ * Pointer to the mlx5 common device.\n * @param[in/out] sq\n * Pointer to SQ to create.\n- * @param[in] socket\n- * Socket to use for allocation.\n * @param[in] uar\n * User Access Region object.\n- * @param[in] pdn\n- * Protection Domain number to use.\n- * @param[in] log_desc_n\n- * Log of number of descriptors in queue.\n- * @param[in] ts_format\n- * timestamp format supported by the queue.\n *\n * @return\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n static int\n-mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq, int socket, void *uar,\n-\t\t uint32_t pdn, uint16_t log_desc_n, uint32_t ts_format)\n+mlx5_aso_sq_create(struct mlx5_common_device *cdev, struct mlx5_aso_sq *sq,\n+\t\t void *uar)\n {\n-\tstruct mlx5_devx_create_sq_attr attr = {\n+\tstruct mlx5_devx_cq_attr cq_attr = {\n+\t\t.uar_page_id = mlx5_os_get_devx_uar_page_id(uar),\n+\t};\n+\tstruct mlx5_devx_create_sq_attr sq_attr = {\n \t\t.user_index = 0xFFFF,\n \t\t.wq_attr = (struct mlx5_devx_wq_attr){\n-\t\t\t.pd = pdn,\n+\t\t\t.pd = cdev->pdn,\n \t\t\t.uar_page = mlx5_os_get_devx_uar_page_id(uar),\n \t\t},\n-\t\t.ts_format = mlx5_ts_format_conv(ts_format),\n+\t\t.ts_format =\n+\t\t\tmlx5_ts_format_conv(cdev->config.hca_attr.sq_ts_format),\n \t};\n \tstruct mlx5_devx_modify_sq_attr modify_attr = {\n \t\t.state = MLX5_SQC_STATE_RDY,\n@@ -262,14 +211,18 @@ mlx5_aso_sq_create(void *ctx, struct mlx5_aso_sq *sq, int socket, void *uar,\n \tuint16_t log_wqbb_n;\n \tint ret;\n \n-\tif (mlx5_aso_cq_create(ctx, &sq->cq, log_desc_n, socket,\n-\t\t\t mlx5_os_get_devx_uar_page_id(uar)))\n+\tif (mlx5_devx_cq_create(cdev->ctx, &sq->cq.cq_obj,\n+\t\t\t\tMLX5_ASO_QUEUE_LOG_DESC, &cq_attr,\n+\t\t\t\tSOCKET_ID_ANY))\n \t\tgoto error;\n-\tsq->log_desc_n = log_desc_n;\n-\tattr.cqn = sq->cq.cq_obj.cq->id;\n+\tsq->cq.cq_ci = 0;\n+\tsq->cq.log_desc_n = MLX5_ASO_QUEUE_LOG_DESC;\n+\tsq->log_desc_n = MLX5_ASO_QUEUE_LOG_DESC;\n+\tsq_attr.cqn = sq->cq.cq_obj.cq->id;\n \t/* for mlx5_aso_wqe that is twice the size of mlx5_wqe */\n-\tlog_wqbb_n = log_desc_n + 1;\n-\tret = mlx5_devx_sq_create(ctx, &sq->sq_obj, log_wqbb_n, &attr, socket);\n+\tlog_wqbb_n = sq->log_desc_n + 1;\n+\tret = mlx5_devx_sq_create(cdev->ctx, &sq->sq_obj, log_wqbb_n, &sq_attr,\n+\t\t\t\t SOCKET_ID_ANY);\n \tif (ret) {\n \t\tDRV_LOG(ERR, \"Can't create SQ object.\");\n \t\trte_errno = ENOMEM;\n@@ -313,34 +266,28 @@ mlx5_aso_queue_init(struct mlx5_dev_ctx_shared *sh,\n \tswitch (aso_opc_mod) {\n \tcase ASO_OPC_MOD_FLOW_HIT:\n \t\tif (mlx5_aso_reg_mr(cdev, (MLX5_ASO_AGE_ACTIONS_PER_POOL / 8) *\n-\t\t\t\t sq_desc_n, &sh->aso_age_mng->aso_sq.mr, 0))\n+\t\t\t\t sq_desc_n, &sh->aso_age_mng->aso_sq.mr))\n \t\t\treturn -1;\n-\t\tif (mlx5_aso_sq_create(cdev->ctx, &sh->aso_age_mng->aso_sq, 0,\n-\t\t\t\t sh->tx_uar.obj, cdev->pdn,\n-\t\t\t\t MLX5_ASO_QUEUE_LOG_DESC,\n-\t\t\t\t cdev->config.hca_attr.sq_ts_format)) {\n+\t\tif (mlx5_aso_sq_create(cdev, &sh->aso_age_mng->aso_sq,\n+\t\t\t\t sh->tx_uar.obj)) {\n \t\t\tmlx5_aso_dereg_mr(cdev, &sh->aso_age_mng->aso_sq.mr);\n \t\t\treturn -1;\n \t\t}\n \t\tmlx5_aso_age_init_sq(&sh->aso_age_mng->aso_sq);\n \t\tbreak;\n \tcase ASO_OPC_MOD_POLICER:\n-\t\tif (mlx5_aso_sq_create(cdev->ctx, &sh->mtrmng->pools_mng.sq, 0,\n-\t\t\t\t sh->tx_uar.obj, cdev->pdn,\n-\t\t\t\t MLX5_ASO_QUEUE_LOG_DESC,\n-\t\t\t\t cdev->config.hca_attr.sq_ts_format))\n+\t\tif (mlx5_aso_sq_create(cdev, &sh->mtrmng->pools_mng.sq,\n+\t\t\t\t sh->tx_uar.obj))\n \t\t\treturn -1;\n \t\tmlx5_aso_mtr_init_sq(&sh->mtrmng->pools_mng.sq);\n \t\tbreak;\n \tcase ASO_OPC_MOD_CONNECTION_TRACKING:\n \t\t/* 64B per object for query. */\n \t\tif (mlx5_aso_reg_mr(cdev, 64 * sq_desc_n,\n-\t\t\t\t &sh->ct_mng->aso_sq.mr, 0))\n+\t\t\t\t &sh->ct_mng->aso_sq.mr))\n \t\t\treturn -1;\n-\t\tif (mlx5_aso_sq_create(cdev->ctx, &sh->ct_mng->aso_sq, 0,\n-\t\t\t\t sh->tx_uar.obj, cdev->pdn,\n-\t\t\t\t MLX5_ASO_QUEUE_LOG_DESC,\n-\t\t\t\t cdev->config.hca_attr.sq_ts_format)) {\n+\t\tif (mlx5_aso_sq_create(cdev, &sh->ct_mng->aso_sq,\n+\t\t\t\t sh->tx_uar.obj)) {\n \t\t\tmlx5_aso_dereg_mr(cdev, &sh->ct_mng->aso_sq.mr);\n \t\t\treturn -1;\n \t\t}\n", "prefixes": [] }