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GET /api/patches/105497/?format=api
{ "id": 105497, "url": "http://patchwork.dpdk.org/api/patches/105497/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211230030817.15264-2-xiazhang@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211230030817.15264-2-xiazhang@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211230030817.15264-2-xiazhang@nvidia.com", "date": "2021-12-30T03:08:15", "name": "[RFC,1/3] ethdev: support GRE optional fields", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "06d0de50d3a096341fc2d246f8d45bf2c3a12ce7", "submitter": { "id": 2383, "url": "http://patchwork.dpdk.org/api/people/2383/?format=api", "name": "Sean Zhang", "email": "xiazhang@nvidia.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211230030817.15264-2-xiazhang@nvidia.com/mbox/", "series": [ { "id": 21039, "url": "http://patchwork.dpdk.org/api/series/21039/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21039", "date": "2021-12-30T03:08:14", "name": "Add support for GRE optional fields matching", "version": 1, "mbox": "http://patchwork.dpdk.org/series/21039/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/105497/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/105497/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A7C35A00C2;\n\tThu, 30 Dec 2021 04:08:47 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A8AC141104;\n\tThu, 30 Dec 2021 04:08:43 +0100 (CET)", "from NAM12-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam12on2045.outbound.protection.outlook.com [40.107.243.45])\n by mails.dpdk.org (Postfix) with ESMTP id 7AE7E410E6\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Sean Zhang <xiazhang@nvidia.com>", "To": "<orika@nvidia.com>, <matan@nvidia.com>, Thomas Monjalon\n <thomas@monjalon.net>, Ferruh Yigit <ferruh.yigit@intel.com>, \"Andrew\n Rybchenko\" <andrew.rybchenko@oktetlabs.ru>", "CC": "<dev@dpdk.org>", "Subject": "[RFC 1/3] ethdev: support GRE optional fields", "Date": "Thu, 30 Dec 2021 05:08:15 +0200", "Message-ID": "<20211230030817.15264-2-xiazhang@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20211230030817.15264-1-xiazhang@nvidia.com>", "References": "<20211230030817.15264-1-xiazhang@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL111.nvidia.com (172.20.187.18) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "4e9acb27-72c3-4c75-ffac-08d9cb41ace5", "X-MS-TrafficTypeDiagnostic": "DM6PR12MB4298:EE_", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <DM6PR12MB42989DC4283FAC7CDE5ABAD8A2459@DM6PR12MB4298.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:9508;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n opVA75uDmfuDmEZcazWXIQaKc6jL2HDFuSfhgk37teo837Zfd56qb+HAgZsGQ/rUgMIUZFM7nVwznXYtzMOZzeVzXq5w1vyBHHWRqIhOB9luxh4Cyifcl9XiIXU1r4Dgv/ZsLTE1ExJ7lxCFHBE5kLlWxPZ8NwO1d46Ww+JepuEEiUg4XwnhTIIx90sNTTsq3VmY1ORyJQYXok4T2w6Rnq4VONH9QSHJyB4BhPSU9IdoCkNjex6BD0cXPQv3WMX28YAwsr2shBkNZ4BKLtH9uZGBHKPaFgrMBUSNe/xiHFd7uF2EBMZCf/076ERvakN+mqT5xjY61SFgN85+a6CtLF9MIAZBZkILChubskbFLlvt2Ws44mzQSJKG80E/ipP/x11qS/LKRg6A33Ygcymb2iD13GJFNTXb4yHmtXalqIN6obbc4htPyqTh4zc8M09iGAXd00UJgTjI2f8fa5WQBMLFLwmBv7PKAN53nejJQLPi2bmaNbNZLZmaedrLeYe5uug4W/MZ3AlXOneJJa1fVxIOX0YETsCPwIAT7Xe4vEDdBkTIc8unolhWz6Jn2UZW70nprMcI7yYu7LacNe99MObt4F66mPUTZQXPPhE1VYZY0tCxxYMK3gitdCuQWGOORtnFZipeEjZKm1kRJZMcuwkrTooMMaj+2pmyyKb3hD14t58y+WANSITC1HQk4k8OpSEOGL+7QlY8NvvFW4hbpt/PHQLIytXeDBxbdi3M+KGpGtDvZOqLP1bREo9rRlYScGq9ytmWmAv4sc33wgxjoeds+aRcxV0mEM2wPMZPty0=", "X-Forefront-Antispam-Report": "CIP:12.22.5.234; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(4636009)(46966006)(40470700002)(36840700001)(7696005)(8676002)(186003)(81166007)(47076005)(86362001)(70206006)(8936002)(426003)(36860700001)(70586007)(6286002)(508600001)(16526019)(26005)(55016003)(336012)(2616005)(6666004)(4326008)(110136005)(316002)(40460700001)(82310400004)(356005)(36756003)(5660300002)(1076003)(2906002)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Dec 2021 03:08:38.2609 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 4e9acb27-72c3-4c75-ffac-08d9cb41ace5", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.234];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT006.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR12MB4298", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add flow pattern items and header format for matching optional fields\n(checksum/key/sequence) in GRE header. And the flags in gre item should\nbe correspondingly set with the new added items.\n\nSigned-off-by: Sean Zhang <xiazhang@nvidia.com>\n---\n doc/guides/prog_guide/rte_flow.rst | 16 ++++++++++++++++\n lib/ethdev/rte_flow.c | 1 +\n lib/ethdev/rte_flow.h | 18 ++++++++++++++++++\n 3 files changed, 35 insertions(+)", "diff": "diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst\nindex c51ed88..48d5685 100644\n--- a/doc/guides/prog_guide/rte_flow.rst\n+++ b/doc/guides/prog_guide/rte_flow.rst\n@@ -1113,6 +1113,22 @@ This should be preceded by item ``GRE``.\n - Value to be matched is a big-endian 32 bit integer.\n - When this item present it implicitly match K bit in default mask as \"1\"\n \n+Item: ``GRE_OPTION``\n+^^^^^^^^^^^^^^^^^^^^\n+\n+Matches a GRE optional fields (checksum/key/sequence).\n+This should be preceded by item ``GRE``.\n+\n+- ``checksum``: checksum.\n+- ``key``: key.\n+- ``sequence``: sequence.\n+- The items in GRE_OPTION do not change bit flags(c_bit/k_bit/s_bit) in GRE\n+ item. The bit flags need be set with GRE item by application. When the items\n+ present, the corresponding bits in GRE spec and mask should be set \"1\" by\n+ application, it means to match specified value of the fields. When the items\n+ no present, but the corresponding bits in GRE spec and mask is \"1\", it means\n+ to match any value of the fields.\n+\n Item: ``FUZZY``\n ^^^^^^^^^^^^^^^\n \ndiff --git a/lib/ethdev/rte_flow.c b/lib/ethdev/rte_flow.c\nindex a93f68a..03bd1df 100644\n--- a/lib/ethdev/rte_flow.c\n+++ b/lib/ethdev/rte_flow.c\n@@ -139,6 +139,7 @@ struct rte_flow_desc_data {\n \tMK_FLOW_ITEM(META, sizeof(struct rte_flow_item_meta)),\n \tMK_FLOW_ITEM(TAG, sizeof(struct rte_flow_item_tag)),\n \tMK_FLOW_ITEM(GRE_KEY, sizeof(rte_be32_t)),\n+\tMK_FLOW_ITEM(GRE_OPTION, sizeof(struct rte_gre_hdr_option)),\n \tMK_FLOW_ITEM(GTP_PSC, sizeof(struct rte_flow_item_gtp_psc)),\n \tMK_FLOW_ITEM(PPPOES, sizeof(struct rte_flow_item_pppoe)),\n \tMK_FLOW_ITEM(PPPOED, sizeof(struct rte_flow_item_pppoe)),\ndiff --git a/lib/ethdev/rte_flow.h b/lib/ethdev/rte_flow.h\nindex 1031fb2..27b4140 100644\n--- a/lib/ethdev/rte_flow.h\n+++ b/lib/ethdev/rte_flow.h\n@@ -660,6 +660,13 @@ enum rte_flow_item_type {\n \t * See struct rte_flow_item_ppp.\n \t */\n \tRTE_FLOW_ITEM_TYPE_PPP,\n+\n+\t/**\n+\t * Matches GRE optional fields.\n+\t *\n+\t * See struct rte_gre_hdr_option.\n+\t */\n+\tRTE_FLOW_ITEM_TYPE_GRE_OPTION,\n };\n \n /**\n@@ -1196,6 +1203,17 @@ struct rte_flow_item_gre {\n #endif\n \n /**\n+ * RTE_FLOW_ITEM_TYPE_GRE_OPTION.\n+ *\n+ * Matches GRE optional fields in header.\n+ */\n+struct rte_gre_hdr_option {\n+\trte_be16_t checksum;\n+\trte_be32_t key;\n+\trte_be32_t sequence;\n+};\n+\n+/**\n * RTE_FLOW_ITEM_TYPE_FUZZY\n *\n * Fuzzy pattern match, expect faster than default.\n", "prefixes": [ "RFC", "1/3" ] }