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GET /api/patches/105498/?format=api
{ "id": 105498, "url": "http://patchwork.dpdk.org/api/patches/105498/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20211230030817.15264-3-xiazhang@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211230030817.15264-3-xiazhang@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211230030817.15264-3-xiazhang@nvidia.com", "date": "2021-12-30T03:08:16", "name": "[RFC,2/3] app/testpmd: add gre_option item command", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e6d6e5f6cf323f6a24aacc8e866b520cbe579bd7", "submitter": { "id": 2383, "url": "http://patchwork.dpdk.org/api/people/2383/?format=api", "name": "Sean Zhang", "email": "xiazhang@nvidia.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20211230030817.15264-3-xiazhang@nvidia.com/mbox/", "series": [ { "id": 21039, "url": "http://patchwork.dpdk.org/api/series/21039/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21039", "date": "2021-12-30T03:08:14", "name": "Add support for GRE optional fields matching", "version": 1, "mbox": "http://patchwork.dpdk.org/series/21039/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/105498/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/105498/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B7DFAA00C2;\n\tThu, 30 Dec 2021 04:08:53 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B686141141;\n\tThu, 30 Dec 2021 04:08:45 +0100 (CET)", "from NAM11-CO1-obe.outbound.protection.outlook.com\n (mail-co1nam11on2084.outbound.protection.outlook.com [40.107.220.84])\n by mails.dpdk.org (Postfix) with ESMTP id C99404113D\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Sean Zhang <xiazhang@nvidia.com>", "To": "<orika@nvidia.com>, <matan@nvidia.com>, Xiaoyun Li <xiaoyun.li@intel.com>,\n Aman Singh <aman.deep.singh@intel.com>", "CC": "<thomas@monjalon.net>, <dev@dpdk.org>", "Subject": "[RFC 2/3] app/testpmd: add gre_option item command", "Date": "Thu, 30 Dec 2021 05:08:16 +0200", "Message-ID": "<20211230030817.15264-3-xiazhang@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20211230030817.15264-1-xiazhang@nvidia.com>", "References": "<20211230030817.15264-1-xiazhang@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL111.nvidia.com (172.20.187.18) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "262e1065-b6ac-43f2-2db1-08d9cb41ae45", "X-MS-TrafficTypeDiagnostic": "CY4PR12MB1671:EE_", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <CY4PR12MB16710461AD15FDC819EF0509A2459@CY4PR12MB1671.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:8882;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n aOZnfQNg0C+VaCnIDIJI27P0uyenmgupMAETcsSzwMHJx+V8GkbHQf9pe/ikfBp4JkTcRz51DrWbmXV7HJ/8nOKSbd+9NRYkyOj7mAKOoLs7O96cZAwLrnY9gCaQcV09XxA9+K7PVWBjEGet3ErWK5SJozNnMRcExtBj3I/5q03hNFqtLrqbXOx83NqQyYfVm8ECjLm8Nd/fhsr05EcmxWv12GrAPC5N5pkJ37gdpLLxrk5kGqYJsaFh3uJ2iFgSq3qRIVkWVtbtHf9QuFZtTjG/OTPYV/CuNGQi0fntP/LMjxYb81bckKy6xl9gvXsdls8jeOD//gWVhxLcJ6VMLRLEiTvVhdIlSBMpONsJeT8OnurrSp8MUIulxl9cocJkKOKZUnR7HgAaWcfxUBqYnRoDMJRWa8U+/INu+ERg/oP35+ZA3yzsz88BFzjB8YVAOJxTfUE+yFCviOPNjRADN4BI6GUd8k28ACNldOUQgRomeU89mnotwM1yftxcQVvS4JLGAUVTNcWoGX+IZH8PllA3piM+zj65GrSH2vGI/io3Sk5/ow4MgGuz+QS6d7koHqdzFyQYDuZ1F6GpnVGN4/kPihvOWchFdp2Dnm8FWUh/pigKMpn9Opu0KIcpxUOLrEVlNScQAxRb9BpA1p4ZDS361H7CqR9Tu0s+fbxaOhGTza8kjLOJvydCgptSQC3u/KYXh5EcaD9DrUQLNQGJ/DvEqUF7fefhLGOIZkUr4595K6f7LVNV0cnN3JCF58EHbBORBTUSTNQwPMIV13Udbiev5/E0Txg9Eh6oJ2e7SWQ=", "X-Forefront-Antispam-Report": "CIP:12.22.5.236; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(4636009)(36840700001)(40470700002)(46966006)(47076005)(6286002)(36860700001)(4326008)(54906003)(81166007)(86362001)(356005)(2906002)(110136005)(7696005)(40460700001)(70206006)(2616005)(8676002)(8936002)(316002)(508600001)(36756003)(70586007)(336012)(16526019)(55016003)(1076003)(26005)(426003)(82310400004)(5660300002)(6666004)(186003)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Dec 2021 03:08:40.5467 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 262e1065-b6ac-43f2-2db1-08d9cb41ae45", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT052.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY4PR12MB1671", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add gre_option command for matching optional fields(checksum/key/sequence)\nin GRE header. The item must follow gre item, and the item does not\nchange the flags in gre item, the application should set the flags in\ngre item correspondingly.\nApplication can still use gre_key item 'gre_key value is xx' for key\nmatching, the effect is the same with using 'gre_option key is xx'.\n\nThe examples for gre_option are as follows:\n\nTo match on checksum field with value 0x11:\ntestpmd> ... pattern / eth / gre c_bit is 1 / gre_option checksum is\n\t\t0x11 / end ..\n\nTo match on checksum field with value 0x11 and any value of key:\ntestpmd> ... pattern / eth / gre c_bit is 1 k_bit is 1 / gre_option\n\t\tchecksum is 0x11 / end ..\n\nTo match on checksum field with value 0x11 and no key field in packet:\ntestpmd> ... pattern / eth / gre c_bit is 1 k_bit is 0 / gre_option\n\t\tchecksum is 0x11 / end ..\n\nThe invalid patterns for gre_option are as follows:\n\ntestpmd> ... pattern / eth / gre / gre_option checksum is 0x11 / end ..\n\t\t(c_bit in gre item not present)\ntestpmd> ... pattern / eth / gre c_bit is 0 / gre_option checksum is 0x11 /\n\t\tend .. (c_bit is unset for gre item, but checksum is\n\t\tspecified by gre_option item)\n\nSigned-off-by: Sean Zhang <xiazhang@nvidia.com>\n---\n app/test-pmd/cmdline_flow.c | 57 +++++++++++++++++++++++++++++\n doc/guides/testpmd_app_ug/testpmd_funcs.rst | 6 +++\n 2 files changed, 63 insertions(+)", "diff": "diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c\nindex bbe3dc0..4e714c2 100644\n--- a/app/test-pmd/cmdline_flow.c\n+++ b/app/test-pmd/cmdline_flow.c\n@@ -271,6 +271,10 @@ enum index {\n \tITEM_META_DATA,\n \tITEM_GRE_KEY,\n \tITEM_GRE_KEY_VALUE,\n+\tITEM_GRE_OPTION,\n+\tITEM_GRE_OPTION_CHECKSUM,\n+\tITEM_GRE_OPTION_KEY,\n+\tITEM_GRE_OPTION_SEQUENCE,\n \tITEM_GTP_PSC,\n \tITEM_GTP_PSC_QFI,\n \tITEM_GTP_PSC_PDU_T,\n@@ -1042,6 +1046,7 @@ struct parse_action_priv {\n \tITEM_ICMP6_ND_OPT_TLA_ETH,\n \tITEM_META,\n \tITEM_GRE_KEY,\n+\tITEM_GRE_OPTION,\n \tITEM_GTP_PSC,\n \tITEM_PPPOES,\n \tITEM_PPPOED,\n@@ -1232,6 +1237,14 @@ struct parse_action_priv {\n \tZERO,\n };\n \n+static const enum index item_gre_option[] = {\n+\tITEM_GRE_OPTION_CHECKSUM,\n+\tITEM_GRE_OPTION_KEY,\n+\tITEM_GRE_OPTION_SEQUENCE,\n+\tITEM_NEXT,\n+\tZERO,\n+};\n+\n static const enum index item_gtp[] = {\n \tITEM_GTP_FLAGS,\n \tITEM_GTP_MSG_TYPE,\n@@ -3479,6 +3492,37 @@ static int comp_set_modify_field_id(struct context *, const struct token *,\n \t\t\t item_param),\n \t\t.args = ARGS(ARG_ENTRY_HTON(rte_be32_t)),\n \t},\n+\t[ITEM_GRE_OPTION] = {\n+\t\t.name = \"gre_option\",\n+\t\t.help = \"match GRE optional fields\",\n+\t\t.priv = PRIV_ITEM(GRE_OPTION, sizeof(struct rte_gre_hdr_option)),\n+\t\t.next = NEXT(item_gre_option),\n+\t\t.call = parse_vc,\n+\t},\n+\t[ITEM_GRE_OPTION_CHECKSUM] = {\n+\t\t.name = \"checksum\",\n+\t\t.help = \"match GRE checksum\",\n+\t\t.next = NEXT(item_gre_option, NEXT_ENTRY(COMMON_UNSIGNED),\n+\t\t\t item_param),\n+\t\t.args = ARGS(ARGS_ENTRY_HTON(struct rte_gre_hdr_option,\n+\t\t\t\t\t checksum)),\n+\t},\n+\t[ITEM_GRE_OPTION_KEY] = {\n+\t\t.name = \"key\",\n+\t\t.help = \"match GRE key\",\n+\t\t.next = NEXT(item_gre_option, NEXT_ENTRY(COMMON_UNSIGNED),\n+\t\t\t item_param),\n+\t\t.args = ARGS(ARGS_ENTRY_HTON(struct rte_gre_hdr_option,\n+\t\t\t\t\t key)),\n+\t},\n+\t[ITEM_GRE_OPTION_SEQUENCE] = {\n+\t\t.name = \"sequence\",\n+\t\t.help = \"match GRE sequence\",\n+\t\t.next = NEXT(item_gre_option, NEXT_ENTRY(COMMON_UNSIGNED),\n+\t\t\t item_param),\n+\t\t.args = ARGS(ARGS_ENTRY_HTON(struct rte_gre_hdr_option,\n+\t\t\t\t\t sequence)),\n+\t},\n \t[ITEM_GTP_PSC] = {\n \t\t.name = \"gtp_psc\",\n \t\t.help = \"match GTP extension header with type 0x85\",\n@@ -9235,6 +9279,19 @@ static int comp_set_modify_field_id(struct context *, const struct token *,\n \t\t\t\t((const struct rte_flow_item_flex *)\n \t\t\t\titem->spec)->length : 0;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_GRE_OPTION:\n+\t\t\tsize = 0;\n+\t\t\tif (item->spec) {\n+\t\t\t\tconst struct rte_gre_hdr_option *opt = item->spec;\n+\t\t\t\tif (opt->checksum)\n+\t\t\t\t\tsize += 4;\n+\t\t\t\tif (opt->key)\n+\t\t\t\t\tsize += 4;\n+\t\t\t\tif (opt->sequence)\n+\t\t\t\t\tsize += 4;\n+\t\t\t}\n+\t\t\tproto = 0x2F;\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\tfprintf(stderr, \"Error - Not supported item\\n\");\n \t\t\tgoto error;\ndiff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst b/doc/guides/testpmd_app_ug/testpmd_funcs.rst\nindex 44228cd..b49e93c 100644\n--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst\n+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst\n@@ -3714,6 +3714,12 @@ This section lists supported pattern items and their attributes, if any.\n \n - ``value {unsigned}``: key value.\n \n+- ``gre_option``: match GRE optional fields(checksum/key/sequence).\n+\n+ - ``checksum {unsigned}``: checksum value.\n+ - ``key {unsigned}``: key value.\n+ - ``sequence {unsigned}``: sequence number value.\n+\n - ``fuzzy``: fuzzy pattern match, expect faster than default.\n \n - ``thresh {unsigned}``: accuracy threshold.\n", "prefixes": [ "RFC", "2/3" ] }