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GET /api/patches/105595/?format=api
{ "id": 105595, "url": "http://patchwork.dpdk.org/api/patches/105595/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220104023408.13379-1-eagostini@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220104023408.13379-1-eagostini@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220104023408.13379-1-eagostini@nvidia.com", "date": "2022-01-04T02:34:08", "name": "[v1] gpudev: pin GPU memory", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "03b5d8b8a30b69ff0c172f1621369c339c1eb3ce", "submitter": { "id": 1571, "url": "http://patchwork.dpdk.org/api/people/1571/?format=api", "name": "Elena Agostini", "email": "eagostini@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220104023408.13379-1-eagostini@nvidia.com/mbox/", "series": [ { "id": 21056, "url": "http://patchwork.dpdk.org/api/series/21056/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21056", "date": "2022-01-04T02:34:08", "name": "[v1] gpudev: pin GPU memory", "version": 1, "mbox": "http://patchwork.dpdk.org/series/21056/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/105595/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/105595/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 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SFS:(4636009)(40470700002)(36840700001)(46966006)(6666004)(1076003)(7696005)(83380400001)(336012)(36860700001)(70206006)(426003)(8676002)(8936002)(316002)(5660300002)(47076005)(36756003)(6286002)(81166007)(186003)(4326008)(16526019)(26005)(508600001)(356005)(107886003)(55016003)(82310400004)(86362001)(2906002)(2876002)(70586007)(2616005)(40460700001)(6916009)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "03 Jan 2022 18:24:26.9461 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n b86e773c-164c-4d44-806d-08d9cee6468e", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.235];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT060.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR12MB2795", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Elena Agostini <eagostini@nvidia.com>\n\nEnable the possibility to make a GPU memory area accessible from\nthe CPU.\n\nGPU memory has to be allocated via rte_gpu_mem_alloc().\n\nThis patch allows the gpudev library to pin, through the GPU driver,\na chunk of GPU memory and to return a memory pointer usable\nby the CPU to access the GPU memory area.\n\nSigned-off-by: Elena Agostini <eagostini@nvidia.com>\n---\n lib/gpudev/gpudev.c | 47 +++++++++++++++++++++++++++++++++++\n lib/gpudev/gpudev_driver.h | 6 +++++\n lib/gpudev/rte_gpudev.h | 50 ++++++++++++++++++++++++++++++++++++++\n lib/gpudev/version.map | 2 ++\n 4 files changed, 105 insertions(+)", "diff": "diff --git a/lib/gpudev/gpudev.c b/lib/gpudev/gpudev.c\nindex 9ae36dbae9..ca627e44b3 100644\n--- a/lib/gpudev/gpudev.c\n+++ b/lib/gpudev/gpudev.c\n@@ -634,6 +634,53 @@ rte_gpu_mem_unregister(int16_t dev_id, void *ptr)\n \treturn GPU_DRV_RET(dev->ops.mem_unregister(dev, ptr));\n }\n \n+int\n+rte_gpu_mem_pin(int16_t dev_id, size_t size, void *ptr)\n+{\n+\tstruct rte_gpu *dev;\n+\n+\tdev = gpu_get_by_id(dev_id);\n+\tif (dev == NULL) {\n+\t\tGPU_LOG(ERR, \"pin mem for invalid device ID %d\", dev_id);\n+\t\trte_errno = ENODEV;\n+\t\treturn -rte_errno;\n+\t}\n+\n+\tif (dev->ops.mem_pin == NULL) {\n+\t\tGPU_LOG(ERR, \"mem pinning not supported\");\n+\t\trte_errno = ENOTSUP;\n+\t\treturn -rte_errno;\n+\t}\n+\n+\tif (ptr == NULL || size == 0) /* dry-run */\n+\t\treturn 0;\n+\n+\treturn GPU_DRV_RET(dev->ops.mem_pin(dev, size, ptr));\n+}\n+\n+int\n+rte_gpu_mem_unpin(int16_t dev_id, void *ptr)\n+{\n+\tstruct rte_gpu *dev;\n+\n+\tdev = gpu_get_by_id(dev_id);\n+\tif (dev == NULL) {\n+\t\tGPU_LOG(ERR, \"unpin mem for invalid device ID %d\", dev_id);\n+\t\trte_errno = ENODEV;\n+\t\treturn -rte_errno;\n+\t}\n+\n+\tif (dev->ops.mem_unpin == NULL) {\n+\t\trte_errno = ENOTSUP;\n+\t\treturn -rte_errno;\n+\t}\n+\n+\tif (ptr == NULL) /* dry-run */\n+\t\treturn 0;\n+\n+\treturn GPU_DRV_RET(dev->ops.mem_unpin(dev, ptr));\n+}\n+\n int\n rte_gpu_wmb(int16_t dev_id)\n {\ndiff --git a/lib/gpudev/gpudev_driver.h b/lib/gpudev/gpudev_driver.h\nindex cb7b101f2f..a616941926 100644\n--- a/lib/gpudev/gpudev_driver.h\n+++ b/lib/gpudev/gpudev_driver.h\n@@ -31,6 +31,8 @@ typedef int (rte_gpu_mem_alloc_t)(struct rte_gpu *dev, size_t size, void **ptr);\n typedef int (rte_gpu_mem_free_t)(struct rte_gpu *dev, void *ptr);\n typedef int (rte_gpu_mem_register_t)(struct rte_gpu *dev, size_t size, void *ptr);\n typedef int (rte_gpu_mem_unregister_t)(struct rte_gpu *dev, void *ptr);\n+typedef int (rte_gpu_mem_pin_t)(struct rte_gpu *dev, size_t size, void *ptr);\n+typedef int (rte_gpu_mem_unpin_t)(struct rte_gpu *dev, void *ptr);\n typedef int (rte_gpu_wmb_t)(struct rte_gpu *dev);\n \n struct rte_gpu_ops {\n@@ -46,6 +48,10 @@ struct rte_gpu_ops {\n \trte_gpu_mem_register_t *mem_register;\n \t/* Unregister CPU memory from device. */\n \trte_gpu_mem_unregister_t *mem_unregister;\n+ /* Pin GPU memory. */\n+ rte_gpu_mem_pin_t *mem_pin;\n+ /* Unpin GPU memory. */\n+ rte_gpu_mem_unpin_t *mem_unpin;\n \t/* Enforce GPU write memory barrier. */\n \trte_gpu_wmb_t *wmb;\n };\ndiff --git a/lib/gpudev/rte_gpudev.h b/lib/gpudev/rte_gpudev.h\nindex fa3f3aad4f..0a9033c6e0 100644\n--- a/lib/gpudev/rte_gpudev.h\n+++ b/lib/gpudev/rte_gpudev.h\n@@ -447,6 +447,56 @@ int rte_gpu_mem_register(int16_t dev_id, size_t size, void *ptr);\n __rte_experimental\n int rte_gpu_mem_unregister(int16_t dev_id, void *ptr);\n \n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Pin a chunk of GPU memory to make it accessible from the CPU\n+ * using the memory pointer returned by the function.\n+ * GPU memory has to be allocated via rte_gpu_mem_alloc().\n+ *\n+ * @param dev_id\n+ * Device ID requiring pinned memory.\n+ * @param size\n+ * Number of bytes to pin.\n+ * Requesting 0 will do nothing.\n+ * @param ptr\n+ * Pointer to the GPU memory area to be pinned.\n+ * NULL is a no-op accepted value.\n+\n+ * @return\n+ * A pointer to the pinned GPU memory usable by the CPU, otherwise NULL and rte_errno is set:\n+ * - ENODEV if invalid dev_id\n+ * - EINVAL if reserved flags\n+ * - ENOTSUP if operation not supported by the driver\n+ * - E2BIG if size is higher than limit\n+ * - ENOMEM if out of space\n+ * - EPERM if driver error\n+ */\n+__rte_experimental\n+int rte_gpu_mem_pin(int16_t dev_id, size_t size, void *ptr);\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Unpin a chunk of GPU memory previously pinned with rte_gpu_mem_pin()\n+ *\n+ * @param dev_id\n+ * Reference device ID.\n+ * @param ptr\n+ * Pointer to the memory area to be unpinned.\n+ * NULL is a no-op accepted value.\n+ *\n+ * @return\n+ * 0 on success, -rte_errno otherwise:\n+ * - ENODEV if invalid dev_id\n+ * - ENOTSUP if operation not supported by the driver\n+ * - EPERM if driver error\n+ */\n+__rte_experimental\n+int rte_gpu_mem_unpin(int16_t dev_id, void *ptr);\n+\n /**\n * @warning\n * @b EXPERIMENTAL: this API may change without prior notice.\ndiff --git a/lib/gpudev/version.map b/lib/gpudev/version.map\nindex 2e414c65cc..8fb0f4623b 100644\n--- a/lib/gpudev/version.map\n+++ b/lib/gpudev/version.map\n@@ -21,7 +21,9 @@ EXPERIMENTAL {\n \trte_gpu_is_valid;\n \trte_gpu_mem_alloc;\n \trte_gpu_mem_free;\n+\trte_gpu_mem_pin;\n \trte_gpu_mem_register;\n+\trte_gpu_mem_unpin;\n \trte_gpu_mem_unregister;\n \trte_gpu_wmb;\n };\n", "prefixes": [ "v1" ] }