Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/105690/?format=api
{ "id": 105690, "url": "http://patchwork.dpdk.org/api/patches/105690/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220108002003.21153-1-eagostini@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220108002003.21153-1-eagostini@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220108002003.21153-1-eagostini@nvidia.com", "date": "2022-01-08T00:20:01", "name": "[v2,1/3] gpudev: mem alloc aligned memory", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "15a236be0cf9936cdfe009a47fc4982fc4069bcc", "submitter": { "id": 1571, "url": "http://patchwork.dpdk.org/api/people/1571/?format=api", "name": "Elena Agostini", "email": "eagostini@nvidia.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220108002003.21153-1-eagostini@nvidia.com/mbox/", "series": [ { "id": 21096, "url": "http://patchwork.dpdk.org/api/series/21096/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21096", "date": "2022-01-08T00:20:01", "name": "[v2,1/3] gpudev: mem alloc aligned memory", "version": 2, "mbox": "http://patchwork.dpdk.org/series/21096/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/105690/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/105690/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 08A0AA04A6;\n\tFri, 7 Jan 2022 17:10:20 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 8B59C40143;\n\tFri, 7 Jan 2022 17:10:19 +0100 (CET)", "from NAM12-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam12on2078.outbound.protection.outlook.com [40.107.244.78])\n by mails.dpdk.org (Postfix) with ESMTP id 9EF6E40042\n for <dev@dpdk.org>; Fri, 7 Jan 2022 17:10:17 +0100 (CET)", "from DM5PR20CA0027.namprd20.prod.outlook.com (2603:10b6:3:13d::13)\n by BY5PR12MB4258.namprd12.prod.outlook.com (2603:10b6:a03:20d::10) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4867.9; Fri, 7 Jan\n 2022 16:10:16 +0000", "from DM6NAM11FT005.eop-nam11.prod.protection.outlook.com\n (2603:10b6:3:13d:cafe::cc) by DM5PR20CA0027.outlook.office365.com\n (2603:10b6:3:13d::13) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4867.9 via Frontend\n Transport; Fri, 7 Jan 2022 16:10:15 +0000", "from mail.nvidia.com (12.22.5.236) by\n DM6NAM11FT005.mail.protection.outlook.com (10.13.172.238) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id\n 15.20.4867.7 via Frontend Transport; Fri, 7 Jan 2022 16:10:15 +0000", "from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL109.nvidia.com\n (10.27.9.19) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Fri, 7 Jan 2022 16:10:14 +0000", "from nvidia.com (172.20.187.5) by rnnvmail201.nvidia.com\n (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.986.9; Fri, 7 Jan 2022\n 08:10:14 -0800" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=WHwApGozWsT5C5DsArlmVY9HboXLTV8fxRyaHSEailfWTmm8ipR0LPSro2R3+fCre1wbAwNWRhK9+lq27+lAE2rErF5D7XJ/J3uJg/O6cKTROxYOKhvlLc3L40QSr+/sAwIy9juFmdff2JXT3CHmmoTCb97f6FpmU3pQO5sfq4HsrbomR04dABV5840hclzZcbewV1Fj+oR4da2S8b+CvqcRm4b5fSKYcdyeOftkZBaQWaJSDb0rbP0zY/GOyvA+uyFty13Jz2Vyk/Ce5rW0kZ49hBt01m2gjxA9mon5/VCmGxOGf3FAMkPaYA5gu25F5bTD3oizFS05EsbPpadWKw==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=7B906MrpXTxj/G3PqMvKWJ7BiBXknFULgIYvhvITmx4=;\n b=YJ3MULmR3VD9X3XQexfVUFAnMxh2OidMESapeU9oYDuFlCIxvVIN3tBJXayEv3Lb19e2y7mHVRPwOf/hRHJ+Qmqx4eVGjYMOEIVNnbMVOAq3SXY/G1xh0rP28tVyHqSU9/XW1s452f/shQxWU9/ph1LGcWmW5OsBueyLRVdF+l/XDlR9WGGKDEVl9wct/phSBBMaZZiFoXfIt2/t63+U4HKx69lR6p3HZ84NWTTGiUvUUbQVTxK+cpGxugq5mZmbRvA5mU14FEE6Thj3o9g9zZKoZ+9POYBNCHeFlGQitwMCp5/a0Ial0XKtfLC46sajt7Q5IV6CnfLKtpVBYLHwEw==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 12.22.5.236) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass\n (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none\n (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=7B906MrpXTxj/G3PqMvKWJ7BiBXknFULgIYvhvITmx4=;\n b=NaHAH8EwCVTI0A4bL7cVIp/5zYNEuvi5gVxJ9VEz9+KvjS+kyH5R4d/KSDRGORLWpMnKN7VfFlSsY5bjJuZYXnIU6nIhE05QunakSHW6MPKflJYtin/XMSooVrnhwRvZRGWoQwn4JVSPj+iXRuR641hWRJQSVrjhMxUdsQ/HiGjzTZEY2Wl32hECWny+mZ5XuPajKAmybnbPe1Fj8xAuSrsUu8Tv6GuugVBv4U+h88FPlCWb2uvlTr3MgN/CHEfi4WzoXAf7AW4jBMY/A5tg/s3Q/80cofRxkHAy98q7cO9FC5XQ5AZht/5vFamL8lucBBSlba9ikwhla+VPVkYsxQ==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 12.22.5.236)\n smtp.mailfrom=nvidia.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 12.22.5.236 as permitted sender) receiver=protection.outlook.com;\n client-ip=12.22.5.236; helo=mail.nvidia.com;", "From": "<eagostini@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "Elena Agostini <eagostini@nvidia.com>", "Subject": "[PATCH v2 1/3] gpudev: mem alloc aligned memory", "Date": "Sat, 8 Jan 2022 00:20:01 +0000", "Message-ID": "<20220108002003.21153-1-eagostini@nvidia.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20220104014721.1799-1-eagostini@nvidia.com>", "References": "<20220104014721.1799-1-eagostini@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.5]", "X-ClientProxiedBy": "HQMAIL111.nvidia.com (172.20.187.18) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "0516ab2b-ec21-42be-027e-08d9d1f83144", "X-MS-TrafficTypeDiagnostic": "BY5PR12MB4258:EE_", "X-Microsoft-Antispam-PRVS": "\n <BY5PR12MB42589A20659FAC0D8B2EB9B4CD4D9@BY5PR12MB4258.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:6108;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 17hAqBAXWh2Tr4FyGwq62JNA//OdAmrVKl6GdUPGzS1Cjs9ZtJoRYD2RjYABoLTPr24gSoTVKwbj9QOaTj0gb/1WpIlA2OX4jnk9ETYhhhVvPUr8krcd2IPBulJ2E95UvntJkBOVnTZ2HOh5zLmX7znNwi77HC1vE7f7SErpSk7b6ddl7GlVrOvCm6jp9hONsaPcFNG1rAJQt60zisa9UxKXgryHUKxFUjwDP4L54cQVE979xiJPB5tKHF2ql3HGXF+4T/1jZ1yhTZzJhnv56ehZu9ZeB6lQc4ChXCpl7XL6ytEFJNuOrJ9bdRUYvp3AAnZS/e86OAx3ZYCwArxj7HOtoUuCGHCh3KvEBr1IBqVzhaUR37c1OoYe4TWs4fP9By1nkibundAO8SraAyhlQvzuooZHtsQp460U+xEc1mqJi+wCnG38rO8zpSu3VgZVYXrKWKSR0dcbjOhiHHNmbzuwmrAf+eEcVOiz4YfQURp4Hyog7tsoK8wPZSoPMzFWqIP6YSlFQ6PtGSMQW4ON/KJzaHsTNiLB1jJRBsiiWCkYUZoOAszE9V3KGPZ8mwOWLJWlgN6I4mIWZG1t/YUUJCiV40AafRn3mXFdTC/QviFCNVprpxGPE8eJ1Zn7uVMGBAC6evq7NIIcOQjIS4q4tu7dHZHdX7nh5/zp1zODelpqf5iYRM7NA6LGBJg2LGV12S9aN02ubfifoTmtpVuMzI7HOimNKBkw04rr1otYU27NAPybmwgmFPD3POmREWqivot4iONL83ihaYlKRxNXxJxUvJj36T7s3cPEM30vV2U=", "X-Forefront-Antispam-Report": "CIP:12.22.5.236; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(4636009)(36840700001)(40470700002)(46966006)(5660300002)(8936002)(81166007)(26005)(2876002)(6916009)(82310400004)(1076003)(55016003)(47076005)(356005)(8676002)(40460700001)(86362001)(4326008)(107886003)(6286002)(36756003)(70586007)(70206006)(426003)(336012)(7696005)(2616005)(316002)(36860700001)(6666004)(2906002)(16526019)(186003)(508600001)(83380400001)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "07 Jan 2022 16:10:15.6552 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 0516ab2b-ec21-42be-027e-08d9d1f83144", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT005.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BY5PR12MB4258", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Elena Agostini <eagostini@nvidia.com>\n\nSimilarly to rte_malloc, rte_gpu_mem_alloc accept as\ninput the memory alignment size.\n\nGPU driver should return GPU memory address aligned\nwith the input value.\n\nChangelog:\n- rte_gpu_mem_alloc parameters order\n\nSigned-off-by: Elena Agostini <eagostini@nvidia.com>\n---\n lib/gpudev/gpudev.c | 10 ++++++++--\n lib/gpudev/gpudev_driver.h | 2 +-\n lib/gpudev/rte_gpudev.h | 10 +++++++---\n 3 files changed, 16 insertions(+), 6 deletions(-)", "diff": "diff --git a/lib/gpudev/gpudev.c b/lib/gpudev/gpudev.c\nindex 9ae36dbae9..59e2169292 100644\n--- a/lib/gpudev/gpudev.c\n+++ b/lib/gpudev/gpudev.c\n@@ -527,7 +527,7 @@ rte_gpu_info_get(int16_t dev_id, struct rte_gpu_info *info)\n }\n \n void *\n-rte_gpu_mem_alloc(int16_t dev_id, size_t size)\n+rte_gpu_mem_alloc(int16_t dev_id, size_t size, unsigned int align)\n {\n \tstruct rte_gpu *dev;\n \tvoid *ptr;\n@@ -549,7 +549,13 @@ rte_gpu_mem_alloc(int16_t dev_id, size_t size)\n \tif (size == 0) /* dry-run */\n \t\treturn NULL;\n \n-\tret = dev->ops.mem_alloc(dev, size, &ptr);\n+\tif (align && !rte_is_power_of_2(align)) {\n+\t\tGPU_LOG(ERR, \"requested alignment is not a power of two %u\", align);\n+\t\trte_errno = EINVAL;\n+\t\treturn NULL;\n+\t}\n+\n+\tret = dev->ops.mem_alloc(dev, size, align, &ptr);\n \n \tswitch (ret) {\n \tcase 0:\ndiff --git a/lib/gpudev/gpudev_driver.h b/lib/gpudev/gpudev_driver.h\nindex cb7b101f2f..0ed7478e9b 100644\n--- a/lib/gpudev/gpudev_driver.h\n+++ b/lib/gpudev/gpudev_driver.h\n@@ -27,7 +27,7 @@ enum rte_gpu_state {\n struct rte_gpu;\n typedef int (rte_gpu_close_t)(struct rte_gpu *dev);\n typedef int (rte_gpu_info_get_t)(struct rte_gpu *dev, struct rte_gpu_info *info);\n-typedef int (rte_gpu_mem_alloc_t)(struct rte_gpu *dev, size_t size, void **ptr);\n+typedef int (rte_gpu_mem_alloc_t)(struct rte_gpu *dev, size_t size, unsigned int align, void **ptr);\n typedef int (rte_gpu_mem_free_t)(struct rte_gpu *dev, void *ptr);\n typedef int (rte_gpu_mem_register_t)(struct rte_gpu *dev, size_t size, void *ptr);\n typedef int (rte_gpu_mem_unregister_t)(struct rte_gpu *dev, void *ptr);\ndiff --git a/lib/gpudev/rte_gpudev.h b/lib/gpudev/rte_gpudev.h\nindex fa3f3aad4f..9e2e2c5dce 100644\n--- a/lib/gpudev/rte_gpudev.h\n+++ b/lib/gpudev/rte_gpudev.h\n@@ -364,18 +364,22 @@ int rte_gpu_info_get(int16_t dev_id, struct rte_gpu_info *info);\n * @param size\n * Number of bytes to allocate.\n * Requesting 0 will do nothing.\n- *\n+ * @param align\n+ * If 0, the return is a pointer that is suitably aligned for any kind of\n+ * variable (in the same manner as malloc()).\n+ * Otherwise, the return is a pointer that is a multiple of *align*. In\n+ * this case, it must obviously be a power of two.\n * @return\n * A pointer to the allocated memory, otherwise NULL and rte_errno is set:\n * - ENODEV if invalid dev_id\n- * - EINVAL if reserved flags\n+ * - EINVAL if align is not a power of two\n * - ENOTSUP if operation not supported by the driver\n * - E2BIG if size is higher than limit\n * - ENOMEM if out of space\n * - EPERM if driver error\n */\n __rte_experimental\n-void *rte_gpu_mem_alloc(int16_t dev_id, size_t size)\n+void *rte_gpu_mem_alloc(int16_t dev_id, size_t size, unsigned int align)\n __rte_alloc_size(2);\n \n /**\n", "prefixes": [ "v2", "1/3" ] }