get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/106635/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 106635,
    "url": "http://patchwork.dpdk.org/api/patches/106635/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220127153950.812953-17-michaelba@nvidia.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220127153950.812953-17-michaelba@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220127153950.812953-17-michaelba@nvidia.com",
    "date": "2022-01-27T15:39:46",
    "name": "[16/20] net/mlx5: add share device context config structure",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "227598133c0c45fe4bb45d279ca2bd513f4525b2",
    "submitter": {
        "id": 1949,
        "url": "http://patchwork.dpdk.org/api/people/1949/?format=api",
        "name": "Michael Baum",
        "email": "michaelba@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "http://patchwork.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220127153950.812953-17-michaelba@nvidia.com/mbox/",
    "series": [
        {
            "id": 21402,
            "url": "http://patchwork.dpdk.org/api/series/21402/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21402",
            "date": "2022-01-27T15:39:30",
            "name": "mlx5: refactor devargs management",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/21402/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/106635/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/106635/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7BAABA04A6;\n\tThu, 27 Jan 2022 16:42:11 +0100 (CET)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BEE0542851;\n\tThu, 27 Jan 2022 16:40:32 +0100 (CET)",
            "from NAM12-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam12on2066.outbound.protection.outlook.com [40.107.237.66])\n by mails.dpdk.org (Postfix) with ESMTP id 1D83742854\n for <dev@dpdk.org>; Thu, 27 Jan 2022 16:40:30 +0100 (CET)",
            "from BN6PR16CA0011.namprd16.prod.outlook.com (2603:10b6:404:f5::21)\n by CH2PR12MB4088.namprd12.prod.outlook.com (2603:10b6:610:a5::8) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4930.15; Thu, 27 Jan\n 2022 15:40:27 +0000",
            "from BN8NAM11FT026.eop-nam11.prod.protection.outlook.com\n (2603:10b6:404:f5:cafe::fa) by BN6PR16CA0011.outlook.office365.com\n (2603:10b6:404:f5::21) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4930.17 via Frontend\n Transport; Thu, 27 Jan 2022 15:40:27 +0000",
            "from mail.nvidia.com (12.22.5.234) by\n BN8NAM11FT026.mail.protection.outlook.com (10.13.177.51) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id\n 15.20.4930.15 via Frontend Transport; Thu, 27 Jan 2022 15:40:26 +0000",
            "from drhqmail203.nvidia.com (10.126.190.182) by\n DRHQMAIL101.nvidia.com (10.27.9.10) with Microsoft SMTP Server (TLS) id\n 15.0.1497.18; Thu, 27 Jan 2022 15:40:26 +0000",
            "from drhqmail202.nvidia.com (10.126.190.181) by\n drhqmail203.nvidia.com (10.126.190.182) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9;\n Thu, 27 Jan 2022 07:40:25 -0800",
            "from nvidia.com (10.127.8.13) by mail.nvidia.com (10.126.190.181)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9 via Frontend\n Transport; Thu, 27 Jan 2022 07:40:24 -0800"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=JWZK9dDy1QCmdz4XHOG1LSZNxOXF3uK+3lgFz1sdmhDkS2ytHCvTs1kf/BTFK1b1STjLhK+i1GQXcash6MPFC122uynYPsE0e2U0TKt/YnNFRGw6FpnEbOkU87Suo8yWsF9TnFoVGuwcmPPB8NwREtknlvJaUExXb+faaDwL/WFCnuSMxI/ZTjeYyBdYi1XML6Of8iZ7dtO6zcID2VtDJQY87X1umrBAFnepSXh9PlQ0GvvLJTtRViJ6DgAh93LrIRGBLBguawH8841Xza+qx2MOl6RkoxSvI7jIcuEONW8+zOulef6eeAl8bLG/25APqUB4HKEygy4FGBRtRBcR8w==",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=epYBcZ9ALJGKkaucn+9xLUj1ORpfGjkkmgf5vTsNN6A=;\n b=a+TXLGS30dVgXnkRgPbrqjXpFgn2qOEfnOWiCIw/yYOw4CzRUuipxymd7cLcXEiYbvdukC5S/CTIFccCB56FY0bwotjZMaBGoLxDkIv0yUiEQmIil4VoJaYZeReIGOfrgeBYFpNrP4XyqOgLFuCIuvk3ZpFSUvy//KAVaw3TXrJ6Qt1pg4al2XWRTjgwaiotmdl5Li662/TESD+gnqsrztojfRuzwhD9Z/aeWlCk1QLELe81ssfgeWMx8T0pdvgLzRmmY+hjG6Z8GS5bKT/PaOzgRynKJPnkzszmf5EwtZ7kV5EdfWE/vyfPq6TlT9vbKiJd0g4HAdj2iB6I4/kZiQ==",
        "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 12.22.5.234) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass\n (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none\n (message not signed); arc=none",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=epYBcZ9ALJGKkaucn+9xLUj1ORpfGjkkmgf5vTsNN6A=;\n b=rBC+9U4+TQJ8528BwI//qkFwppfX82CVfo7RpYJxU3sXFyzFN8Lrg1bX+1uHhkBqBnZn/NxtkxAyQFunTEgZ4/0Ac1xQPgrF/VbRcwVPqY6xiMzHd4QH/VOH++IVNT9Yy16y+WfVCd2DpYb4kb6FRgBLFLtRPdGgbtQu26WMrUdkTsy1RzWTEE1EgwSAenbyqZMKGm/rUJNisgBVYluRDDvtM2XTpWyBjtlouRyRJz5XbL4ZDSm3fO2elsehU8d4JZg2RbjOLVyiFpISysDlgjNfo9aeuc6ekeT0HxKr3UhgtNE0d6N4WA1JE5T7t+rAWyM4/QjZXUq7woSz0XFlrA==",
        "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 12.22.5.234)\n smtp.mailfrom=nvidia.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;",
        "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 12.22.5.234 as permitted sender) receiver=protection.outlook.com;\n client-ip=12.22.5.234; helo=mail.nvidia.com;",
        "From": "Michael Baum <michaelba@nvidia.com>",
        "To": "<dev@dpdk.org>",
        "CC": "Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>",
        "Subject": "[PATCH 16/20] net/mlx5: add share device context config structure",
        "Date": "Thu, 27 Jan 2022 17:39:46 +0200",
        "Message-ID": "<20220127153950.812953-17-michaelba@nvidia.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20220127153950.812953-1-michaelba@nvidia.com>",
        "References": "<20220127153950.812953-1-michaelba@nvidia.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-EOPAttributedMessage": "0",
        "X-MS-PublicTrafficType": "Email",
        "X-MS-Office365-Filtering-Correlation-Id": "0fddcc29-7023-4c85-9aa4-08d9e1ab575f",
        "X-MS-TrafficTypeDiagnostic": "CH2PR12MB4088:EE_",
        "X-Microsoft-Antispam-PRVS": "\n <CH2PR12MB4088E718CC0B332381362375CC219@CH2PR12MB4088.namprd12.prod.outlook.com>",
        "X-MS-Oob-TLC-OOBClassifiers": "OLM:11;",
        "X-MS-Exchange-SenderADCheck": "1",
        "X-MS-Exchange-AntiSpam-Relay": "0",
        "X-Microsoft-Antispam": "BCL:0;",
        "X-Microsoft-Antispam-Message-Info": "\n AuAvr72rYMkri0YqMxmFGDO9OVBobIEHAzS8pmtr3L175dRucPglSRaQR/gQ8wL7bLwc/wGwj9TTXOw8x/rLQDmNAzwqEIU67lfvFne6PeSot7KOtLjDkuY0zAvhY16Anfgrae8Zt/zDOClFspAQ1PpOpJFn2V6Qv7zkJtTo2gckrv1sSc0fjvupnTwP+ovU1smUXppriz4Y4FZ0DNO4yORhQquJ/LmR8EraIA7UH6YSA2lnpD+nATPUwBSX+eaMaNRKICm14yAcRgMikqGbbJF6LjUGC70ZQkk/IL/x/HJ7wJ1XzcrZd340eHNxFQbpakD/uY9rDViqIMx925hotbCsu6bRCgkDb7xdKmpo1FHsSX0uX0eMNcDOtV5Puv8SR8+i3X7v/1lB8q/NfJs48RkCWMySmt2biXa1rC0WlAkbE0dnA+GJRLlRwYJHAh9fpRv4zcsa153m0GD1KNwK7KS+Vf5FvjBkOzyliVGAR/Cgh/ztmrCZ3klRyFvEGv8osPWd5H33HkHVIJRyMTp7OvS6BlrHhwRqrfU2UqrKkUMf+XSGbKC2MGmM4SOxOrOliXVdHRuuHN9wYhEnnhGBJYEiFoHmV2PbHxoFU+7Uf5JJXXVPYLJ1aaS3x1+bie4gyuJBGHoM8v0fRzCruYVTxd7KJ7uZbHwZtNNL0iAecQHbwuT946WnOk+n+BMaokPpKqgzyeJxgmTBxPQPXMEkO0rBlzL1QbVreauOFPLwp7E+ruM7DJLP7WVjEZNgeFFl",
        "X-Forefront-Antispam-Report": "CIP:12.22.5.234; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(13230001)(4636009)(36840700001)(46966006)(40470700004)(83380400001)(47076005)(316002)(6666004)(1076003)(86362001)(186003)(26005)(7696005)(82310400004)(4326008)(8676002)(8936002)(70586007)(70206006)(2616005)(55016003)(5660300002)(40460700003)(81166007)(356005)(426003)(30864003)(336012)(6286002)(508600001)(54906003)(36756003)(107886003)(36860700001)(6916009)(2906002)(36900700001)(579004)(559001)(309714004)(20210929001);\n DIR:OUT; SFP:1101;",
        "X-OriginatorOrg": "Nvidia.com",
        "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "27 Jan 2022 15:40:26.8676 (UTC)",
        "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 0fddcc29-7023-4c85-9aa4-08d9e1ab575f",
        "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a",
        "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.234];\n Helo=[mail.nvidia.com]",
        "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT026.eop-nam11.prod.protection.outlook.com",
        "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous",
        "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem",
        "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH2PR12MB4088",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Add configuration structure for shared device context. This structure\ncontains all configurations coming from devargs which oriented to\ndevice. It is a field of shared device context (SH) structure, and is\nupdated once in mlx5_alloc_shared_dev_ctx() function.\nThis structure cannot be changed when probing again, so add function to\nprevent it. The mlx5_probe_again_args_validate() function creates a\ntemporary IB context configure structure according to new devargs\nattached in probing again, then checks the match between the temporary\nstructure and the existing IB context configure structure.\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/linux/mlx5_os.c   |  95 ++----\n drivers/net/mlx5/mlx5.c            | 453 +++++++++++++++++++++--------\n drivers/net/mlx5/mlx5.h            |  43 +--\n drivers/net/mlx5/mlx5_ethdev.c     |   3 +-\n drivers/net/mlx5/mlx5_flow.c       |  30 +-\n drivers/net/mlx5/mlx5_flow.h       |   2 +-\n drivers/net/mlx5/mlx5_flow_dv.c    |  45 +--\n drivers/net/mlx5/mlx5_flow_meter.c |  10 +-\n drivers/net/mlx5/mlx5_rxq.c        |   7 +-\n drivers/net/mlx5/mlx5_trigger.c    |  10 +-\n drivers/net/mlx5/mlx5_txpp.c       |  12 +-\n drivers/net/mlx5/mlx5_txq.c        |   2 +-\n drivers/net/mlx5/windows/mlx5_os.c |  35 +--\n 13 files changed, 457 insertions(+), 290 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex 13db399b5e..50cc287e73 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -436,7 +436,7 @@ __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)\n \tdv_attr.priority = 3;\n #ifdef HAVE_MLX5DV_DR_ESWITCH\n \tvoid *misc2_m;\n-\tif (priv->config.dv_esw_en) {\n+\tif (priv->sh->config.dv_esw_en) {\n \t\t/* FDB enabled reg_c_0 */\n \t\tdv_attr.match_criteria_enable |=\n \t\t\t\t(1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);\n@@ -557,7 +557,7 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)\n \t}\n \tsh->tx_domain = domain;\n #ifdef HAVE_MLX5DV_DR_ESWITCH\n-\tif (priv->config.dv_esw_en) {\n+\tif (sh->config.dv_esw_en) {\n \t\tdomain = mlx5_glue->dr_create_domain(sh->cdev->ctx,\n \t\t\t\t\t\t     MLX5DV_DR_DOMAIN_TYPE_FDB);\n \t\tif (!domain) {\n@@ -579,20 +579,20 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)\n \t\tgoto error;\n \t}\n #endif\n-\tif (!sh->tunnel_hub && priv->config.dv_miss_info)\n+\tif (!sh->tunnel_hub && sh->config.dv_miss_info)\n \t\terr = mlx5_alloc_tunnel_hub(sh);\n \tif (err) {\n \t\tDRV_LOG(ERR, \"mlx5_alloc_tunnel_hub failed err=%d\", err);\n \t\tgoto error;\n \t}\n-\tif (priv->config.reclaim_mode == MLX5_RCM_AGGR) {\n+\tif (sh->config.reclaim_mode == MLX5_RCM_AGGR) {\n \t\tmlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);\n \t\tmlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);\n \t\tif (sh->fdb_domain)\n \t\t\tmlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);\n \t}\n \tsh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();\n-\tif (!priv->config.allow_duplicate_pattern) {\n+\tif (!sh->config.allow_duplicate_pattern) {\n #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE\n \t\tDRV_LOG(WARNING, \"Disallow duplicate pattern is not supported - maybe old rdma-core version?\");\n #endif\n@@ -859,7 +859,7 @@ mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)\n #ifdef HAVE_MLX5DV_DR\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \n-\tif (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)\n+\tif (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action)\n \t\treturn;\n \t/**\n \t * DR supports drop action placeholder when it is supported;\n@@ -1115,31 +1115,9 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\t\tstrerror(rte_errno));\n \t\treturn NULL;\n \t}\n-\tsh = mlx5_alloc_shared_dev_ctx(spawn, config);\n+\tsh = mlx5_alloc_shared_dev_ctx(spawn);\n \tif (!sh)\n \t\treturn NULL;\n-\t/* Update final values for devargs before check sibling config. */\n-\tif (config->dv_flow_en && !sh->dev_cap.dv_flow_en) {\n-\t\tDRV_LOG(WARNING, \"DV flow is not supported.\");\n-\t\tconfig->dv_flow_en = 0;\n-\t}\n-\tif (config->dv_esw_en && !sh->dev_cap.dv_esw_en) {\n-\t\tDRV_LOG(WARNING, \"E-Switch DV flow is not supported.\");\n-\t\tconfig->dv_esw_en = 0;\n-\t}\n-\tif (config->dv_miss_info && config->dv_esw_en)\n-\t\tconfig->dv_xmeta_en = MLX5_XMETA_MODE_META16;\n-\tif (!config->dv_esw_en &&\n-\t    config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {\n-\t\tDRV_LOG(WARNING,\n-\t\t\t\"Metadata mode %u is not supported (no E-Switch).\",\n-\t\t\tconfig->dv_xmeta_en);\n-\t\tconfig->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;\n-\t}\n-\t/* Check sibling device configurations. */\n-\terr = mlx5_dev_check_sibling_config(sh, config, dpdk_dev);\n-\tif (err)\n-\t\tgoto error;\n \tnl_rdma = mlx5_nl_init(NETLINK_RDMA);\n \t/* Check port status. */\n \tif (spawn->phys_port <= UINT8_MAX) {\n@@ -1314,7 +1292,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \tif (sh->cdev->config.devx) {\n \t\tsh->steering_format_version = hca_attr->steering_format_version;\n \t\t/* LRO is supported only when DV flow enabled. */\n-\t\tif (sh->dev_cap.lro_supported && config->dv_flow_en)\n+\t\tif (sh->dev_cap.lro_supported && sh->config.dv_flow_en)\n \t\t\tsh->dev_cap.lro_supported = 0;\n \t\tif (sh->dev_cap.lro_supported) {\n \t\t\t/*\n@@ -1331,7 +1309,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t(defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \\\n \t defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))\n \t\tif (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&\n-\t\t    config->dv_flow_en) {\n+\t\t    sh->config.dv_flow_en) {\n \t\t\tuint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids;\n \t\t\t/*\n \t\t\t * Meter needs two REG_C's for color match and pre-sfx\n@@ -1405,7 +1383,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */\n #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)\n \t\tif (hca_attr->log_max_ft_sampler_num > 0  &&\n-\t\t    config->dv_flow_en) {\n+\t\t    sh->config.dv_flow_en) {\n \t\t\tpriv->sampler_en = 1;\n \t\t\tDRV_LOG(DEBUG, \"Sampler enabled!\");\n \t\t} else {\n@@ -1436,11 +1414,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t}\n \tDRV_LOG(DEBUG, \"Rx CQE compression is %ssupported\",\n \t\t\tconfig->cqe_comp ? \"\" : \"not \");\n-\tif (config->tx_pp && !sh->dev_cap.txpp_en) {\n-\t\tDRV_LOG(ERR, \"Packet pacing is not supported.\");\n-\t\terr = ENODEV;\n-\t\tgoto error;\n-\t}\n \tif (config->std_delay_drop || config->hp_delay_drop) {\n \t\tif (!hca_attr->rq_delay_drop) {\n \t\t\tconfig->std_delay_drop = 0;\n@@ -1450,17 +1423,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\t\t\tpriv->dev_port);\n \t\t}\n \t}\n-\t/*\n-\t * If HW has bug working with tunnel packet decapsulation and\n-\t * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip\n-\t * bit. Then RTE_ETH_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.\n-\t */\n-\tif (sh->dev_cap.scatter_fcs_w_decap_disable && config->decap_en)\n-\t\tconfig->hw_fcs_strip = 0;\n-\telse\n-\t\tconfig->hw_fcs_strip = sh->dev_cap.hw_fcs_strip;\n-\tDRV_LOG(DEBUG, \"FCS stripping configuration is %ssupported\",\n-\t\t(config->hw_fcs_strip ? \"\" : \"not \"));\n \tif (config->mprq.enabled && !sh->dev_cap.mprq.enabled) {\n \t\tDRV_LOG(WARNING, \"Multi-Packet RQ isn't supported.\");\n \t\tconfig->mprq.enabled = 0;\n@@ -1546,7 +1508,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \teth_dev->rx_queue_count = mlx5_rx_queue_count;\n \t/* Register MAC address. */\n \tclaim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));\n-\tif (sh->dev_cap.vf && config->vf_nl_en)\n+\tif (sh->dev_cap.vf && sh->config.vf_nl_en)\n \t\tmlx5_nl_mac_addr_sync(priv->nl_socket_route,\n \t\t\t\t      mlx5_ifindex(eth_dev),\n \t\t\t\t      eth_dev->data->mac_addrs,\n@@ -1572,8 +1534,8 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t/* Store device configuration on private structure. */\n \tpriv->config = *config;\n \tfor (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {\n-\t\ticfg[i].release_mem_en = !!config->reclaim_mode;\n-\t\tif (config->reclaim_mode)\n+\t\ticfg[i].release_mem_en = !!sh->config.reclaim_mode;\n+\t\tif (sh->config.reclaim_mode)\n \t\t\ticfg[i].per_core_cache = 0;\n \t\tpriv->flows[i] = mlx5_ipool_create(&icfg[i]);\n \t\tif (!priv->flows[i])\n@@ -1581,14 +1543,14 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t}\n \t/* Create context for virtual machine VLAN workaround. */\n \tpriv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);\n-\tif (config->dv_flow_en) {\n+\tif (sh->config.dv_flow_en) {\n \t\terr = mlx5_alloc_shared_dr(priv);\n \t\tif (err)\n \t\t\tgoto error;\n \t\tif (mlx5_flex_item_port_init(eth_dev) < 0)\n \t\t\tgoto error;\n \t}\n-\tif (sh->cdev->config.devx && config->dv_flow_en &&\n+\tif (sh->cdev->config.devx && sh->config.dv_flow_en &&\n \t    sh->dev_cap.dest_tir) {\n \t\tpriv->obj_ops = devx_obj_ops;\n \t\tmlx5_queue_counter_id_prepare(eth_dev);\n@@ -1604,7 +1566,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t} else {\n \t\tpriv->obj_ops = ibv_obj_ops;\n \t}\n-\tif (config->tx_pp &&\n+\tif (sh->config.tx_pp &&\n \t    priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {\n \t\t/*\n \t\t * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support\n@@ -1635,11 +1597,11 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\tgoto error;\n \t}\n \tmlx5_set_metadata_mask(eth_dev);\n-\tif (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&\n+\tif (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&\n \t    !priv->sh->dv_regc0_mask) {\n \t\tDRV_LOG(ERR, \"metadata mode %u is not supported \"\n \t\t\t     \"(no metadata reg_c[0] is available)\",\n-\t\t\t     priv->config.dv_xmeta_en);\n+\t\t\t     sh->config.dv_xmeta_en);\n \t\t\terr = ENOTSUP;\n \t\t\tgoto error;\n \t}\n@@ -1664,16 +1626,16 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\tDRV_LOG(DEBUG,\n \t\t\t\"port %u extensive metadata register is not supported\",\n \t\t\teth_dev->data->port_id);\n-\t\tif (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {\n+\t\tif (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {\n \t\t\tDRV_LOG(ERR, \"metadata mode %u is not supported \"\n \t\t\t\t     \"(no metadata registers available)\",\n-\t\t\t\t     priv->config.dv_xmeta_en);\n+\t\t\t\t     sh->config.dv_xmeta_en);\n \t\t\terr = ENOTSUP;\n \t\t\tgoto error;\n \t\t}\n \t}\n-\tif (priv->config.dv_flow_en &&\n-\t    priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&\n+\tif (sh->config.dv_flow_en &&\n+\t    sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&\n \t    mlx5_flow_ext_mreg_supported(eth_dev) &&\n \t    priv->sh->dv_regc0_mask) {\n \t\tpriv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,\n@@ -1692,7 +1654,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \trte_spinlock_init(&priv->shared_act_sl);\n \tmlx5_flow_counter_mode_config(eth_dev);\n \tmlx5_flow_drop_action_config(eth_dev);\n-\tif (priv->config.dv_flow_en)\n+\tif (sh->config.dv_flow_en)\n \t\teth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;\n \treturn eth_dev;\n error:\n@@ -1950,15 +1912,10 @@ mlx5_os_config_default(struct mlx5_dev_config *config)\n \tconfig->txq_inline_min = MLX5_ARG_UNSET;\n \tconfig->txq_inline_mpw = MLX5_ARG_UNSET;\n \tconfig->txqs_inline = MLX5_ARG_UNSET;\n-\tconfig->vf_nl_en = 1;\n \tconfig->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;\n \tconfig->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;\n \tconfig->mprq.log_stride_num = MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM;\n-\tconfig->dv_esw_en = 1;\n-\tconfig->dv_flow_en = 1;\n-\tconfig->decap_en = 1;\n \tconfig->log_hp_size = MLX5_ARG_UNSET;\n-\tconfig->allow_duplicate_pattern = 1;\n \tconfig->std_delay_drop = 0;\n \tconfig->hp_delay_drop = 0;\n }\n@@ -2574,6 +2531,12 @@ mlx5_os_net_probe(struct mlx5_common_device *cdev)\n \t\t\tstrerror(rte_errno));\n \t\treturn -rte_errno;\n \t}\n+\tret = mlx5_probe_again_args_validate(cdev);\n+\tif (ret) {\n+\t\tDRV_LOG(ERR, \"Probe again parameters are not compatible : %s\",\n+\t\t\tstrerror(rte_errno));\n+\t\treturn -rte_errno;\n+\t}\n \tif (mlx5_dev_is_pci(cdev->dev))\n \t\treturn mlx5_os_pci_probe(cdev);\n \telse\ndiff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex bd23ce5afd..75ff11c357 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -533,7 +533,7 @@ mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)\n \tfallback = true;\n #else\n \tfallback = false;\n-\tif (!sh->cdev->config.devx || !priv->config.dv_flow_en ||\n+\tif (!sh->cdev->config.devx || !sh->config.dv_flow_en ||\n \t    !hca_attr->flow_counters_dump ||\n \t    !(hca_attr->flow_counter_bulk_alloc_bitmap & 0x4) ||\n \t    (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))\n@@ -836,12 +836,9 @@ mlx5_flow_aso_ct_mng_close(struct mlx5_dev_ctx_shared *sh)\n  *\n  * @param[in] sh\n  *   Pointer to mlx5_dev_ctx_shared object.\n- * @param[in] config\n- *   Pointer to user dev config.\n  */\n static void\n-mlx5_flow_ipool_create(struct mlx5_dev_ctx_shared *sh,\n-\t\t       const struct mlx5_dev_config *config)\n+mlx5_flow_ipool_create(struct mlx5_dev_ctx_shared *sh)\n {\n \tuint8_t i;\n \tstruct mlx5_indexed_pool_config cfg;\n@@ -856,12 +853,12 @@ mlx5_flow_ipool_create(struct mlx5_dev_ctx_shared *sh,\n \t\t * according to PCI function flow configuration.\n \t\t */\n \t\tcase MLX5_IPOOL_MLX5_FLOW:\n-\t\t\tcfg.size = config->dv_flow_en ?\n+\t\t\tcfg.size = sh->config.dv_flow_en ?\n \t\t\t\tsizeof(struct mlx5_flow_handle) :\n \t\t\t\tMLX5_FLOW_HANDLE_VERBS_SIZE;\n \t\t\tbreak;\n \t\t}\n-\t\tif (config->reclaim_mode) {\n+\t\tif (sh->config.reclaim_mode) {\n \t\t\tcfg.release_mem_en = 1;\n \t\t\tcfg.per_core_cache = 0;\n \t\t} else {\n@@ -1169,6 +1166,191 @@ mlx5_setup_tis(struct mlx5_dev_ctx_shared *sh)\n \treturn 0;\n }\n \n+/**\n+ * Verify and store value for share device argument.\n+ *\n+ * @param[in] key\n+ *   Key argument to verify.\n+ * @param[in] val\n+ *   Value associated with key.\n+ * @param opaque\n+ *   User data.\n+ *\n+ * @return\n+ *   0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+static int\n+mlx5_dev_args_check_handler(const char *key, const char *val, void *opaque)\n+{\n+\tstruct mlx5_sh_config *config = opaque;\n+\tsigned long tmp;\n+\n+\terrno = 0;\n+\ttmp = strtol(val, NULL, 0);\n+\tif (errno) {\n+\t\trte_errno = errno;\n+\t\tDRV_LOG(WARNING, \"%s: \\\"%s\\\" is not a valid integer\", key, val);\n+\t\treturn -rte_errno;\n+\t}\n+\tif (tmp < 0 && strcmp(MLX5_TX_PP, key) && strcmp(MLX5_TX_SKEW, key)) {\n+\t\t/* Negative values are acceptable for some keys only. */\n+\t\trte_errno = EINVAL;\n+\t\tDRV_LOG(WARNING, \"%s: invalid negative value \\\"%s\\\"\", key, val);\n+\t\treturn -rte_errno;\n+\t}\n+\tif (strcmp(MLX5_TX_PP, key) == 0) {\n+\t\tunsigned long mod = tmp >= 0 ? tmp : -tmp;\n+\n+\t\tif (!mod) {\n+\t\t\tDRV_LOG(ERR, \"Zero Tx packet pacing parameter.\");\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\tconfig->tx_pp = tmp;\n+\t} else if (strcmp(MLX5_TX_SKEW, key) == 0) {\n+\t\tconfig->tx_skew = tmp;\n+\t} else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {\n+\t\tconfig->l3_vxlan_en = !!tmp;\n+\t} else if (strcmp(MLX5_VF_NL_EN, key) == 0) {\n+\t\tconfig->vf_nl_en = !!tmp;\n+\t} else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {\n+\t\tconfig->dv_esw_en = !!tmp;\n+\t} else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {\n+\t\tconfig->dv_flow_en = !!tmp;\n+\t} else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {\n+\t\tif (tmp != MLX5_XMETA_MODE_LEGACY &&\n+\t\t    tmp != MLX5_XMETA_MODE_META16 &&\n+\t\t    tmp != MLX5_XMETA_MODE_META32 &&\n+\t\t    tmp != MLX5_XMETA_MODE_MISS_INFO) {\n+\t\t\tDRV_LOG(ERR, \"Invalid extensive metadata parameter.\");\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\tif (tmp != MLX5_XMETA_MODE_MISS_INFO)\n+\t\t\tconfig->dv_xmeta_en = tmp;\n+\t\telse\n+\t\t\tconfig->dv_miss_info = 1;\n+\t} else if (strcmp(MLX5_LACP_BY_USER, key) == 0) {\n+\t\tconfig->lacp_by_user = !!tmp;\n+\t} else if (strcmp(MLX5_RECLAIM_MEM, key) == 0) {\n+\t\tif (tmp != MLX5_RCM_NONE &&\n+\t\t    tmp != MLX5_RCM_LIGHT &&\n+\t\t    tmp != MLX5_RCM_AGGR) {\n+\t\t\tDRV_LOG(ERR, \"Unrecognize %s: \\\"%s\\\"\", key, val);\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\tconfig->reclaim_mode = tmp;\n+\t} else if (strcmp(MLX5_DECAP_EN, key) == 0) {\n+\t\tconfig->decap_en = !!tmp;\n+\t} else if (strcmp(MLX5_ALLOW_DUPLICATE_PATTERN, key) == 0) {\n+\t\tconfig->allow_duplicate_pattern = !!tmp;\n+\t}\n+\treturn 0;\n+}\n+\n+/**\n+ * Parse user device parameters and adjust them according to device\n+ * capabilities.\n+ *\n+ * @param sh\n+ *   Pointer to shared device context.\n+ * @param devargs\n+ *   Device arguments structure.\n+ * @param config\n+ *   Pointer to shared device configuration structure.\n+ *\n+ * @return\n+ *   0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+static int\n+mlx5_shared_dev_ctx_args_config(struct mlx5_dev_ctx_shared *sh,\n+\t\t\t\tstruct rte_devargs *devargs,\n+\t\t\t\tstruct mlx5_sh_config *config)\n+{\n+\tstruct rte_kvargs *kvlist;\n+\tint ret = 0;\n+\n+\t/* Default configuration. */\n+\tmemset(config, 0, sizeof(*config));\n+\tconfig->vf_nl_en = 1;\n+\tconfig->dv_esw_en = 1;\n+\tconfig->dv_flow_en = 1;\n+\tconfig->decap_en = 1;\n+\tconfig->allow_duplicate_pattern = 1;\n+\t/* Parse device parameters. */\n+\tif (devargs != NULL) {\n+\t\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n+\t\tif (kvlist == NULL) {\n+\t\t\tDRV_LOG(ERR,\n+\t\t\t\t\"Failed to parse shared device arguments.\");\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\t/* Process parameters. */\n+\t\tret = rte_kvargs_process(kvlist, NULL,\n+\t\t\t\t\t mlx5_dev_args_check_handler, config);\n+\t\trte_kvargs_free(kvlist);\n+\t\tif (ret) {\n+\t\t\tDRV_LOG(ERR, \"Failed to process device arguments: %s\",\n+\t\t\t\tstrerror(rte_errno));\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t}\n+\t/* Adjust parameters according to device capabilities. */\n+\tif (config->dv_flow_en && !sh->dev_cap.dv_flow_en) {\n+\t\tDRV_LOG(WARNING, \"DV flow is not supported.\");\n+\t\tconfig->dv_flow_en = 0;\n+\t}\n+\tif (config->dv_esw_en && !sh->dev_cap.dv_esw_en) {\n+\t\tDRV_LOG(DEBUG, \"E-Switch DV flow is not supported.\");\n+\t\tconfig->dv_esw_en = 0;\n+\t}\n+\tif (config->dv_miss_info && config->dv_esw_en)\n+\t\tconfig->dv_xmeta_en = MLX5_XMETA_MODE_META16;\n+\tif (!config->dv_esw_en &&\n+\t    config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {\n+\t\tDRV_LOG(WARNING,\n+\t\t\t\"Metadata mode %u is not supported (no E-Switch).\",\n+\t\t\tconfig->dv_xmeta_en);\n+\t\tconfig->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;\n+\t}\n+\tif (config->tx_pp && !sh->dev_cap.txpp_en) {\n+\t\tDRV_LOG(ERR, \"Packet pacing is not supported.\");\n+\t\trte_errno = ENODEV;\n+\t\treturn -rte_errno;\n+\t}\n+\tif (!config->tx_pp && config->tx_skew) {\n+\t\tDRV_LOG(WARNING,\n+\t\t\t\"\\\"tx_skew\\\" doesn't affect without \\\"tx_pp\\\".\");\n+\t}\n+\t/*\n+\t * If HW has bug working with tunnel packet decapsulation and scatter\n+\t * FCS, and decapsulation is needed, clear the hw_fcs_strip bit.\n+\t * Then RTE_ETH_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.\n+\t */\n+\tif (sh->dev_cap.scatter_fcs_w_decap_disable && sh->config.decap_en)\n+\t\tconfig->hw_fcs_strip = 0;\n+\telse\n+\t\tconfig->hw_fcs_strip = sh->dev_cap.hw_fcs_strip;\n+\tDRV_LOG(DEBUG, \"FCS stripping configuration is %ssupported\",\n+\t\t(config->hw_fcs_strip ? \"\" : \"not \"));\n+\tDRV_LOG(DEBUG, \"\\\"tx_pp\\\" is %d.\", config->tx_pp);\n+\tDRV_LOG(DEBUG, \"\\\"tx_skew\\\" is %d.\", config->tx_skew);\n+\tDRV_LOG(DEBUG, \"\\\"reclaim_mode\\\" is %u.\", config->reclaim_mode);\n+\tDRV_LOG(DEBUG, \"\\\"dv_esw_en\\\" is %u.\", config->dv_esw_en);\n+\tDRV_LOG(DEBUG, \"\\\"dv_flow_en\\\" is %u.\", config->dv_flow_en);\n+\tDRV_LOG(DEBUG, \"\\\"dv_xmeta_en\\\" is %u.\", config->dv_xmeta_en);\n+\tDRV_LOG(DEBUG, \"\\\"dv_miss_info\\\" is %u.\", config->dv_miss_info);\n+\tDRV_LOG(DEBUG, \"\\\"l3_vxlan_en\\\" is %u.\", config->l3_vxlan_en);\n+\tDRV_LOG(DEBUG, \"\\\"vf_nl_en\\\" is %u.\", config->vf_nl_en);\n+\tDRV_LOG(DEBUG, \"\\\"lacp_by_user\\\" is %u.\", config->lacp_by_user);\n+\tDRV_LOG(DEBUG, \"\\\"decap_en\\\" is %u.\", config->decap_en);\n+\tDRV_LOG(DEBUG, \"\\\"allow_duplicate_pattern\\\" is %u.\",\n+\t\tconfig->allow_duplicate_pattern);\n+\treturn 0;\n+}\n+\n /**\n  * Configure realtime timestamp format.\n  *\n@@ -1216,16 +1398,13 @@ mlx5_rt_timestamp_config(struct mlx5_dev_ctx_shared *sh,\n  *\n  * @param[in] spawn\n  *   Pointer to the device attributes (name, port, etc).\n- * @param[in] config\n- *   Pointer to device configuration structure.\n  *\n  * @return\n  *   Pointer to mlx5_dev_ctx_shared object on success,\n  *   otherwise NULL and rte_errno is set.\n  */\n struct mlx5_dev_ctx_shared *\n-mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,\n-\t\t\t  const struct mlx5_dev_config *config)\n+mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn)\n {\n \tstruct mlx5_dev_ctx_shared *sh;\n \tint err = 0;\n@@ -1264,9 +1443,15 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,\n \t\tDRV_LOG(ERR, \"Fail to configure device capabilities.\");\n \t\tgoto error;\n \t}\n+\terr = mlx5_shared_dev_ctx_args_config(sh, sh->cdev->dev->devargs,\n+\t\t\t\t\t      &sh->config);\n+\tif (err) {\n+\t\tDRV_LOG(ERR, \"Failed to process device configure: %s\",\n+\t\t\tstrerror(rte_errno));\n+\t\tgoto error;\n+\t}\n \tsh->refcnt = 1;\n \tsh->max_port = spawn->max_port;\n-\tsh->reclaim_mode = config->reclaim_mode;\n \tstrncpy(sh->ibdev_name, mlx5_os_get_ctx_device_name(sh->cdev->ctx),\n \t\tsizeof(sh->ibdev_name) - 1);\n \tstrncpy(sh->ibdev_path, mlx5_os_get_ctx_device_path(sh->cdev->ctx),\n@@ -1310,7 +1495,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,\n \t}\n \tmlx5_flow_aging_init(sh);\n \tmlx5_flow_counters_mng_init(sh);\n-\tmlx5_flow_ipool_create(sh, config);\n+\tmlx5_flow_ipool_create(sh);\n \t/* Add context to the global device list. */\n \tLIST_INSERT_HEAD(&mlx5_dev_ctx_list, sh, next);\n \trte_spinlock_init(&sh->geneve_tlv_opt_sl);\n@@ -1919,14 +2104,18 @@ static int\n mlx5_args_check(const char *key, const char *val, void *opaque)\n {\n \tstruct mlx5_dev_config *config = opaque;\n-\tunsigned long mod;\n \tsigned long tmp;\n \n \t/* No-op, port representors are processed in mlx5_dev_spawn(). */\n \tif (!strcmp(MLX5_DRIVER_KEY, key) || !strcmp(MLX5_REPRESENTOR, key) ||\n \t    !strcmp(MLX5_SYS_MEM_EN, key) || !strcmp(MLX5_TX_DB_NC, key) ||\n-\t    !strcmp(MLX5_MR_MEMPOOL_REG_EN, key) ||\n-\t    !strcmp(MLX5_MR_EXT_MEMSEG_EN, key))\n+\t    !strcmp(MLX5_MR_MEMPOOL_REG_EN, key) || !strcmp(MLX5_TX_PP, key) ||\n+\t    !strcmp(MLX5_MR_EXT_MEMSEG_EN, key) || !strcmp(MLX5_TX_SKEW, key) ||\n+\t    !strcmp(MLX5_RECLAIM_MEM, key) || !strcmp(MLX5_DECAP_EN, key) ||\n+\t    !strcmp(MLX5_ALLOW_DUPLICATE_PATTERN, key) ||\n+\t    !strcmp(MLX5_L3_VXLAN_EN, key) || !strcmp(MLX5_VF_NL_EN, key) ||\n+\t    !strcmp(MLX5_DV_ESW_EN, key) || !strcmp(MLX5_DV_FLOW_EN, key) ||\n+\t    !strcmp(MLX5_DV_XMETA_EN, key) || !strcmp(MLX5_LACP_BY_USER, key))\n \t\treturn 0;\n \terrno = 0;\n \ttmp = strtol(val, NULL, 0);\n@@ -1935,13 +2124,12 @@ mlx5_args_check(const char *key, const char *val, void *opaque)\n \t\tDRV_LOG(WARNING, \"%s: \\\"%s\\\" is not a valid integer\", key, val);\n \t\treturn -rte_errno;\n \t}\n-\tif (tmp < 0 && strcmp(MLX5_TX_PP, key) && strcmp(MLX5_TX_SKEW, key)) {\n+\tif (tmp < 0) {\n \t\t/* Negative values are acceptable for some keys only. */\n \t\trte_errno = EINVAL;\n \t\tDRV_LOG(WARNING, \"%s: invalid negative value \\\"%s\\\"\", key, val);\n \t\treturn -rte_errno;\n \t}\n-\tmod = tmp >= 0 ? tmp : -tmp;\n \tif (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {\n \t\tif (tmp > MLX5_CQE_RESP_FORMAT_L34H_STRIDX) {\n \t\t\tDRV_LOG(ERR, \"invalid CQE compression \"\n@@ -1987,41 +2175,8 @@ mlx5_args_check(const char *key, const char *val, void *opaque)\n \t\tconfig->txq_inline_mpw = tmp;\n \t} else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {\n \t\tDRV_LOG(WARNING, \"%s: deprecated parameter, ignored\", key);\n-\t} else if (strcmp(MLX5_TX_PP, key) == 0) {\n-\t\tif (!mod) {\n-\t\t\tDRV_LOG(ERR, \"Zero Tx packet pacing parameter\");\n-\t\t\trte_errno = EINVAL;\n-\t\t\treturn -rte_errno;\n-\t\t}\n-\t\tconfig->tx_pp = tmp;\n-\t} else if (strcmp(MLX5_TX_SKEW, key) == 0) {\n-\t\tconfig->tx_skew = tmp;\n \t} else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {\n \t\tconfig->rx_vec_en = !!tmp;\n-\t} else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {\n-\t\tconfig->l3_vxlan_en = !!tmp;\n-\t} else if (strcmp(MLX5_VF_NL_EN, key) == 0) {\n-\t\tconfig->vf_nl_en = !!tmp;\n-\t} else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {\n-\t\tconfig->dv_esw_en = !!tmp;\n-\t} else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {\n-\t\tconfig->dv_flow_en = !!tmp;\n-\t} else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {\n-\t\tif (tmp != MLX5_XMETA_MODE_LEGACY &&\n-\t\t    tmp != MLX5_XMETA_MODE_META16 &&\n-\t\t    tmp != MLX5_XMETA_MODE_META32 &&\n-\t\t    tmp != MLX5_XMETA_MODE_MISS_INFO) {\n-\t\t\tDRV_LOG(ERR, \"invalid extensive \"\n-\t\t\t\t     \"metadata parameter\");\n-\t\t\trte_errno = EINVAL;\n-\t\t\treturn -rte_errno;\n-\t\t}\n-\t\tif (tmp != MLX5_XMETA_MODE_MISS_INFO)\n-\t\t\tconfig->dv_xmeta_en = tmp;\n-\t\telse\n-\t\t\tconfig->dv_miss_info = 1;\n-\t} else if (strcmp(MLX5_LACP_BY_USER, key) == 0) {\n-\t\tconfig->lacp_by_user = !!tmp;\n \t} else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {\n \t\tconfig->max_dump_files_num = tmp;\n \t} else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {\n@@ -2030,19 +2185,6 @@ mlx5_args_check(const char *key, const char *val, void *opaque)\n \t\tDRV_LOG(DEBUG, \"class argument is %s.\", val);\n \t} else if (strcmp(MLX5_HP_BUF_SIZE, key) == 0) {\n \t\tconfig->log_hp_size = tmp;\n-\t} else if (strcmp(MLX5_RECLAIM_MEM, key) == 0) {\n-\t\tif (tmp != MLX5_RCM_NONE &&\n-\t\t    tmp != MLX5_RCM_LIGHT &&\n-\t\t    tmp != MLX5_RCM_AGGR) {\n-\t\t\tDRV_LOG(ERR, \"Unrecognized %s: \\\"%s\\\"\", key, val);\n-\t\t\trte_errno = EINVAL;\n-\t\t\treturn -rte_errno;\n-\t\t}\n-\t\tconfig->reclaim_mode = tmp;\n-\t} else if (strcmp(MLX5_DECAP_EN, key) == 0) {\n-\t\tconfig->decap_en = !!tmp;\n-\t} else if (strcmp(MLX5_ALLOW_DUPLICATE_PATTERN, key) == 0) {\n-\t\tconfig->allow_duplicate_pattern = !!tmp;\n \t} else if (strcmp(MLX5_DELAY_DROP, key) == 0) {\n \t\tconfig->std_delay_drop = !!(tmp & MLX5_DELAY_DROP_STANDARD);\n \t\tconfig->hp_delay_drop = !!(tmp & MLX5_DELAY_DROP_HAIRPIN);\n@@ -2089,6 +2231,130 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)\n \treturn ret;\n }\n \n+/**\n+ * Check sibling device configurations when probing again.\n+ *\n+ * Sibling devices sharing infiniband device context should have compatible\n+ * configurations. This regards representors and bonding device.\n+ *\n+ * @param cdev\n+ *   Pointer to mlx5 device structure.\n+ *\n+ * @return\n+ *   0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_probe_again_args_validate(struct mlx5_common_device *cdev)\n+{\n+\tstruct mlx5_dev_ctx_shared *sh = NULL;\n+\tstruct mlx5_sh_config *config;\n+\tint ret;\n+\n+\t/* Secondary process should not handle devargs. */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\tpthread_mutex_lock(&mlx5_dev_ctx_list_mutex);\n+\t/* Search for IB context by common device pointer. */\n+\tLIST_FOREACH(sh, &mlx5_dev_ctx_list, next)\n+\t\tif (sh->cdev == cdev)\n+\t\t\tbreak;\n+\tpthread_mutex_unlock(&mlx5_dev_ctx_list_mutex);\n+\t/* There is sh for this device -> it isn't probe again. */\n+\tif (sh == NULL)\n+\t\treturn 0;\n+\tconfig = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,\n+\t\t\t     sizeof(struct mlx5_sh_config),\n+\t\t\t     RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);\n+\tif (config == NULL) {\n+\t\trte_errno = -ENOMEM;\n+\t\treturn -rte_errno;\n+\t}\n+\t/*\n+\t * Creates a temporary IB context configure structure according to new\n+\t * devargs attached in probing again.\n+\t */\n+\tret = mlx5_shared_dev_ctx_args_config(sh, sh->cdev->dev->devargs,\n+\t\t\t\t\t      config);\n+\tif (ret) {\n+\t\tDRV_LOG(ERR, \"Failed to process device configure: %s\",\n+\t\t\tstrerror(rte_errno));\n+\t\tmlx5_free(config);\n+\t\treturn ret;\n+\t}\n+\t/*\n+\t * Checks the match between the temporary structure and the existing\n+\t * IB context structure.\n+\t */\n+\tif (sh->config.dv_flow_en ^ config->dv_flow_en) {\n+\t\tDRV_LOG(ERR, \"\\\"dv_flow_en\\\" \"\n+\t\t\t\"configuration mismatch for shared %s context.\",\n+\t\t\tsh->ibdev_name);\n+\t\tgoto error;\n+\t}\n+\tif ((sh->config.dv_xmeta_en ^ config->dv_xmeta_en) ||\n+\t    (sh->config.dv_miss_info ^ config->dv_miss_info)) {\n+\t\tDRV_LOG(ERR, \"\\\"dv_xmeta_en\\\" \"\n+\t\t\t\"configuration mismatch for shared %s context.\",\n+\t\t\tsh->ibdev_name);\n+\t\tgoto error;\n+\t}\n+\tif (sh->config.dv_esw_en ^ config->dv_esw_en) {\n+\t\tDRV_LOG(ERR, \"\\\"dv_esw_en\\\" \"\n+\t\t\t\"configuration mismatch for shared %s context.\",\n+\t\t\tsh->ibdev_name);\n+\t\tgoto error;\n+\t}\n+\tif (sh->config.reclaim_mode ^ config->reclaim_mode) {\n+\t\tDRV_LOG(ERR, \"\\\"reclaim_mode\\\" \"\n+\t\t\t\"configuration mismatch for shared %s context.\",\n+\t\t\tsh->ibdev_name);\n+\t\tgoto error;\n+\t}\n+\tif (sh->config.allow_duplicate_pattern ^\n+\t    config->allow_duplicate_pattern) {\n+\t\tDRV_LOG(ERR, \"\\\"allow_duplicate_pattern\\\" \"\n+\t\t\t\"configuration mismatch for shared %s context.\",\n+\t\t\tsh->ibdev_name);\n+\t\tgoto error;\n+\t}\n+\tif (sh->config.l3_vxlan_en ^ config->l3_vxlan_en) {\n+\t\tDRV_LOG(ERR, \"\\\"l3_vxlan_en\\\" \"\n+\t\t\t\"configuration mismatch for shared %s context.\",\n+\t\t\tsh->ibdev_name);\n+\t\tgoto error;\n+\t}\n+\tif (sh->config.decap_en ^ config->decap_en) {\n+\t\tDRV_LOG(ERR, \"\\\"decap_en\\\" \"\n+\t\t\t\"configuration mismatch for shared %s context.\",\n+\t\t\tsh->ibdev_name);\n+\t\tgoto error;\n+\t}\n+\tif (sh->config.lacp_by_user ^ config->lacp_by_user) {\n+\t\tDRV_LOG(ERR, \"\\\"lacp_by_user\\\" \"\n+\t\t\t\"configuration mismatch for shared %s context.\",\n+\t\t\tsh->ibdev_name);\n+\t\tgoto error;\n+\t}\n+\tif (sh->config.tx_pp ^ config->tx_pp) {\n+\t\tDRV_LOG(ERR, \"\\\"tx_pp\\\" \"\n+\t\t\t\"configuration mismatch for shared %s context.\",\n+\t\t\tsh->ibdev_name);\n+\t\tgoto error;\n+\t}\n+\tif (sh->config.tx_skew ^ config->tx_skew) {\n+\t\tDRV_LOG(ERR, \"\\\"tx_skew\\\" \"\n+\t\t\t\"configuration mismatch for shared %s context.\",\n+\t\t\tsh->ibdev_name);\n+\t\tgoto error;\n+\t}\n+\tmlx5_free(config);\n+\treturn 0;\n+error:\n+\tmlx5_free(config);\n+\trte_errno = EINVAL;\n+\treturn -rte_errno;\n+}\n+\n /**\n  * Configures the minimal amount of data to inline into WQE\n  * while sending packets.\n@@ -2231,7 +2497,7 @@ mlx5_set_metadata_mask(struct rte_eth_dev *dev)\n \tuint32_t meta, mark, reg_c0;\n \n \treg_c0 = ~priv->vport_meta_mask;\n-\tswitch (priv->config.dv_xmeta_en) {\n+\tswitch (sh->config.dv_xmeta_en) {\n \tcase MLX5_XMETA_MODE_LEGACY:\n \t\tmeta = UINT32_MAX;\n \t\tmark = MLX5_FLOW_MARK_MASK;\n@@ -2265,7 +2531,7 @@ mlx5_set_metadata_mask(struct rte_eth_dev *dev)\n \t\t\t\t sh->dv_meta_mask, reg_c0);\n \telse\n \t\tsh->dv_regc0_mask = reg_c0;\n-\tDRV_LOG(DEBUG, \"metadata mode %u\", priv->config.dv_xmeta_en);\n+\tDRV_LOG(DEBUG, \"metadata mode %u\", sh->config.dv_xmeta_en);\n \tDRV_LOG(DEBUG, \"metadata MARK mask %08X\", sh->dv_mark_mask);\n \tDRV_LOG(DEBUG, \"metadata META mask %08X\", sh->dv_meta_mask);\n \tDRV_LOG(DEBUG, \"metadata reg_c0 mask %08X\", sh->dv_regc0_mask);\n@@ -2291,61 +2557,6 @@ rte_pmd_mlx5_get_dyn_flag_names(char *names[], unsigned int n)\n \treturn RTE_DIM(dynf_names);\n }\n \n-/**\n- * Check sibling device configurations.\n- *\n- * Sibling devices sharing the Infiniband device context should have compatible\n- * configurations. This regards representors and bonding device.\n- *\n- * @param sh\n- *   Shared device context.\n- * @param config\n- *   Configuration of the device is going to be created.\n- * @param dpdk_dev\n- *   Backing DPDK device.\n- *\n- * @return\n- *   0 on success, EINVAL otherwise\n- */\n-int\n-mlx5_dev_check_sibling_config(struct mlx5_dev_ctx_shared *sh,\n-\t\t\t      struct mlx5_dev_config *config,\n-\t\t\t      struct rte_device *dpdk_dev)\n-{\n-\tstruct mlx5_dev_config *sh_conf = NULL;\n-\tuint16_t port_id;\n-\n-\tMLX5_ASSERT(sh);\n-\t/* Nothing to compare for the single/first device. */\n-\tif (sh->refcnt == 1)\n-\t\treturn 0;\n-\t/* Find the device with shared context. */\n-\tMLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {\n-\t\tstruct mlx5_priv *opriv =\n-\t\t\trte_eth_devices[port_id].data->dev_private;\n-\n-\t\tif (opriv && opriv->sh == sh) {\n-\t\t\tsh_conf = &opriv->config;\n-\t\t\tbreak;\n-\t\t}\n-\t}\n-\tif (!sh_conf)\n-\t\treturn 0;\n-\tif (sh_conf->dv_flow_en ^ config->dv_flow_en) {\n-\t\tDRV_LOG(ERR, \"\\\"dv_flow_en\\\" configuration mismatch\"\n-\t\t\t     \" for shared %s context\", sh->ibdev_name);\n-\t\trte_errno = EINVAL;\n-\t\treturn rte_errno;\n-\t}\n-\tif (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {\n-\t\tDRV_LOG(ERR, \"\\\"dv_xmeta_en\\\" configuration mismatch\"\n-\t\t\t     \" for shared %s context\", sh->ibdev_name);\n-\t\trte_errno = EINVAL;\n-\t\treturn rte_errno;\n-\t}\n-\treturn 0;\n-}\n-\n /**\n  * Look for the ethernet device belonging to mlx5 driver.\n  *\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex bda09cf96e..5ca48ef68f 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -252,23 +252,10 @@ struct mlx5_stats_ctrl {\n  */\n struct mlx5_dev_config {\n \tunsigned int hw_vlan_insert:1; /* VLAN insertion in WQE is supported. */\n-\tunsigned int hw_fcs_strip:1; /* FCS stripping is supported. */\n \tunsigned int hw_padding:1; /* End alignment padding is supported. */\n \tunsigned int cqe_comp:1; /* CQE compression is enabled. */\n \tunsigned int cqe_comp_fmt:3; /* CQE compression format. */\n \tunsigned int rx_vec_en:1; /* Rx vector is enabled. */\n-\tunsigned int l3_vxlan_en:1; /* Enable L3 VXLAN flow creation. */\n-\tunsigned int vf_nl_en:1; /* Enable Netlink requests in VF mode. */\n-\tunsigned int dv_esw_en:1; /* Enable E-Switch DV flow. */\n-\tunsigned int dv_flow_en:1; /* Enable DV flow. */\n-\tunsigned int dv_xmeta_en:2; /* Enable extensive flow metadata. */\n-\tunsigned int lacp_by_user:1;\n-\t/* Enable user to manage LACP traffic. */\n-\tunsigned int reclaim_mode:2; /* Memory reclaim mode. */\n-\tunsigned int decap_en:1; /* Whether decap will be used or not. */\n-\tunsigned int dv_miss_info:1; /* restore packet after partial hw miss */\n-\tunsigned int allow_duplicate_pattern:1;\n-\t/* Allow/Prevent the duplicate rules pattern. */\n \tunsigned int std_delay_drop:1; /* Enable standard Rxq delay drop. */\n \tunsigned int hp_delay_drop:1; /* Enable hairpin Rxq delay drop. */\n \tstruct {\n@@ -288,8 +275,29 @@ struct mlx5_dev_config {\n \tint txq_inline_min; /* Minimal amount of data bytes to inline. */\n \tint txq_inline_max; /* Max packet size for inlining with SEND. */\n \tint txq_inline_mpw; /* Max packet size for inlining with eMPW. */\n+};\n+\n+/*\n+ * Share context device configuration structure.\n+ * User device parameters disabled features.\n+ * This structure updated once for device in mlx5_alloc_shared_dev_ctx()\n+ * function and cannot change even when probing again.\n+ */\n+struct mlx5_sh_config {\n \tint tx_pp; /* Timestamp scheduling granularity in nanoseconds. */\n \tint tx_skew; /* Tx scheduling skew between WQE and data on wire. */\n+\tuint32_t reclaim_mode:2; /* Memory reclaim mode. */\n+\tuint32_t dv_esw_en:1; /* Enable E-Switch DV flow. */\n+\tuint32_t dv_flow_en:1; /* Enable DV flow. */\n+\tuint32_t dv_xmeta_en:2; /* Enable extensive flow metadata. */\n+\tuint32_t dv_miss_info:1; /* Restore packet after partial hw miss. */\n+\tuint32_t l3_vxlan_en:1; /* Enable L3 VXLAN flow creation. */\n+\tuint32_t vf_nl_en:1; /* Enable Netlink requests in VF mode. */\n+\tuint32_t lacp_by_user:1; /* Enable user to manage LACP traffic. */\n+\tuint32_t decap_en:1; /* Whether decap will be used or not. */\n+\tuint32_t hw_fcs_strip:1; /* FCS stripping is supported. */\n+\tuint32_t allow_duplicate_pattern:1;\n+\t/* Allow/Prevent the duplicate rules pattern. */\n };\n \n \n@@ -1144,7 +1152,6 @@ struct mlx5_dev_ctx_shared {\n \tuint32_t ct_aso_en:1; /* Connection Tracking ASO is supported. */\n \tuint32_t tunnel_header_0_1:1; /* tunnel_header_0_1 is supported. */\n \tuint32_t misc5_cap:1; /* misc5 matcher parameter is supported. */\n-\tuint32_t reclaim_mode:1; /* Reclaim memory. */\n \tuint32_t dr_drop_action_en:1; /* Use DR drop action. */\n \tuint32_t drop_action_check_flag:1; /* Check Flag for drop action. */\n \tuint32_t flow_priority_check_flag:1; /* Check Flag for flow priority. */\n@@ -1156,6 +1163,7 @@ struct mlx5_dev_ctx_shared {\n \tchar ibdev_name[MLX5_FS_NAME_MAX]; /* SYSFS dev name. */\n \tchar ibdev_path[MLX5_FS_PATH_MAX]; /* SYSFS dev path for secondary */\n \tstruct mlx5_dev_cap dev_cap; /* Device capabilities. */\n+\tstruct mlx5_sh_config config; /* Device configuration. */\n \tint numa_node; /* Numa node of backing physical device. */\n \t/* Packet pacing related structure. */\n \tstruct mlx5_dev_txpp txpp;\n@@ -1511,8 +1519,7 @@ int mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs);\n void mlx5_rt_timestamp_config(struct mlx5_dev_ctx_shared *sh,\n \t\t\t      struct mlx5_hca_attr *hca_attr);\n struct mlx5_dev_ctx_shared *\n-mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,\n-\t\t\t   const struct mlx5_dev_config *config);\n+mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn);\n void mlx5_free_shared_dev_ctx(struct mlx5_dev_ctx_shared *sh);\n int mlx5_dev_ctx_shared_mempool_subscribe(struct rte_eth_dev *dev);\n void mlx5_free_table_hash_list(struct mlx5_priv *priv);\n@@ -1520,9 +1527,7 @@ int mlx5_alloc_table_hash_list(struct mlx5_priv *priv);\n void mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,\n \t\t\t struct mlx5_dev_config *config);\n void mlx5_set_metadata_mask(struct rte_eth_dev *dev);\n-int mlx5_dev_check_sibling_config(struct mlx5_dev_ctx_shared *sh,\n-\t\t\t\t  struct mlx5_dev_config *config,\n-\t\t\t\t  struct rte_device *dpdk_dev);\n+int mlx5_probe_again_args_validate(struct mlx5_common_device *cdev);\n bool mlx5_flex_parser_ecpri_exist(struct rte_eth_dev *dev);\n int mlx5_flex_parser_ecpri_alloc(struct rte_eth_dev *dev);\n void mlx5_flow_counter_mode_config(struct rte_eth_dev *dev);\ndiff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c\nindex b7fe781d3a..9e478db8df 100644\n--- a/drivers/net/mlx5/mlx5_ethdev.c\n+++ b/drivers/net/mlx5/mlx5_ethdev.c\n@@ -720,10 +720,9 @@ int\n mlx5_hairpin_cap_get(struct rte_eth_dev *dev, struct rte_eth_hairpin_cap *cap)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n \n \tif (!priv->sh->cdev->config.devx || !priv->sh->dev_cap.dest_tir ||\n-\t    !config->dv_flow_en) {\n+\t    !priv->sh->config.dv_flow_en) {\n \t\trte_errno = ENOTSUP;\n \t\treturn -rte_errno;\n \t}\ndiff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex 8bb9a72ba5..f8fc4621c9 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -901,7 +901,7 @@ mlx5_flow_get_reg_id(struct rte_eth_dev *dev,\n \t\t     struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n+\tstruct mlx5_sh_config *config = &priv->sh->config;\n \tenum modify_reg start_reg;\n \tbool skip_mtr_reg = false;\n \n@@ -1994,7 +1994,7 @@ mlx5_flow_validate_attributes(struct rte_eth_dev *dev,\n \t\treturn rte_flow_error_set(error, ENOTSUP,\n \t\t\t\t\t  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,\n \t\t\t\t\t  \"egress is not supported\");\n-\tif (attributes->transfer && !priv->config.dv_esw_en)\n+\tif (attributes->transfer && !priv->sh->config.dv_esw_en)\n \t\treturn rte_flow_error_set(error, ENOTSUP,\n \t\t\t\t\t  RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,\n \t\t\t\t\t  NULL, \"transfer is not supported\");\n@@ -2711,7 +2711,7 @@ mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,\n \t\tuint8_t vni[4];\n \t} id = { .vlan_id = 0, };\n \n-\tif (!priv->config.l3_vxlan_en)\n+\tif (!priv->sh->config.l3_vxlan_en)\n \t\treturn rte_flow_error_set(error, ENOTSUP,\n \t\t\t\t\t  RTE_FLOW_ERROR_TYPE_ITEM, item,\n \t\t\t\t\t  \"L3 VXLAN is not enabled by device\"\n@@ -3429,11 +3429,11 @@ flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)\n \tif (type != MLX5_FLOW_TYPE_MAX)\n \t\treturn type;\n \t/* If no OS specific type - continue with DV/VERBS selection */\n-\tif (attr->transfer && priv->config.dv_esw_en)\n+\tif (attr->transfer && priv->sh->config.dv_esw_en)\n \t\ttype = MLX5_FLOW_TYPE_DV;\n \tif (!attr->transfer)\n-\t\ttype = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :\n-\t\t\t\t\t\t MLX5_FLOW_TYPE_VERBS;\n+\t\ttype = priv->sh->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :\n+\t\t\t\t\t\t     MLX5_FLOW_TYPE_VERBS;\n \treturn type;\n }\n \n@@ -4105,7 +4105,7 @@ static bool flow_check_modify_action_type(struct rte_eth_dev *dev,\n \t\treturn true;\n \tcase RTE_FLOW_ACTION_TYPE_FLAG:\n \tcase RTE_FLOW_ACTION_TYPE_MARK:\n-\t\tif (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)\n+\t\tif (priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)\n \t\t\treturn true;\n \t\telse\n \t\t\treturn false;\n@@ -4544,8 +4544,8 @@ flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,\n \tuint32_t mark_id;\n \n \t/* Check whether extensive metadata feature is engaged. */\n-\tif (!priv->config.dv_flow_en ||\n-\t    priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||\n+\tif (!priv->sh->config.dv_flow_en ||\n+\t    priv->sh->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||\n \t    !mlx5_flow_ext_mreg_supported(dev) ||\n \t    !priv->sh->dv_regc0_mask)\n \t\treturn 0;\n@@ -4604,7 +4604,7 @@ flow_mreg_update_copy_table(struct rte_eth_dev *dev,\n \t\t\t    struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n+\tstruct mlx5_sh_config *config = &priv->sh->config;\n \tstruct mlx5_flow_mreg_copy_resource *mcp_res;\n \tconst struct rte_flow_action_mark *mark;\n \n@@ -5740,7 +5740,7 @@ flow_create_split_metadata(struct rte_eth_dev *dev,\n \t\t\t   struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n+\tstruct mlx5_sh_config *config = &priv->sh->config;\n \tconst struct rte_flow_action *qrss = NULL;\n \tstruct rte_flow_action *ext_actions = NULL;\n \tstruct mlx5_flow *dev_flow = NULL;\n@@ -8249,7 +8249,7 @@ mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)\n \t\tstruct rte_flow *flow;\n \t\tstruct rte_flow_error error;\n \n-\t\tif (!priv->config.dv_flow_en)\n+\t\tif (!priv->sh->config.dv_flow_en)\n \t\t\tbreak;\n \t\t/* Create internal flow, validation skips copy action. */\n \t\tflow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,\n@@ -8563,7 +8563,7 @@ mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,\n \tstruct mlx5_flow_handle *dh;\n \tstruct rte_flow *flow;\n \n-\tif (!priv->config.dv_flow_en) {\n+\tif (!sh->config.dv_flow_en) {\n \t\tif (fputs(\"device dv flow disabled\\n\", file) <= 0)\n \t\t\treturn -errno;\n \t\treturn -ENOTSUP;\n@@ -9547,7 +9547,7 @@ mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \n-\tif (!priv->config.dv_flow_en)\n+\tif (!priv->sh->config.dv_flow_en)\n \t\treturn rte_flow_error_set(error, ENOTSUP,\n \t\t\t\t\t  RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,\n \t\t\t\t\t  \"flow DV interface is off\");\n@@ -9966,7 +9966,7 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev)\n \ttype = mlx5_flow_os_get_type();\n \tif (type == MLX5_FLOW_TYPE_MAX) {\n \t\ttype = MLX5_FLOW_TYPE_VERBS;\n-\t\tif (priv->sh->cdev->config.devx && priv->config.dv_flow_en)\n+\t\tif (priv->sh->cdev->config.devx && priv->sh->config.dv_flow_en)\n \t\t\ttype = MLX5_FLOW_TYPE_DV;\n \t}\n \tfops = flow_get_drv_ops(type);\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 7fec79afb3..583e8b7321 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -963,7 +963,7 @@ is_tunnel_offload_active(const struct rte_eth_dev *dev)\n {\n #ifdef HAVE_IBV_FLOW_DV_SUPPORT\n \tconst struct mlx5_priv *priv = dev->data->dev_private;\n-\treturn !!priv->config.dv_miss_info;\n+\treturn !!priv->sh->config.dv_miss_info;\n #else\n \tRTE_SET_USED(dev);\n \treturn false;\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 6a5ac01c2a..c30cb4c203 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -1146,7 +1146,8 @@ flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,\n \t\tuint32_t reg_c0 = priv->sh->dv_regc0_mask;\n \n \t\tMLX5_ASSERT(reg_c0);\n-\t\tMLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);\n+\t\tMLX5_ASSERT(priv->sh->config.dv_xmeta_en !=\n+\t\t\t    MLX5_XMETA_MODE_LEGACY);\n \t\tif (conf->dst == REG_C_0) {\n \t\t\t/* Copy to reg_c[0], within mask only. */\n \t\t\treg_dst.offset = rte_bsf32(reg_c0);\n@@ -1917,7 +1918,7 @@ flow_dv_validate_item_mark(struct rte_eth_dev *dev,\n \t\t\t   struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n+\tstruct mlx5_sh_config *config = &priv->sh->config;\n \tconst struct rte_flow_item_mark *spec = item->spec;\n \tconst struct rte_flow_item_mark *mask = item->mask;\n \tconst struct rte_flow_item_mark nic_mask = {\n@@ -1991,7 +1992,7 @@ flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,\n \t\t\t   struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n+\tstruct mlx5_sh_config *config = &priv->sh->config;\n \tconst struct rte_flow_item_meta *spec = item->spec;\n \tconst struct rte_flow_item_meta *mask = item->mask;\n \tstruct rte_flow_item_meta nic_mask = {\n@@ -3041,7 +3042,7 @@ flow_dv_validate_action_flag(struct rte_eth_dev *dev,\n \t\t\t     struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n+\tstruct mlx5_sh_config *config = &priv->sh->config;\n \tint ret;\n \n \t/* Fall back if no extended metadata register support. */\n@@ -3100,7 +3101,7 @@ flow_dv_validate_action_mark(struct rte_eth_dev *dev,\n \t\t\t     struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n+\tstruct mlx5_sh_config *config = &priv->sh->config;\n \tconst struct rte_flow_action_mark *mark = action->conf;\n \tint ret;\n \n@@ -3174,7 +3175,7 @@ flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,\n \t\t\t\t struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n+\tstruct mlx5_sh_config *config = &priv->sh->config;\n \tconst struct rte_flow_action_set_meta *conf;\n \tuint32_t nic_mask = UINT32_MAX;\n \tint reg;\n@@ -3386,7 +3387,7 @@ flow_dv_validate_action_decap(struct rte_eth_dev *dev,\n \tconst struct mlx5_priv *priv = dev->data->dev_private;\n \n \tif (priv->sh->cdev->config.hca_attr.scatter_fcs_w_decap_disable &&\n-\t    !priv->config.decap_en)\n+\t    !priv->sh->config.decap_en)\n \t\treturn rte_flow_error_set(error, ENOTSUP,\n \t\t\t\t\t  RTE_FLOW_ERROR_TYPE_ACTION, NULL,\n \t\t\t\t\t  \"decap is not enabled\");\n@@ -4811,7 +4812,7 @@ flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,\n {\n \tint ret = 0;\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n+\tstruct mlx5_sh_config *config = &priv->sh->config;\n \tconst struct rte_flow_action_modify_field *action_modify_field =\n \t\taction->conf;\n \tuint32_t dst_width = mlx5_flow_item_field_width(dev,\n@@ -5423,8 +5424,9 @@ flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)\n \t\t       .grow_trunk = 3,\n \t\t       .grow_shift = 2,\n \t\t       .need_lock = 1,\n-\t\t       .release_mem_en = !!sh->reclaim_mode,\n-\t\t       .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),\n+\t\t       .release_mem_en = !!sh->config.reclaim_mode,\n+\t\t       .per_core_cache =\n+\t\t\t\t       sh->config.reclaim_mode ? 0 : (1 << 16),\n \t\t       .malloc = mlx5_malloc,\n \t\t       .free = mlx5_free,\n \t\t       .type = \"mlx5_modify_action_resource\",\n@@ -5571,7 +5573,7 @@ flow_dv_validate_action_sample(uint64_t *action_flags,\n \t\t\t       struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *dev_conf = &priv->config;\n+\tstruct mlx5_sh_config *dev_conf = &priv->sh->config;\n \tconst struct rte_flow_action_sample *sample = action->conf;\n \tconst struct rte_flow_action *act;\n \tuint64_t sub_action_flags = 0;\n@@ -6595,7 +6597,7 @@ flow_dv_validate_attributes(struct rte_eth_dev *dev,\n \t\t\t\t\t  NULL,\n \t\t\t\t\t  \"priority out of range\");\n \tif (attributes->transfer) {\n-\t\tif (!priv->config.dv_esw_en)\n+\t\tif (!priv->sh->config.dv_esw_en)\n \t\t\treturn rte_flow_error_set\n \t\t\t\t(error, ENOTSUP,\n \t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,\n@@ -6880,7 +6882,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,\n \t\t},\n \t};\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *dev_conf = &priv->config;\n+\tstruct mlx5_sh_config *dev_conf = &priv->sh->config;\n \tuint16_t queue_index = 0xFFFF;\n \tconst struct rte_flow_item_vlan *vlan_m = NULL;\n \tuint32_t rw_act_num = 0;\n@@ -6904,7 +6906,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,\n \ttunnel = is_tunnel_offload_active(dev) ?\n \t\t mlx5_get_tof(items, actions, &tof_rule_type) : NULL;\n \tif (tunnel) {\n-\t\tif (!priv->config.dv_flow_en)\n+\t\tif (!dev_conf->dv_flow_en)\n \t\t\treturn rte_flow_error_set\n \t\t\t\t(error, ENOTSUP,\n \t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n@@ -12640,7 +12642,7 @@ flow_dv_translate(struct rte_eth_dev *dev,\n \t\t  struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *dev_conf = &priv->config;\n+\tstruct mlx5_sh_config *dev_conf = &priv->sh->config;\n \tstruct rte_flow *flow = dev_flow->flow;\n \tstruct mlx5_flow_handle *handle = dev_flow->handle;\n \tstruct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();\n@@ -13994,7 +13996,7 @@ flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,\n \t\t\t\t(error, errno,\n \t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n \t\t\t\tNULL,\n-\t\t\t\t(!priv->config.allow_duplicate_pattern &&\n+\t\t\t\t(!priv->sh->config.allow_duplicate_pattern &&\n \t\t\t\terrno == EEXIST) ?\n \t\t\t\t\"duplicating pattern is not allowed\" :\n \t\t\t\t\"hardware refuses to create flow\");\n@@ -16064,7 +16066,7 @@ flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tint i;\n \n-\tif (!fm || !priv->config.dv_flow_en)\n+\tif (!fm || !priv->sh->config.dv_flow_en)\n \t\treturn;\n \tfor (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {\n \t\tif (fm->drop_rule[i]) {\n@@ -16670,7 +16672,8 @@ flow_dv_create_def_policy(struct rte_eth_dev *dev)\n \n \t/* Non-termination policy table. */\n \tfor (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {\n-\t\tif (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)\n+\t\tif (!priv->sh->config.dv_esw_en &&\n+\t\t    i == MLX5_MTR_DOMAIN_TRANSFER)\n \t\t\tcontinue;\n \t\tif (__flow_dv_create_domain_def_policy(dev, i)) {\n \t\t\tDRV_LOG(ERR, \"Failed to create default policy\");\n@@ -17781,7 +17784,7 @@ flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,\n \t\t\tstruct rte_mtr_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *dev_conf = &priv->config;\n+\tstruct mlx5_sh_config *dev_conf = &priv->sh->config;\n \tconst struct rte_flow_action *act;\n \tuint64_t action_flags[RTE_COLORS] = {0};\n \tint actions_n;\n@@ -17795,7 +17798,7 @@ flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,\n \tbool def_yellow = false;\n \tconst struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};\n \n-\tif (!priv->config.dv_esw_en)\n+\tif (!dev_conf->dv_esw_en)\n \t\tdef_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;\n \t*domain_bitmap = def_domain;\n \t/* Red color could only support DROP action. */\n@@ -17839,7 +17842,7 @@ flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,\n \t\t\tswitch (act->type) {\n \t\t\tcase RTE_FLOW_ACTION_TYPE_PORT_ID:\n \t\t\tcase RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:\n-\t\t\t\tif (!priv->config.dv_esw_en)\n+\t\t\t\tif (!dev_conf->dv_esw_en)\n \t\t\t\t\treturn -rte_mtr_error_set(error,\n \t\t\t\t\tENOTSUP,\n \t\t\t\t\tRTE_MTR_ERROR_TYPE_METER_POLICY,\ndiff --git a/drivers/net/mlx5/mlx5_flow_meter.c b/drivers/net/mlx5/mlx5_flow_meter.c\nindex 77ae326bb7..393c13e3c5 100644\n--- a/drivers/net/mlx5/mlx5_flow_meter.c\n+++ b/drivers/net/mlx5/mlx5_flow_meter.c\n@@ -650,8 +650,8 @@ mlx5_flow_meter_policy_validate(struct rte_eth_dev *dev,\n \tstruct rte_mtr_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct rte_flow_attr attr = { .transfer =\n-\t\t\tpriv->config.dv_esw_en ? 1 : 0};\n+\tstruct rte_flow_attr attr = { .transfer = priv->sh->config.dv_esw_en ?\n+\t\t\t\t\t\t  1 : 0 };\n \tbool is_rss = false;\n \tuint8_t policy_mode;\n \tuint8_t domain_bitmap;\n@@ -738,8 +738,8 @@ mlx5_flow_meter_policy_add(struct rte_eth_dev *dev,\n \t\t\tstruct rte_mtr_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct rte_flow_attr attr = { .transfer =\n-\t\t\tpriv->config.dv_esw_en ? 1 : 0};\n+\tstruct rte_flow_attr attr = { .transfer = priv->sh->config.dv_esw_en ?\n+\t\t\t\t\t\t  1 : 0 };\n \tuint32_t sub_policy_idx = 0;\n \tuint32_t policy_idx = 0;\n \tstruct mlx5_flow_meter_policy *mtr_policy = NULL;\n@@ -1205,7 +1205,7 @@ mlx5_flow_meter_create(struct rte_eth_dev *dev, uint32_t meter_id,\n \t\t\t(&priv->sh->mtrmng->def_policy_ref_cnt,\n \t\t\t1, __ATOMIC_RELAXED);\n \t\tdomain_bitmap = MLX5_MTR_ALL_DOMAIN_BIT;\n-\t\tif (!priv->config.dv_esw_en)\n+\t\tif (!priv->sh->config.dv_esw_en)\n \t\t\tdomain_bitmap &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;\n \t} else {\n \t\tif (!priv->sh->meter_aso_en)\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex bcb04018f8..1d1f2556de 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -359,14 +359,13 @@ uint64_t\n mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_dev_config *config = &priv->config;\n \tuint64_t offloads = (RTE_ETH_RX_OFFLOAD_SCATTER |\n \t\t\t     RTE_ETH_RX_OFFLOAD_TIMESTAMP |\n \t\t\t     RTE_ETH_RX_OFFLOAD_RSS_HASH);\n \n-\tif (!config->mprq.enabled)\n+\tif (!priv->config.mprq.enabled)\n \t\toffloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;\n-\tif (config->hw_fcs_strip)\n+\tif (priv->sh->config.hw_fcs_strip)\n \t\toffloads |= RTE_ETH_RX_OFFLOAD_KEEP_CRC;\n \tif (priv->sh->dev_cap.hw_csum)\n \t\toffloads |= (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |\n@@ -1896,7 +1895,7 @@ mlx5_rxq_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,\n \ttmpl->rxq.crc_present = 0;\n \ttmpl->rxq.lro = lro_on_queue;\n \tif (offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) {\n-\t\tif (config->hw_fcs_strip) {\n+\t\tif (priv->sh->config.hw_fcs_strip) {\n \t\t\t/*\n \t\t\t * RQs used for LRO-enabled TIRs should not be\n \t\t\t * configured to scatter the FCS.\ndiff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c\nindex 72dfb2128a..eb03e9f7b1 100644\n--- a/drivers/net/mlx5/mlx5_trigger.c\n+++ b/drivers/net/mlx5/mlx5_trigger.c\n@@ -1104,7 +1104,7 @@ mlx5_dev_start(struct rte_eth_dev *dev)\n \t\t\tdev->data->port_id, strerror(rte_errno));\n \t\tgoto error;\n \t}\n-\tif ((priv->sh->cdev->config.devx && priv->config.dv_flow_en &&\n+\tif ((priv->sh->cdev->config.devx && priv->sh->config.dv_flow_en &&\n \t     priv->sh->dev_cap.dest_tir) &&\n \t    priv->obj_ops.lb_dummy_queue_create) {\n \t\tret = priv->obj_ops.lb_dummy_queue_create(dev);\n@@ -1277,8 +1277,6 @@ mlx5_dev_stop(struct rte_eth_dev *dev)\n  * Enable traffic flows configured by control plane\n  *\n  * @param dev\n- *   Pointer to Ethernet device private data.\n- * @param dev\n  *   Pointer to Ethernet device structure.\n  *\n  * @return\n@@ -1331,7 +1329,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)\n \t\t\t\tgoto error;\n \t\t\t}\n \t\t}\n-\t\tif (priv->config.dv_esw_en) {\n+\t\tif (priv->sh->config.dv_esw_en) {\n \t\t\tif (mlx5_flow_create_devx_sq_miss_flow(dev, i) == 0) {\n \t\t\t\tDRV_LOG(ERR,\n \t\t\t\t\t\"Port %u Tx queue %u SQ create representor devx default miss rule failed.\",\n@@ -1341,7 +1339,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)\n \t\t}\n \t\tmlx5_txq_release(dev, i);\n \t}\n-\tif (priv->config.dv_esw_en) {\n+\tif (priv->sh->config.dv_esw_en) {\n \t\tif (mlx5_flow_create_esw_table_zero_flow(dev))\n \t\t\tpriv->fdb_def_rule = 1;\n \t\telse\n@@ -1349,7 +1347,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)\n \t\t\t\t\" configured - only Eswitch group 0 flows are\"\n \t\t\t\t\" supported.\", dev->data->port_id);\n \t}\n-\tif (!priv->config.lacp_by_user && priv->pf_bond >= 0) {\n+\tif (!priv->sh->config.lacp_by_user && priv->pf_bond >= 0) {\n \t\tret = mlx5_flow_lacp_miss(dev);\n \t\tif (ret)\n \t\t\tDRV_LOG(INFO, \"port %u LACP rule cannot be created - \"\ndiff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c\nindex 1d16ebcb41..fe74317fe8 100644\n--- a/drivers/net/mlx5/mlx5_txpp.c\n+++ b/drivers/net/mlx5/mlx5_txpp.c\n@@ -816,15 +816,15 @@ mlx5_txpp_start_service(struct mlx5_dev_ctx_shared *sh)\n  * Returns 0 on success, negative otherwise\n  */\n static int\n-mlx5_txpp_create(struct mlx5_dev_ctx_shared *sh, struct mlx5_priv *priv)\n+mlx5_txpp_create(struct mlx5_dev_ctx_shared *sh)\n {\n-\tint tx_pp = priv->config.tx_pp;\n+\tint tx_pp = sh->config.tx_pp;\n \tint ret;\n \n \t/* Store the requested pacing parameters. */\n \tsh->txpp.tick = tx_pp >= 0 ? tx_pp : -tx_pp;\n \tsh->txpp.test = !!(tx_pp < 0);\n-\tsh->txpp.skew = priv->config.tx_skew;\n+\tsh->txpp.skew = sh->config.tx_skew;\n \tsh->txpp.freq = sh->cdev->config.hca_attr.dev_freq_khz;\n \tret = mlx5_txpp_create_event_channel(sh);\n \tif (ret)\n@@ -891,7 +891,7 @@ mlx5_txpp_start(struct rte_eth_dev *dev)\n \tstruct mlx5_dev_ctx_shared *sh = priv->sh;\n \tint err = 0;\n \n-\tif (!priv->config.tx_pp) {\n+\tif (!sh->config.tx_pp) {\n \t\t/* Packet pacing is not requested for the device. */\n \t\tMLX5_ASSERT(priv->txpp_en == 0);\n \t\treturn 0;\n@@ -901,7 +901,7 @@ mlx5_txpp_start(struct rte_eth_dev *dev)\n \t\tMLX5_ASSERT(sh->txpp.refcnt);\n \t\treturn 0;\n \t}\n-\tif (priv->config.tx_pp > 0) {\n+\tif (sh->config.tx_pp > 0) {\n \t\terr = rte_mbuf_dynflag_lookup\n \t\t\t(RTE_MBUF_DYNFLAG_TX_TIMESTAMP_NAME, NULL);\n \t\t/* No flag registered means no service needed. */\n@@ -914,7 +914,7 @@ mlx5_txpp_start(struct rte_eth_dev *dev)\n \t\tpriv->txpp_en = 1;\n \t\t++sh->txpp.refcnt;\n \t} else {\n-\t\terr = mlx5_txpp_create(sh, priv);\n+\t\terr = mlx5_txpp_create(sh);\n \t\tif (!err) {\n \t\t\tMLX5_ASSERT(sh->txpp.tick);\n \t\t\tpriv->txpp_en = 1;\ndiff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c\nindex 47bca9e3ea..3373ee66b4 100644\n--- a/drivers/net/mlx5/mlx5_txq.c\n+++ b/drivers/net/mlx5/mlx5_txq.c\n@@ -109,7 +109,7 @@ mlx5_get_tx_port_offloads(struct rte_eth_dev *dev)\n \t\t\t     RTE_ETH_TX_OFFLOAD_TCP_CKSUM);\n \tif (dev_cap->tso)\n \t\toffloads |= RTE_ETH_TX_OFFLOAD_TCP_TSO;\n-\tif (config->tx_pp)\n+\tif (priv->sh->config.tx_pp)\n \t\toffloads |= RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP;\n \tif (dev_cap->swp) {\n \t\tif (dev_cap->swp & MLX5_SW_PARSING_CSUM_CAP)\ndiff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c\nindex dfcd28901a..04f9590096 100644\n--- a/drivers/net/mlx5/windows/mlx5_os.c\n+++ b/drivers/net/mlx5/windows/mlx5_os.c\n@@ -325,27 +325,18 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\t\tstrerror(rte_errno));\n \t\tgoto error;\n \t}\n-\tsh = mlx5_alloc_shared_dev_ctx(spawn, config);\n+\tsh = mlx5_alloc_shared_dev_ctx(spawn);\n \tif (!sh)\n \t\treturn NULL;\n-\t/* Update final values for devargs before check sibling config. */\n-\tconfig->dv_esw_en = 0;\n-\tif (!config->dv_flow_en) {\n+\tif (!sh->config.dv_flow_en) {\n \t\tDRV_LOG(ERR, \"Windows flow mode must be DV flow enable.\");\n \t\terr = ENOTSUP;\n \t\tgoto error;\n \t}\n-\tif (!config->dv_esw_en &&\n-\t    config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {\n-\t\tDRV_LOG(WARNING,\n-\t\t\t\"Metadata mode %u is not supported (no E-Switch).\",\n-\t\t\tconfig->dv_xmeta_en);\n-\t\tconfig->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;\n+\tif (sh->config.vf_nl_en) {\n+\t\tDRV_LOG(DEBUG, \"VF netlink isn't supported.\");\n+\t\tsh->config.vf_nl_en = 0;\n \t}\n-\t/* Check sibling device configurations. */\n-\terr = mlx5_dev_check_sibling_config(sh, config, dpdk_dev);\n-\tif (err)\n-\t\tgoto error;\n \t/* Initialize the shutdown event in mlx5_dev_spawn to\n \t * support mlx5_is_removed for Windows.\n \t */\n@@ -417,7 +408,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\tDRV_LOG(WARNING, \"Rx CQE compression isn't supported.\");\n \t\tconfig->cqe_comp = 0;\n \t}\n-\tconfig->hw_fcs_strip = sh->dev_cap.hw_fcs_strip;\n \tif (config->mprq.enabled) {\n \t\tDRV_LOG(WARNING, \"Multi-Packet RQ isn't supported\");\n \t\tconfig->mprq.enabled = 0;\n@@ -523,8 +513,8 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t/* Store device configuration on private structure. */\n \tpriv->config = *config;\n \tfor (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {\n-\t\ticfg[i].release_mem_en = !!config->reclaim_mode;\n-\t\tif (config->reclaim_mode)\n+\t\ticfg[i].release_mem_en = !!sh->config.reclaim_mode;\n+\t\tif (sh->config.reclaim_mode)\n \t\t\ticfg[i].per_core_cache = 0;\n \t\tpriv->flows[i] = mlx5_ipool_create(&icfg[i]);\n \t\tif (!priv->flows[i])\n@@ -532,7 +522,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t}\n \t/* Create context for virtual machine VLAN workaround. */\n \tpriv->vmwa_context = NULL;\n-\tif (config->dv_flow_en) {\n+\tif (sh->config.dv_flow_en) {\n \t\terr = mlx5_alloc_shared_dr(priv);\n \t\tif (err)\n \t\t\tgoto error;\n@@ -540,11 +530,11 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t/* No supported flow priority number detection. */\n \tpriv->sh->flow_max_priority = -1;\n \tmlx5_set_metadata_mask(eth_dev);\n-\tif (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&\n+\tif (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&\n \t    !priv->sh->dv_regc0_mask) {\n \t\tDRV_LOG(ERR, \"metadata mode %u is not supported \"\n \t\t\t     \"(no metadata reg_c[0] is available).\",\n-\t\t\t     priv->config.dv_xmeta_en);\n+\t\t\t     sh->config.dv_xmeta_en);\n \t\t\terr = ENOTSUP;\n \t\t\tgoto error;\n \t}\n@@ -564,10 +554,10 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\tDRV_LOG(DEBUG,\n \t\t\t\"port %u extensive metadata register is not supported.\",\n \t\t\teth_dev->data->port_id);\n-\t\tif (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {\n+\t\tif (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {\n \t\t\tDRV_LOG(ERR, \"metadata mode %u is not supported \"\n \t\t\t\t     \"(no metadata registers available).\",\n-\t\t\t\t     priv->config.dv_xmeta_en);\n+\t\t\t\t     sh->config.dv_xmeta_en);\n \t\t\terr = ENOTSUP;\n \t\t\tgoto error;\n \t\t}\n@@ -837,7 +827,6 @@ mlx5_os_net_probe(struct mlx5_common_device *cdev)\n \t\t\t.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,\n \t\t\t.min_rxqs_num = MLX5_MPRQ_MIN_RXQS,\n \t\t},\n-\t\t.dv_flow_en = 1,\n \t\t.log_hp_size = MLX5_ARG_UNSET,\n \t};\n \tint ret;\n",
    "prefixes": [
        "16/20"
    ]
}