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GET /api/patches/106636/?format=api
{ "id": 106636, "url": "http://patchwork.dpdk.org/api/patches/106636/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220127153950.812953-18-michaelba@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220127153950.812953-18-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220127153950.812953-18-michaelba@nvidia.com", "date": "2022-01-27T15:39:47", "name": "[17/20] net/mlx5: using function to detect operation by DevX", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a71fb50a9297acb76c68889c1d52c10db33d5636", "submitter": { "id": 1949, "url": "http://patchwork.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220127153950.812953-18-michaelba@nvidia.com/mbox/", "series": [ { "id": 21402, "url": "http://patchwork.dpdk.org/api/series/21402/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21402", "date": "2022-01-27T15:39:30", "name": "mlx5: refactor devargs management", "version": 1, "mbox": "http://patchwork.dpdk.org/series/21402/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/106636/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/106636/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 74A93A04A6;\n\tThu, 27 Jan 2022 16:42:23 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 45C4842918;\n\tThu, 27 Jan 2022 16:40:34 +0100 (CET)", "from NAM04-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam08on2086.outbound.protection.outlook.com [40.107.100.86])\n by mails.dpdk.org (Postfix) with ESMTP id 10D5342854\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Michael Baum <michaelba@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "Subject": "[PATCH 17/20] net/mlx5: using function to detect operation by DevX", "Date": "Thu, 27 Jan 2022 17:39:47 +0200", "Message-ID": "<20220127153950.812953-18-michaelba@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220127153950.812953-1-michaelba@nvidia.com>", "References": "<20220127153950.812953-1-michaelba@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "e9ea9447-e76e-448a-bacd-08d9e1ab5968", "X-MS-TrafficTypeDiagnostic": "SA0PR12MB4447:EE_", "X-Microsoft-Antispam-PRVS": "\n <SA0PR12MB4447DACD58520D45C472AEDCCC219@SA0PR12MB4447.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:4125;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n fUcUc//HP/7+DKWfkGCem7gSVw/ybPxcg+LuOkKRoO0gSPbeNlsZHLtUJ/fLJXIhbsvaXuoU4JySy7p9Y7vM3P1p1iNdmgCNxDMK+x7EzFnkPA4qipRP5DHvV56oTaj+xEG1V/Z0Na63xAdyoF7bur4Rw4XGZiWcy8EObU2/dE6SpcFqyhyVYHZf7UJvIuYgoaL1NmVY4GANAA/CGMgxbkVnlRPnn4tx92moOPhPHewySAysPhKDVfgSc/q4f2cCiFsYPBz4mLxSOYFQslw3bZwIsqrgjvG52DZE7uNf03OEtYrGl/DcqBxakenI2392JSQfkABegqrI2SOf4Z8Bi7CNAPbvl509MoNNQz/y4cnTB9hI4XKA+2hCqq4EeAUqPb2C5pzrkrGPheSR/rpA6u+ra0Gpd0f19KxyZgj4rxJg5dBKKTiXPeLW09v2a5wkaKOwDyPchbjdOlQ9RrTl0D4jRWBR84lOHPYRFjk/THiB1BzaIz82Q9/XmST07l/+XWbrByTTThvGbXFCBpgFqnWPxrsRpOKyfR4sS+ha3pm+FRncSKC44EoEl23FhbyanxLgE2whFT+oj+JjfyhZu0EH3hwqy4osk2iHyX1G/oyuVTzTr2DlHw8Ipj3bD6oe35oS8CUXMQTEvlHhgK6zJZKGpgDfEl1bxwsVHHCfq2RrFGVPkqhuEyVQrLmqw9tgY4z6cl1cRMgGzT70qFgRdg==", "X-Forefront-Antispam-Report": "CIP:12.22.5.235; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(13230001)(4636009)(46966006)(36840700001)(40470700004)(36860700001)(86362001)(83380400001)(70206006)(70586007)(36756003)(6916009)(5660300002)(54906003)(8676002)(8936002)(47076005)(316002)(2906002)(4326008)(7696005)(6666004)(336012)(186003)(82310400004)(81166007)(356005)(26005)(6286002)(107886003)(55016003)(508600001)(426003)(2616005)(1076003)(40460700003)(36900700001)(20210929001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "27 Jan 2022 15:40:30.3922 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n e9ea9447-e76e-448a-bacd-08d9e1ab5968", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.235];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT038.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SA0PR12MB4447", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add inline function indicating whether HW objects operations can be\ncreated by DevX. It makes the code more readable.\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/linux/mlx5_os.c | 6 ++----\n drivers/net/mlx5/mlx5.h | 24 ++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_ethdev.c | 3 +--\n drivers/net/mlx5/mlx5_trigger.c | 3 +--\n 4 files changed, 28 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex 50cc287e73..c432cf0858 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -370,8 +370,7 @@ mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)\n \tsh->dev_cap.txpp_en = 0;\n #endif\n \t/* Check for LRO support. */\n-\tif (sh->dev_cap.dest_tir && sh->dev_cap.dv_flow_en &&\n-\t hca_attr->lro_cap) {\n+\tif (mlx5_devx_obj_ops_en(sh) && hca_attr->lro_cap) {\n \t\t/* TBD check tunnel lro caps. */\n \t\tsh->dev_cap.lro_supported = 1;\n \t\tDRV_LOG(DEBUG, \"Device supports LRO.\");\n@@ -1550,8 +1549,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\tif (mlx5_flex_item_port_init(eth_dev) < 0)\n \t\t\tgoto error;\n \t}\n-\tif (sh->cdev->config.devx && sh->config.dv_flow_en &&\n-\t sh->dev_cap.dest_tir) {\n+\tif (mlx5_devx_obj_ops_en(sh)) {\n \t\tpriv->obj_ops = devx_obj_ops;\n \t\tmlx5_queue_counter_id_prepare(eth_dev);\n \t\tpriv->obj_ops.lb_dummy_queue_create =\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 5ca48ef68f..46fa5131a7 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -1496,6 +1496,30 @@ enum dr_dump_rec_type {\n \tDR_DUMP_REC_TYPE_PMD_COUNTER = 4430,\n };\n \n+/**\n+ * Indicates whether HW objects operations can be created by DevX.\n+ *\n+ * This function is used for both:\n+ * Before creation - deciding whether to create HW objects operations by DevX.\n+ * After creation - indicator if HW objects operations were created by DevX.\n+ *\n+ * @param sh\n+ * Pointer to shared device context.\n+ *\n+ * @return\n+ * True if HW objects were created by DevX, False otherwise.\n+ */\n+static inline bool\n+mlx5_devx_obj_ops_en(struct mlx5_dev_ctx_shared *sh)\n+{\n+\t/*\n+\t * When advanced DR API is available and DV flow is supported and\n+\t * DevX is supported, HW objects operations are created by DevX.\n+\t */\n+\treturn (sh->cdev->config.devx && sh->config.dv_flow_en &&\n+\t\tsh->dev_cap.dest_tir);\n+}\n+\n /* mlx5.c */\n \n int mlx5_getenv_int(const char *);\ndiff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c\nindex 9e478db8df..d637dee98d 100644\n--- a/drivers/net/mlx5/mlx5_ethdev.c\n+++ b/drivers/net/mlx5/mlx5_ethdev.c\n@@ -721,8 +721,7 @@ mlx5_hairpin_cap_get(struct rte_eth_dev *dev, struct rte_eth_hairpin_cap *cap)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \n-\tif (!priv->sh->cdev->config.devx || !priv->sh->dev_cap.dest_tir ||\n-\t !priv->sh->config.dv_flow_en) {\n+\tif (!mlx5_devx_obj_ops_en(priv->sh)) {\n \t\trte_errno = ENOTSUP;\n \t\treturn -rte_errno;\n \t}\ndiff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c\nindex eb03e9f7b1..e234d11215 100644\n--- a/drivers/net/mlx5/mlx5_trigger.c\n+++ b/drivers/net/mlx5/mlx5_trigger.c\n@@ -1104,8 +1104,7 @@ mlx5_dev_start(struct rte_eth_dev *dev)\n \t\t\tdev->data->port_id, strerror(rte_errno));\n \t\tgoto error;\n \t}\n-\tif ((priv->sh->cdev->config.devx && priv->sh->config.dv_flow_en &&\n-\t priv->sh->dev_cap.dest_tir) &&\n+\tif (mlx5_devx_obj_ops_en(priv->sh) &&\n \t priv->obj_ops.lb_dummy_queue_create) {\n \t\tret = priv->obj_ops.lb_dummy_queue_create(dev);\n \t\tif (ret)\n", "prefixes": [ "17/20" ] }