Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/106639/?format=api
{ "id": 106639, "url": "http://patchwork.dpdk.org/api/patches/106639/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220127153950.812953-21-michaelba@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220127153950.812953-21-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220127153950.812953-21-michaelba@nvidia.com", "date": "2022-01-27T15:39:50", "name": "[20/20] common/mlx5: refactor devargs management", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e402c5fca89a182929f59ae1dda11b7985223ca3", "submitter": { "id": 1949, "url": "http://patchwork.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220127153950.812953-21-michaelba@nvidia.com/mbox/", "series": [ { "id": 21402, "url": "http://patchwork.dpdk.org/api/series/21402/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21402", "date": "2022-01-27T15:39:30", "name": "mlx5: refactor devargs management", "version": 1, "mbox": "http://patchwork.dpdk.org/series/21402/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/106639/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/106639/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2CA2AA04A6;\n\tThu, 27 Jan 2022 16:42:43 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3D999428E2;\n\tThu, 27 Jan 2022 16:40:40 +0100 (CET)", "from NAM11-CO1-obe.outbound.protection.outlook.com\n (mail-co1nam11on2049.outbound.protection.outlook.com [40.107.220.49])\n by mails.dpdk.org (Postfix) with ESMTP id 2B6C642938\n for <dev@dpdk.org>; Thu, 27 Jan 2022 16:40:38 +0100 (CET)", "from BN8PR04CA0026.namprd04.prod.outlook.com (2603:10b6:408:70::39)\n by BN6PR12MB1346.namprd12.prod.outlook.com (2603:10b6:404:1e::16)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4909.10; Thu, 27 Jan\n 2022 15:40:35 +0000", "from BN8NAM11FT049.eop-nam11.prod.protection.outlook.com\n (2603:10b6:408:70:cafe::bd) by BN8PR04CA0026.outlook.office365.com\n (2603:10b6:408:70::39) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4930.15 via Frontend\n Transport; Thu, 27 Jan 2022 15:40:35 +0000", "from mail.nvidia.com (12.22.5.236) by\n BN8NAM11FT049.mail.protection.outlook.com (10.13.177.157) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id\n 15.20.4930.15 via Frontend Transport; Thu, 27 Jan 2022 15:40:34 +0000", "from drhqmail203.nvidia.com (10.126.190.182) by\n DRHQMAIL109.nvidia.com (10.27.9.19) with Microsoft SMTP Server (TLS) id\n 15.0.1497.18; Thu, 27 Jan 2022 15:40:33 +0000", "from drhqmail202.nvidia.com (10.126.190.181) by\n drhqmail203.nvidia.com (10.126.190.182) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9;\n Thu, 27 Jan 2022 07:40:32 -0800", "from nvidia.com (10.127.8.13) by mail.nvidia.com (10.126.190.181)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9 via Frontend\n Transport; Thu, 27 Jan 2022 07:40:31 -0800" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=cAfIE7HHSolAwW55dyvRmSMbKvz0IccjFy1NSSlUWznoRCSxU+DKTkv9v5BDWrls2KB4/zDb4qf8vM4ZxUc7sR3erGtaXEm72fl0+Qai2AWYVwgDFO41uk87E+Pi5v28dOnAebhwjxAW9xg+BEiyRLfT4IO9vhOqpQWZ8SRb8bW6kmcfQGpO/P1vZtUOVy5wp/WV6p27+bzg5US2yjgiTzcFTF38fartsrmbaNlFVCdksZX4yKiGaXX57LUZgxbJF3JDW4IAey730ymtgbT0F2s9mlqXz9pamoUK65xM1aLtNLTlO7ytsDqwKh+HRnNPZInXxBIVFBurr4MDnOo/mw==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=LmEMZKyY+MQMEoThKKQUjNKYpjaaUq0cd5rmNMPofP4=;\n b=cPQ87fVPuVdKcJDGUoy3aN/VNRk6e6zg/H72tLkd01zW8NpX8WEC6GCIEpSc9I7LN+7j6Os8oQU35sTUBY404mgq8JB/lBnA0kPZY8J4ZHmRgSWIMfiNrn6w9RjzDK2uiXFB1XtnKLl2uBds3M5LHEJSNYlJGWEnbujiAereVFhikfIXgF9ZLvOnjnwyk4UUHucngvoAg4OXVm7MenF/YwBQfW+TR3WwXB5aYHP9CFxPKunU0ugJwvOi6RnDLT2zQTGGmrSOoNUpKtvQQJ0zo8ttfo1bdze818TsSRIKatXKWdHiUnRu0ezHQckZCHAsKjmcoz6tOW4mfzecWG40Pg==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 12.22.5.236) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass\n (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none\n (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=LmEMZKyY+MQMEoThKKQUjNKYpjaaUq0cd5rmNMPofP4=;\n b=GuITT8HtSowfDNzV3d5J7Ccgzef5JtrEATcNu0vxsx9aVsu9vbX5Qn94FX1VWoV5VoskncwKzrsqe3dV+xFb8F3pkNZ78/9OuS8b07jGbLjkaDBSWG+Bpr1xgTVLf5jjq8CC9dMQGmEgMqGYZYPLif+7NNgDWWrZ+5EVbRi3ylb3WHbdEjpoxeku02tQHMNx02407bfFS1+Qba2LQvpoOlo4kBt9lOHV26wzj6fGwMCYYLKjjok3VIzSKC/pQ1VCJ1AzseZdis6Z8ZfdCZnHB9rs5I99eqPBcP7MMLn5MDZOA0n4brbl5l0kzyjqfNuYpa2eDUJbg/nwwa24lKWtqQ==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 12.22.5.236)\n smtp.mailfrom=nvidia.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 12.22.5.236 as permitted sender) receiver=protection.outlook.com;\n client-ip=12.22.5.236; helo=mail.nvidia.com;", "From": "Michael Baum <michaelba@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "Subject": "[PATCH 20/20] common/mlx5: refactor devargs management", "Date": "Thu, 27 Jan 2022 17:39:50 +0200", "Message-ID": "<20220127153950.812953-21-michaelba@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220127153950.812953-1-michaelba@nvidia.com>", "References": "<20220127153950.812953-1-michaelba@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "67b3ecaa-770f-49f5-a855-08d9e1ab5c03", "X-MS-TrafficTypeDiagnostic": "BN6PR12MB1346:EE_", "X-Microsoft-Antispam-PRVS": "\n <BN6PR12MB1346FDEA8DF6FD503C44B2F5CC219@BN6PR12MB1346.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:6430;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n E3FTagrvcJBVgyNIKJ0xvjXjs4XX7WxGOoSAGWmgR9QJb3RKvOnmgmo9zX0enA0ktQViwXEUE4SRIrcrLW1TLslD+bDXUACODbpb3TEHrOWT/DJ3rJ5eJoGrZwj7nBfvLwGt6k5PG0OH+UfHUaAjz9qDpLqriHxv60liKWTxsGnEKYzQeGx5CgmYQqcqgqIdehtWOsd3j1UmByKbnk5N4odLrq8TtYYQqUbAFIqc145Iqy5NqZxzHjVNNc42bDPSWGXzyiFvDymt6mJxSSr4Eoyk7pJifT3oB4OeCJ6n2A0KwgaN6JxSxUFimmaP+Nd43lMfAmHHD50TFkiqzGL8JPRe91gCWeWIG1zk1FslLdHe7xA+yfvsrU5RWVhqOOdKvpy0b/DLJ/qnMZM9chvrJq+oHp2+8V83AHs6BSVfJngtOWBkTCxzVoyHVXALaHU4J22xnhAL8LghcGRY8EqxVPfCK7H2JGXZgc3a967SAVd76jZyQajHPXg/Iczy0G5ZrRtgBHgV1ztBsrvEHS1iXCWRofBBXV55KGThobin1Ln3VJqlJpSFelcH4Bu9bQ/X5mFDRK6jz4nCI3Y791Ztd2qzM7RlwFh0o+jyCsbs6vAbpEwx+hmcjUvZdPeJCYC9t1YkU8uodknHHLbkc8wK6RaZxaPw1dqH5hyctDts/qHlZa5QrdPVAuRQgnuI/UHg8X5UH+qNp9YM21tvMxT3slBQeLqJGICNshHMVhsph4/hiQA1gkpI/E/GOmC4+CX7KF4VHDnufoVbF+p8guT0ala1CdBc55+J8Osb8Zr8L30ON2WjHJ3OcSWMlpJU4MYdMNF7ErjqJYzlAbfoBb8YpQ==", "X-Forefront-Antispam-Report": "CIP:12.22.5.236; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(4636009)(46966006)(36840700001)(40470700004)(82310400004)(8676002)(40460700003)(6666004)(83380400001)(36756003)(6286002)(2616005)(26005)(7696005)(55016003)(1076003)(336012)(36860700001)(508600001)(8936002)(2906002)(81166007)(356005)(6916009)(186003)(54906003)(47076005)(4326008)(316002)(30864003)(107886003)(70206006)(5660300002)(70586007)(86362001)(426003)(36900700001)(579004)(309714004);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "27 Jan 2022 15:40:34.6693 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 67b3ecaa-770f-49f5-a855-08d9e1ab5c03", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT049.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN6PR12MB1346", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Improve the devargs handling in two aspects:\n - Parse the devargs string only once.\n - Return error and report for unknown keys.\n\nThe common driver parses once the devargs string into a dictionary, then\nprovides it to all the drivers' probe. Each driver updates within it\nwhich keys it has used, then common driver receives the updated\ndictionary and reports about unknown devargs.\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/mlx5_common.c | 255 +++++++++++++++++++++-----\n drivers/common/mlx5/mlx5_common.h | 36 +++-\n drivers/common/mlx5/version.map | 2 +\n drivers/compress/mlx5/mlx5_compress.c | 38 ++--\n drivers/crypto/mlx5/mlx5_crypto.c | 39 ++--\n drivers/net/mlx5/linux/mlx5_os.c | 47 +++--\n drivers/net/mlx5/mlx5.c | 212 ++++++++++++++-------\n drivers/net/mlx5/mlx5.h | 14 +-\n drivers/net/mlx5/windows/mlx5_os.c | 18 +-\n drivers/regex/mlx5/mlx5_regex.c | 3 +-\n drivers/vdpa/mlx5/mlx5_vdpa.c | 32 ++--\n 11 files changed, 498 insertions(+), 198 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c\nindex f74d27e74d..96906d3f39 100644\n--- a/drivers/common/mlx5/mlx5_common.c\n+++ b/drivers/common/mlx5/mlx5_common.c\n@@ -21,6 +21,24 @@\n \n uint8_t haswell_broadwell_cpu;\n \n+/* Driver type key for new device global syntax. */\n+#define MLX5_DRIVER_KEY \"driver\"\n+\n+/* Enable extending memsegs when creating a MR. */\n+#define MLX5_MR_EXT_MEMSEG_EN \"mr_ext_memseg_en\"\n+\n+/* Device parameter to configure implicit registration of mempool memory. */\n+#define MLX5_MR_MEMPOOL_REG_EN \"mr_mempool_reg_en\"\n+\n+/* The default memory allocator used in PMD. */\n+#define MLX5_SYS_MEM_EN \"sys_mem_en\"\n+\n+/*\n+ * Device parameter to force doorbell register mapping\n+ * to non-cahed region eliminating the extra write memory barrier.\n+ */\n+#define MLX5_TX_DB_NC \"tx_db_nc\"\n+\n /* In case this is an x86_64 intel processor to check if\n * we should use relaxed ordering.\n */\n@@ -92,6 +110,122 @@ driver_get(uint32_t class)\n \treturn NULL;\n }\n \n+int\n+mlx5_kvargs_process(struct mlx5_kvargs_ctrl *mkvlist, const char *const keys[],\n+\t\t arg_handler_t handler, void *opaque_arg)\n+{\n+\tconst struct rte_kvargs_pair *pair;\n+\tuint32_t i, j;\n+\n+\tMLX5_ASSERT(mkvlist && mkvlist->kvlist);\n+\t/* Process parameters. */\n+\tfor (i = 0; i < mkvlist->kvlist->count; i++) {\n+\t\tpair = &mkvlist->kvlist->pairs[i];\n+\t\tfor (j = 0; keys[j] != NULL; ++j) {\n+\t\t\tif (strcmp(pair->key, keys[j]) != 0)\n+\t\t\t\tcontinue;\n+\t\t\tif ((*handler)(pair->key, pair->value, opaque_arg) < 0)\n+\t\t\t\treturn -1;\n+\t\t\tmkvlist->is_used[i] = true;\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n+/**\n+ * Prepare a mlx5 kvargs control.\n+ *\n+ * @param[out] mkvlist\n+ * Pointer to mlx5 kvargs control.\n+ * @param[in] devargs\n+ * The input string containing the key/value associations.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+static int\n+mlx5_kvargs_prepare(struct mlx5_kvargs_ctrl *mkvlist,\n+\t\t const struct rte_devargs *devargs)\n+{\n+\tstruct rte_kvargs *kvlist;\n+\tuint32_t i;\n+\n+\tif (devargs == NULL)\n+\t\treturn 0;\n+\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n+\tif (kvlist == NULL) {\n+\t\trte_errno = EINVAL;\n+\t\treturn -rte_errno;\n+\t}\n+\t/*\n+\t * rte_kvargs_parse enable key without value, in mlx5 PMDs we disable\n+\t * this syntax.\n+\t */\n+\tfor (i = 0; i < kvlist->count; i++) {\n+\t\tconst struct rte_kvargs_pair *pair = &kvlist->pairs[i];\n+\t\tif (pair->value == NULL || *(pair->value) == '\\0') {\n+\t\t\tDRV_LOG(ERR, \"Key %s is missing value.\", pair->key);\n+\t\t\trte_kvargs_free(kvlist);\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t}\n+\t/* Makes sure all devargs used array is false. */\n+\tmemset(mkvlist, 0, sizeof(*mkvlist));\n+\tmkvlist->kvlist = kvlist;\n+\tDRV_LOG(DEBUG, \"Parse successfully %u devargs.\",\n+\t\tmkvlist->kvlist->count);\n+\treturn 0;\n+}\n+\n+/**\n+ * Release a mlx5 kvargs control.\n+ *\n+ * @param[out] mkvlist\n+ * Pointer to mlx5 kvargs control.\n+ */\n+static void\n+mlx5_kvargs_release(struct mlx5_kvargs_ctrl *mkvlist)\n+{\n+\tif (mkvlist == NULL)\n+\t\treturn;\n+\trte_kvargs_free(mkvlist->kvlist);\n+\tmemset(mkvlist, 0, sizeof(*mkvlist));\n+}\n+\n+/**\n+ * Validate device arguments list.\n+ * It report about the first unknown parameter.\n+ *\n+ * @param[in] mkvlist\n+ * Pointer to mlx5 kvargs control.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+static int\n+mlx5_kvargs_validate(struct mlx5_kvargs_ctrl *mkvlist)\n+{\n+\tuint32_t i;\n+\n+\t/* Secondary process should not handle devargs. */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\tif (mkvlist == NULL)\n+\t\treturn 0;\n+\tfor (i = 0; i < mkvlist->kvlist->count; i++) {\n+\t\tif (mkvlist->is_used[i] == 0) {\n+\t\t\tDRV_LOG(ERR, \"Key \\\"%s\\\" \"\n+\t\t\t\t\"is unknown for the provided classes.\",\n+\t\t\t\tmkvlist->kvlist->pairs[i].key);\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n /**\n * Verify and store value for devargs.\n *\n@@ -111,11 +245,9 @@ mlx5_common_args_check_handler(const char *key, const char *val, void *opaque)\n \tstruct mlx5_common_dev_config *config = opaque;\n \tsigned long tmp;\n \n-\tif (val == NULL || *val == '\\0') {\n-\t\tDRV_LOG(ERR, \"Key %s is missing value.\", key);\n-\t\trte_errno = EINVAL;\n-\t\treturn -rte_errno;\n-\t}\n+\tif (strcmp(MLX5_DRIVER_KEY, key) == 0 ||\n+\t strcmp(RTE_DEVARGS_KEY_CLASS, key) == 0)\n+\t\treturn 0;\n \terrno = 0;\n \ttmp = strtol(val, NULL, 0);\n \tif (errno) {\n@@ -123,7 +255,7 @@ mlx5_common_args_check_handler(const char *key, const char *val, void *opaque)\n \t\tDRV_LOG(WARNING, \"%s: \\\"%s\\\" is an invalid integer.\", key, val);\n \t\treturn -rte_errno;\n \t}\n-\tif (strcmp(key, \"tx_db_nc\") == 0) {\n+\tif (strcmp(key, MLX5_TX_DB_NC) == 0) {\n \t\tif (tmp != MLX5_TXDB_CACHED &&\n \t\t tmp != MLX5_TXDB_NCACHED &&\n \t\t tmp != MLX5_TXDB_HEURISTIC) {\n@@ -132,11 +264,11 @@ mlx5_common_args_check_handler(const char *key, const char *val, void *opaque)\n \t\t\treturn -rte_errno;\n \t\t}\n \t\tconfig->dbnc = tmp;\n-\t} else if (strcmp(key, \"mr_ext_memseg_en\") == 0) {\n+\t} else if (strcmp(key, MLX5_MR_EXT_MEMSEG_EN) == 0) {\n \t\tconfig->mr_ext_memseg_en = !!tmp;\n-\t} else if (strcmp(key, \"mr_mempool_reg_en\") == 0) {\n+\t} else if (strcmp(key, MLX5_MR_MEMPOOL_REG_EN) == 0) {\n \t\tconfig->mr_mempool_reg_en = !!tmp;\n-\t} else if (strcmp(key, \"sys_mem_en\") == 0) {\n+\t} else if (strcmp(key, MLX5_SYS_MEM_EN) == 0) {\n \t\tconfig->sys_mem_en = !!tmp;\n \t}\n \treturn 0;\n@@ -154,29 +286,34 @@ mlx5_common_args_check_handler(const char *key, const char *val, void *opaque)\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n static int\n-mlx5_common_config_get(struct rte_devargs *devargs,\n+mlx5_common_config_get(struct mlx5_kvargs_ctrl *mkvlist,\n \t\t struct mlx5_common_dev_config *config)\n {\n-\tstruct rte_kvargs *kvlist;\n+\tconst char **params = (const char *[]){\n+\t\tRTE_DEVARGS_KEY_CLASS,\n+\t\tMLX5_DRIVER_KEY,\n+\t\tMLX5_TX_DB_NC,\n+\t\tMLX5_MR_EXT_MEMSEG_EN,\n+\t\tMLX5_SYS_MEM_EN,\n+\t\tMLX5_MR_MEMPOOL_REG_EN,\n+\t\tNULL,\n+\t};\n \tint ret = 0;\n \n+\tif (mkvlist == NULL)\n+\t\treturn 0;\n \t/* Set defaults. */\n \tconfig->mr_ext_memseg_en = 1;\n \tconfig->mr_mempool_reg_en = 1;\n \tconfig->sys_mem_en = 0;\n \tconfig->dbnc = MLX5_ARG_UNSET;\n-\tif (devargs == NULL)\n-\t\treturn 0;\n-\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n-\tif (kvlist == NULL) {\n+\t/* Process common parameters. */\n+\tret = mlx5_kvargs_process(mkvlist, params,\n+\t\t\t\t mlx5_common_args_check_handler, config);\n+\tif (ret) {\n \t\trte_errno = EINVAL;\n-\t\treturn -rte_errno;\n-\t}\n-\tret = rte_kvargs_process(kvlist, NULL, mlx5_common_args_check_handler,\n-\t\t\t\t config);\n-\tif (ret)\n \t\tret = -rte_errno;\n-\trte_kvargs_free(kvlist);\n+\t}\n \tDRV_LOG(DEBUG, \"mr_ext_memseg_en is %u.\", config->mr_ext_memseg_en);\n \tDRV_LOG(DEBUG, \"mr_mempool_reg_en is %u.\", config->mr_mempool_reg_en);\n \tDRV_LOG(DEBUG, \"sys_mem_en is %u.\", config->sys_mem_en);\n@@ -225,9 +362,9 @@ devargs_class_handler(__rte_unused const char *key,\n }\n \n static int\n-parse_class_options(const struct rte_devargs *devargs)\n+parse_class_options(const struct rte_devargs *devargs,\n+\t\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n-\tstruct rte_kvargs *kvlist;\n \tint ret = 0;\n \n \tif (devargs == NULL)\n@@ -236,12 +373,8 @@ parse_class_options(const struct rte_devargs *devargs)\n \t\t/* Global syntax, only one class type. */\n \t\treturn class_name_to_value(devargs->cls->name);\n \t/* Legacy devargs support multiple classes. */\n-\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n-\tif (kvlist == NULL)\n-\t\treturn 0;\n-\trte_kvargs_process(kvlist, RTE_DEVARGS_KEY_CLASS,\n+\trte_kvargs_process(mkvlist->kvlist, RTE_DEVARGS_KEY_CLASS,\n \t\t\t devargs_class_handler, &ret);\n-\trte_kvargs_free(kvlist);\n \treturn ret;\n }\n \n@@ -564,7 +697,8 @@ mlx5_common_dev_release(struct mlx5_common_device *cdev)\n }\n \n static struct mlx5_common_device *\n-mlx5_common_dev_create(struct rte_device *eal_dev, uint32_t classes)\n+mlx5_common_dev_create(struct rte_device *eal_dev, uint32_t classes,\n+\t\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct mlx5_common_device *cdev;\n \tint ret;\n@@ -579,7 +713,7 @@ mlx5_common_dev_create(struct rte_device *eal_dev, uint32_t classes)\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\tgoto exit;\n \t/* Parse device parameters. */\n-\tret = mlx5_common_config_get(eal_dev->devargs, &cdev->config);\n+\tret = mlx5_common_config_get(mkvlist, &cdev->config);\n \tif (ret < 0) {\n \t\tDRV_LOG(ERR, \"Failed to process device arguments: %s\",\n \t\t\tstrerror(rte_errno));\n@@ -624,12 +758,15 @@ mlx5_common_dev_create(struct rte_device *eal_dev, uint32_t classes)\n *\n * @param cdev\n * Pointer to mlx5 device structure.\n+ * @param mkvlist\n+ * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.\n *\n * @return\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n static int\n-mlx5_common_probe_again_args_validate(struct mlx5_common_device *cdev)\n+mlx5_common_probe_again_args_validate(struct mlx5_common_device *cdev,\n+\t\t\t\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct mlx5_common_dev_config *config;\n \tint ret;\n@@ -638,7 +775,7 @@ mlx5_common_probe_again_args_validate(struct mlx5_common_device *cdev)\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n \t/* Probe again doesn't have to generate devargs. */\n-\tif (cdev->dev->devargs == NULL)\n+\tif (mkvlist == NULL)\n \t\treturn 0;\n \tconfig = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,\n \t\t\t sizeof(struct mlx5_common_dev_config),\n@@ -651,7 +788,7 @@ mlx5_common_probe_again_args_validate(struct mlx5_common_device *cdev)\n \t * Creates a temporary common configure structure according to new\n \t * devargs attached in probing again.\n \t */\n-\tret = mlx5_common_config_get(cdev->dev->devargs, config);\n+\tret = mlx5_common_config_get(mkvlist, config);\n \tif (ret) {\n \t\tDRV_LOG(ERR, \"Failed to process device configure: %s\",\n \t\t\tstrerror(rte_errno));\n@@ -719,7 +856,8 @@ drivers_remove(struct mlx5_common_device *cdev, uint32_t enabled_classes)\n }\n \n static int\n-drivers_probe(struct mlx5_common_device *cdev, uint32_t user_classes)\n+drivers_probe(struct mlx5_common_device *cdev, uint32_t user_classes,\n+\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct mlx5_class_driver *driver;\n \tuint32_t enabled_classes = 0;\n@@ -738,7 +876,7 @@ drivers_probe(struct mlx5_common_device *cdev, uint32_t user_classes)\n \t\t\tret = -EEXIST;\n \t\t\tgoto probe_err;\n \t\t}\n-\t\tret = driver->probe(cdev);\n+\t\tret = driver->probe(cdev, mkvlist);\n \t\tif (ret < 0) {\n \t\t\tDRV_LOG(ERR, \"Failed to load driver %s\",\n \t\t\t\tdriver->name);\n@@ -764,17 +902,27 @@ int\n mlx5_common_dev_probe(struct rte_device *eal_dev)\n {\n \tstruct mlx5_common_device *cdev;\n+\tstruct mlx5_kvargs_ctrl mkvlist;\n+\tstruct mlx5_kvargs_ctrl *mkvlist_p = NULL;\n \tuint32_t classes = 0;\n \tbool new_device = false;\n \tint ret;\n \n \tDRV_LOG(INFO, \"probe device \\\"%s\\\".\", eal_dev->name);\n-\tret = parse_class_options(eal_dev->devargs);\n+\tif (eal_dev->devargs != NULL)\n+\t\tmkvlist_p = &mkvlist;\n+\tret = mlx5_kvargs_prepare(mkvlist_p, eal_dev->devargs);\n \tif (ret < 0) {\n-\t\tDRV_LOG(ERR, \"Unsupported mlx5 class type: %s\",\n+\t\tDRV_LOG(ERR, \"Unsupported device arguments: %s\",\n \t\t\teal_dev->devargs->args);\n \t\treturn ret;\n \t}\n+\tret = parse_class_options(eal_dev->devargs, mkvlist_p);\n+\tif (ret < 0) {\n+\t\tDRV_LOG(ERR, \"Unsupported mlx5 class type: %s\",\n+\t\t\teal_dev->devargs->args);\n+\t\tgoto class_err;\n+\t}\n \tclasses = ret;\n \tif (classes == 0)\n \t\t/* Default to net class. */\n@@ -792,18 +940,20 @@ mlx5_common_dev_probe(struct rte_device *eal_dev)\n \tcdev = to_mlx5_device(eal_dev);\n \tif (!cdev) {\n \t\t/* It isn't probing again, creates a new device. */\n-\t\tcdev = mlx5_common_dev_create(eal_dev, classes);\n-\t\tif (!cdev)\n-\t\t\treturn -ENOMEM;\n+\t\tcdev = mlx5_common_dev_create(eal_dev, classes, mkvlist_p);\n+\t\tif (!cdev) {\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto class_err;\n+\t\t}\n \t\tnew_device = true;\n \t} else {\n \t\t/* It is probing again, validate common devargs match. */\n-\t\tret = mlx5_common_probe_again_args_validate(cdev);\n+\t\tret = mlx5_common_probe_again_args_validate(cdev, mkvlist_p);\n \t\tif (ret) {\n \t\t\tDRV_LOG(ERR,\n \t\t\t\t\"Probe again parameters aren't compatible : %s\",\n \t\t\t\tstrerror(rte_errno));\n-\t\t\treturn ret;\n+\t\t\tgoto class_err;\n \t\t}\n \t}\n \t/*\n@@ -816,13 +966,30 @@ mlx5_common_dev_probe(struct rte_device *eal_dev)\n \t\tDRV_LOG(ERR, \"Unsupported mlx5 classes combination.\");\n \t\tgoto class_err;\n \t}\n-\tret = drivers_probe(cdev, classes);\n+\tret = drivers_probe(cdev, classes, mkvlist_p);\n+\tif (ret)\n+\t\tgoto class_err;\n+\t/*\n+\t * Validate that all devargs have been used, unused key -> unknown Key.\n+\t * When probe again validate is failed, the added drivers aren't removed\n+\t * here but when device is released.\n+\t */\n+\tret = mlx5_kvargs_validate(mkvlist_p);\n \tif (ret)\n \t\tgoto class_err;\n+\tmlx5_kvargs_release(mkvlist_p);\n \treturn 0;\n class_err:\n-\tif (new_device)\n+\tif (new_device) {\n+\t\t/*\n+\t\t * For new device, classes_loaded is always 0 before\n+\t\t * drivers_probe function.\n+\t\t */\n+\t\tif (cdev->classes_loaded)\n+\t\t\tdrivers_remove(cdev, cdev->classes_loaded);\n \t\tmlx5_common_dev_release(cdev);\n+\t}\n+\tmlx5_kvargs_release(mkvlist_p);\n \treturn ret;\n }\n \ndiff --git a/drivers/common/mlx5/mlx5_common.h b/drivers/common/mlx5/mlx5_common.h\nindex 80f59c81fb..49bcea1d91 100644\n--- a/drivers/common/mlx5/mlx5_common.h\n+++ b/drivers/common/mlx5/mlx5_common.h\n@@ -281,6 +281,37 @@ struct mlx5_klm {\n \tuint64_t address;\n };\n \n+/** Control for key/values list. */\n+struct mlx5_kvargs_ctrl {\n+\tstruct rte_kvargs *kvlist; /* Structure containing list of key/values.*/\n+\tbool is_used[RTE_KVARGS_MAX]; /* Indicator which devargs were used. */\n+};\n+\n+/**\n+ * Call a handler function for each key/value in the list of keys.\n+ *\n+ * For each key/value association that matches the given key, calls the\n+ * handler function with the for a given arg_name passing the value on the\n+ * dictionary for that key and a given extra argument.\n+ *\n+ * @param mkvlist\n+ * The mlx5_kvargs structure.\n+ * @param keys\n+ * A list of keys to process (table of const char *, the last must be NULL).\n+ * @param handler\n+ * The function to call for each matching key.\n+ * @param opaque_arg\n+ * A pointer passed unchanged to the handler.\n+ *\n+ * @return\n+ * - 0 on success\n+ * - Negative on error\n+ */\n+__rte_internal\n+int\n+mlx5_kvargs_process(struct mlx5_kvargs_ctrl *mkvlist, const char *const keys[],\n+\t\t arg_handler_t handler, void *opaque_arg);\n+\n /* All UAR arguments using doorbell register in datapath. */\n struct mlx5_uar_data {\n \tuint64_t *db;\n@@ -437,12 +468,13 @@ struct mlx5_common_device {\n /**\n * Initialization function for the driver called during device probing.\n */\n-typedef int (mlx5_class_driver_probe_t)(struct mlx5_common_device *dev);\n+typedef int (mlx5_class_driver_probe_t)(struct mlx5_common_device *cdev,\n+\t\t\t\t\tstruct mlx5_kvargs_ctrl *mkvlist);\n \n /**\n * Uninitialization function for the driver called during hot-unplugging.\n */\n-typedef int (mlx5_class_driver_remove_t)(struct mlx5_common_device *dev);\n+typedef int (mlx5_class_driver_remove_t)(struct mlx5_common_device *cdev);\n \n /** Device already probed can be probed again to check for new ports. */\n #define MLX5_DRV_PROBE_AGAIN 0x0004\ndiff --git a/drivers/common/mlx5/version.map b/drivers/common/mlx5/version.map\nindex 59ab434631..1c6153c576 100644\n--- a/drivers/common/mlx5/version.map\n+++ b/drivers/common/mlx5/version.map\n@@ -85,6 +85,8 @@ INTERNAL {\n \n \tmlx5_glue;\n \n+\tmlx5_kvargs_process;\n+\n \tmlx5_list_create;\n \tmlx5_list_register;\n \tmlx5_list_unregister;\ndiff --git a/drivers/compress/mlx5/mlx5_compress.c b/drivers/compress/mlx5/mlx5_compress.c\nindex 82b871bd86..3fc7f4c434 100644\n--- a/drivers/compress/mlx5/mlx5_compress.c\n+++ b/drivers/compress/mlx5/mlx5_compress.c\n@@ -657,41 +657,36 @@ mlx5_compress_args_check_handler(const char *key, const char *val, void *opaque)\n \t\terrno = 0;\n \t\tdevarg_prms->log_block_sz = (uint32_t)strtoul(val, NULL, 10);\n \t\tif (errno) {\n-\t\t\tDRV_LOG(WARNING, \"%s: \\\"%s\\\" is an invalid integer.\"\n-\t\t\t\t, key, val);\n+\t\t\tDRV_LOG(WARNING, \"%s: \\\"%s\\\" is an invalid integer.\",\n+\t\t\t\tkey, val);\n \t\t\treturn -errno;\n \t\t}\n-\t\treturn 0;\n \t}\n \treturn 0;\n }\n \n static int\n-mlx5_compress_handle_devargs(struct rte_devargs *devargs,\n-\t\t\t struct mlx5_compress_devarg_params *devarg_prms,\n-\t\t\t struct mlx5_hca_attr *att)\n+mlx5_compress_handle_devargs(struct mlx5_kvargs_ctrl *mkvlist,\n+\t\t\t struct mlx5_compress_devarg_params *devarg_prms,\n+\t\t\t struct mlx5_hca_attr *att)\n {\n-\tstruct rte_kvargs *kvlist;\n+\tconst char **params = (const char *[]){\n+\t\t\"log-block-size\",\n+\t\tNULL,\n+\t};\n \n \tdevarg_prms->log_block_sz = MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX;\n-\tif (devargs == NULL)\n+\tif (mkvlist == NULL)\n \t\treturn 0;\n-\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n-\tif (kvlist == NULL) {\n-\t\tDRV_LOG(ERR, \"Failed to parse devargs.\");\n-\t\trte_errno = EINVAL;\n-\t\treturn -1;\n-\t}\n-\tif (rte_kvargs_process(kvlist, NULL, mlx5_compress_args_check_handler,\n-\t\t\t devarg_prms) != 0) {\n+\tif (mlx5_kvargs_process(mkvlist, params,\n+\t\t\t\tmlx5_compress_args_check_handler,\n+\t\t\t\tdevarg_prms) != 0) {\n \t\tDRV_LOG(ERR, \"Devargs handler function Failed.\");\n-\t\trte_kvargs_free(kvlist);\n \t\trte_errno = EINVAL;\n \t\treturn -1;\n \t}\n-\trte_kvargs_free(kvlist);\n \tif (devarg_prms->log_block_sz > MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX ||\n-\t\tdevarg_prms->log_block_sz < att->compress_min_block_size) {\n+\t devarg_prms->log_block_sz < att->compress_min_block_size) {\n \t\tDRV_LOG(WARNING, \"Log block size provided is out of range(\"\n \t\t\t\"%u); default it to %u.\",\n \t\t\tdevarg_prms->log_block_sz,\n@@ -702,7 +697,8 @@ mlx5_compress_handle_devargs(struct rte_devargs *devargs,\n }\n \n static int\n-mlx5_compress_dev_probe(struct mlx5_common_device *cdev)\n+mlx5_compress_dev_probe(struct mlx5_common_device *cdev,\n+\t\t\tstruct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct rte_compressdev *compressdev;\n \tstruct mlx5_compress_priv *priv;\n@@ -726,7 +722,7 @@ mlx5_compress_dev_probe(struct mlx5_common_device *cdev)\n \t\trte_errno = ENOTSUP;\n \t\treturn -ENOTSUP;\n \t}\n-\tmlx5_compress_handle_devargs(cdev->dev->devargs, &devarg_prms, attr);\n+\tmlx5_compress_handle_devargs(mkvlist, &devarg_prms, attr);\n \tcompressdev = rte_compressdev_pmd_create(ibdev_name, cdev->dev,\n \t\t\t\t\t\t sizeof(*priv), &init_params);\n \tif (compressdev == NULL) {\ndiff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c\nindex 421c23748a..e14f867797 100644\n--- a/drivers/crypto/mlx5/mlx5_crypto.c\n+++ b/drivers/crypto/mlx5/mlx5_crypto.c\n@@ -722,8 +722,6 @@ mlx5_crypto_args_check_handler(const char *key, const char *val, void *opaque)\n \tint ret;\n \tint i;\n \n-\tif (strcmp(key, \"class\") == 0)\n-\t\treturn 0;\n \tif (strcmp(key, \"wcs_file\") == 0) {\n \t\tfile = fopen(val, \"rb\");\n \t\tif (file == NULL) {\n@@ -763,48 +761,44 @@ mlx5_crypto_args_check_handler(const char *key, const char *val, void *opaque)\n \t\tattr->credential_pointer = (uint32_t)tmp;\n \t} else if (strcmp(key, \"keytag\") == 0) {\n \t\tdevarg_prms->keytag = tmp;\n-\t} else {\n-\t\tDRV_LOG(WARNING, \"Invalid key %s.\", key);\n \t}\n \treturn 0;\n }\n \n static int\n-mlx5_crypto_parse_devargs(struct rte_devargs *devargs,\n+mlx5_crypto_parse_devargs(struct mlx5_kvargs_ctrl *mkvlist,\n \t\t\t struct mlx5_crypto_devarg_params *devarg_prms)\n {\n \tstruct mlx5_devx_crypto_login_attr *attr = &devarg_prms->login_attr;\n-\tstruct rte_kvargs *kvlist;\n+\tconst char **params = (const char *[]){\n+\t\t\"credential_id\",\n+\t\t\"import_kek_id\",\n+\t\t\"keytag\",\n+\t\t\"max_segs_num\",\n+\t\t\"wcs_file\",\n+\t\tNULL,\n+\t};\n \n \t/* Default values. */\n \tattr->credential_pointer = 0;\n \tattr->session_import_kek_ptr = 0;\n \tdevarg_prms->keytag = 0;\n \tdevarg_prms->max_segs_num = 8;\n-\tif (devargs == NULL) {\n+\tif (mkvlist == NULL) {\n \t\tDRV_LOG(ERR,\n-\t\"No login devargs in order to enable crypto operations in the device.\");\n-\t\trte_errno = EINVAL;\n-\t\treturn -1;\n-\t}\n-\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n-\tif (kvlist == NULL) {\n-\t\tDRV_LOG(ERR, \"Failed to parse devargs.\");\n+\t\t\t\"No login devargs in order to enable crypto operations in the device.\");\n \t\trte_errno = EINVAL;\n \t\treturn -1;\n \t}\n-\tif (rte_kvargs_process(kvlist, NULL, mlx5_crypto_args_check_handler,\n-\t\t\t devarg_prms) != 0) {\n+\tif (mlx5_kvargs_process(mkvlist, params, mlx5_crypto_args_check_handler,\n+\t\t\t\tdevarg_prms) != 0) {\n \t\tDRV_LOG(ERR, \"Devargs handler function Failed.\");\n-\t\trte_kvargs_free(kvlist);\n \t\trte_errno = EINVAL;\n \t\treturn -1;\n \t}\n-\trte_kvargs_free(kvlist);\n \tif (devarg_prms->login_devarg == false) {\n \t\tDRV_LOG(ERR,\n-\t\"No login credential devarg in order to enable crypto operations \"\n-\t\"in the device.\");\n+\t\t\t\"No login credential devarg in order to enable crypto operations in the device.\");\n \t\trte_errno = EINVAL;\n \t\treturn -1;\n \t}\n@@ -887,7 +881,8 @@ mlx5_crypto_configure_wqe_size(struct mlx5_crypto_priv *priv,\n }\n \n static int\n-mlx5_crypto_dev_probe(struct mlx5_common_device *cdev)\n+mlx5_crypto_dev_probe(struct mlx5_common_device *cdev,\n+\t\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct rte_cryptodev *crypto_dev;\n \tstruct mlx5_devx_obj *login;\n@@ -914,7 +909,7 @@ mlx5_crypto_dev_probe(struct mlx5_common_device *cdev)\n \t\trte_errno = ENOTSUP;\n \t\treturn -ENOTSUP;\n \t}\n-\tret = mlx5_crypto_parse_devargs(cdev->dev->devargs, &devarg_prms);\n+\tret = mlx5_crypto_parse_devargs(mkvlist, &devarg_prms);\n \tif (ret) {\n \t\tDRV_LOG(ERR, \"Failed to parse devargs.\");\n \t\treturn -rte_errno;\ndiff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex 6979385782..b2172ed1fd 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -1001,6 +1001,8 @@ mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,\n * Verbs device parameters (name, port, switch_info) to spawn.\n * @param eth_da\n * Device arguments.\n+ * @param mkvlist\n+ * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.\n *\n * @return\n * A valid Ethernet device object on success, NULL otherwise and rte_errno\n@@ -1012,7 +1014,8 @@ mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,\n static struct rte_eth_dev *\n mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t struct mlx5_dev_spawn_data *spawn,\n-\t struct rte_eth_devargs *eth_da)\n+\t struct rte_eth_devargs *eth_da,\n+\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tconst struct mlx5_switch_info *switch_info = &spawn->info;\n \tstruct mlx5_dev_ctx_shared *sh = NULL;\n@@ -1062,6 +1065,12 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\tDRV_LOG(WARNING, \"device name overflow %s\", name);\n \t/* check if the device is already spawned */\n \tif (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {\n+\t\t/*\n+\t\t * When device is already spawned, its devargs should be set\n+\t\t * as used. otherwise, mlx5_kvargs_validate() will fail.\n+\t\t */\n+\t\tif (mkvlist)\n+\t\t\tmlx5_port_args_set_used(name, port_id, mkvlist);\n \t\trte_errno = EEXIST;\n \t\treturn NULL;\n \t}\n@@ -1103,7 +1112,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\tmlx5_dev_close(eth_dev);\n \t\treturn NULL;\n \t}\n-\tsh = mlx5_alloc_shared_dev_ctx(spawn);\n+\tsh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist);\n \tif (!sh)\n \t\treturn NULL;\n \tnl_rdma = mlx5_nl_init(NETLINK_RDMA);\n@@ -1354,7 +1363,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n #endif\n \t}\n \t/* Process parameters and store port configuration on priv structure. */\n-\terr = mlx5_port_args_config(priv, dpdk_dev->devargs, &priv->config);\n+\terr = mlx5_port_args_config(priv, mkvlist, &priv->config);\n \tif (err) {\n \t\terr = rte_errno;\n \t\tDRV_LOG(ERR, \"Failed to process port configure: %s\",\n@@ -1840,6 +1849,8 @@ mlx5_device_bond_pci_match(const char *ibdev_name,\n * Requested ethdev device argument.\n * @param[in] owner_id\n * Requested owner PF port ID within bonding device, default to 0.\n+ * @param[in, out] mkvlist\n+ * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.\n *\n * @return\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n@@ -1847,7 +1858,7 @@ mlx5_device_bond_pci_match(const char *ibdev_name,\n static int\n mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,\n \t\t struct rte_eth_devargs *req_eth_da,\n-\t\t uint16_t owner_id)\n+\t\t uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct ibv_device **ibv_list;\n \t/*\n@@ -2217,7 +2228,8 @@ mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,\n \tfor (i = 0; i != ns; ++i) {\n \t\tuint32_t restore;\n \n-\t\tlist[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da);\n+\t\tlist[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da,\n+\t\t\t\t\t\t mkvlist);\n \t\tif (!list[i].eth_dev) {\n \t\t\tif (rte_errno != EBUSY && rte_errno != EEXIST)\n \t\t\t\tbreak;\n@@ -2329,12 +2341,15 @@ mlx5_os_parse_eth_devargs(struct rte_device *dev,\n *\n * @param[in] cdev\n * Pointer to common mlx5 device structure.\n+ * @param[in, out] mkvlist\n+ * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.\n *\n * @return\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n static int\n-mlx5_os_pci_probe(struct mlx5_common_device *cdev)\n+mlx5_os_pci_probe(struct mlx5_common_device *cdev,\n+\t\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);\n \tstruct rte_eth_devargs eth_da = { .nb_ports = 0 };\n@@ -2349,7 +2364,7 @@ mlx5_os_pci_probe(struct mlx5_common_device *cdev)\n \t\t/* Iterate all port if devargs pf is range: \"pf[0-1]vf[...]\". */\n \t\tfor (p = 0; p < eth_da.nb_ports; p++) {\n \t\t\tret = mlx5_os_pci_probe_pf(cdev, ð_da,\n-\t\t\t\t\t\t eth_da.ports[p]);\n+\t\t\t\t\t\t eth_da.ports[p], mkvlist);\n \t\t\tif (ret)\n \t\t\t\tbreak;\n \t\t}\n@@ -2362,14 +2377,15 @@ mlx5_os_pci_probe(struct mlx5_common_device *cdev)\n \t\t\tmlx5_net_remove(cdev);\n \t\t}\n \t} else {\n-\t\tret = mlx5_os_pci_probe_pf(cdev, ð_da, 0);\n+\t\tret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist);\n \t}\n \treturn ret;\n }\n \n /* Probe a single SF device on auxiliary bus, no representor support. */\n static int\n-mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)\n+mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev,\n+\t\t\tstruct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct rte_eth_devargs eth_da = { .nb_ports = 0 };\n \tstruct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };\n@@ -2394,7 +2410,7 @@ mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)\n \tspawn.ifindex = ret;\n \tspawn.cdev = cdev;\n \t/* Spawn device. */\n-\teth_dev = mlx5_dev_spawn(dev, &spawn, ð_da);\n+\teth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist);\n \tif (eth_dev == NULL)\n \t\treturn -rte_errno;\n \t/* Post create. */\n@@ -2415,12 +2431,15 @@ mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)\n *\n * @param[in] cdev\n * Pointer to the common mlx5 device.\n+ * @param[in, out] mkvlist\n+ * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.\n *\n * @return\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n int\n-mlx5_os_net_probe(struct mlx5_common_device *cdev)\n+mlx5_os_net_probe(struct mlx5_common_device *cdev,\n+\t\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tint ret;\n \n@@ -2432,16 +2451,16 @@ mlx5_os_net_probe(struct mlx5_common_device *cdev)\n \t\t\tstrerror(rte_errno));\n \t\treturn -rte_errno;\n \t}\n-\tret = mlx5_probe_again_args_validate(cdev);\n+\tret = mlx5_probe_again_args_validate(cdev, mkvlist);\n \tif (ret) {\n \t\tDRV_LOG(ERR, \"Probe again parameters are not compatible : %s\",\n \t\t\tstrerror(rte_errno));\n \t\treturn -rte_errno;\n \t}\n \tif (mlx5_dev_is_pci(cdev->dev))\n-\t\treturn mlx5_os_pci_probe(cdev);\n+\t\treturn mlx5_os_pci_probe(cdev, mkvlist);\n \telse\n-\t\treturn mlx5_os_auxiliary_probe(cdev);\n+\t\treturn mlx5_os_auxiliary_probe(cdev, mkvlist);\n }\n \n /**\ndiff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex b3601155d7..a59a46bb27 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -43,9 +43,6 @@\n \n #define MLX5_ETH_DRIVER_NAME mlx5_eth\n \n-/* Driver type key for new device global syntax. */\n-#define MLX5_DRIVER_KEY \"driver\"\n-\n /* Device parameter to enable RX completion queue compression. */\n #define MLX5_RXQ_CQE_COMP_EN \"rxq_cqe_comp_en\"\n \n@@ -94,12 +91,6 @@\n /* Device parameter to enable multi-packet send WQEs. */\n #define MLX5_TXQ_MPW_EN \"txq_mpw_en\"\n \n-/*\n- * Device parameter to force doorbell register mapping\n- * to non-cahed region eliminating the extra write memory barrier.\n- */\n-#define MLX5_TX_DB_NC \"tx_db_nc\"\n-\n /*\n * Device parameter to include 2 dsegs in the title WQEBB.\n * Deprecated, ignored.\n@@ -152,9 +143,6 @@\n /* Activate Netlink support in VF mode. */\n #define MLX5_VF_NL_EN \"vf_nl_en\"\n \n-/* Enable extending memsegs when creating a MR. */\n-#define MLX5_MR_EXT_MEMSEG_EN \"mr_ext_memseg_en\"\n-\n /* Select port representors to instantiate. */\n #define MLX5_REPRESENTOR \"representor\"\n \n@@ -173,17 +161,12 @@\n /* Flow memory reclaim mode. */\n #define MLX5_RECLAIM_MEM \"reclaim_mem_mode\"\n \n-/* The default memory allocator used in PMD. */\n-#define MLX5_SYS_MEM_EN \"sys_mem_en\"\n /* Decap will be used or not. */\n #define MLX5_DECAP_EN \"decap_en\"\n \n /* Device parameter to configure allow or prevent duplicate rules pattern. */\n #define MLX5_ALLOW_DUPLICATE_PATTERN \"allow_duplicate_pattern\"\n \n-/* Device parameter to configure implicit registration of mempool memory. */\n-#define MLX5_MR_MEMPOOL_REG_EN \"mr_mempool_reg_en\"\n-\n /* Device parameter to configure the delay drop when creating Rxqs. */\n #define MLX5_DELAY_DROP \"delay_drop\"\n \n@@ -1255,8 +1238,8 @@ mlx5_dev_args_check_handler(const char *key, const char *val, void *opaque)\n *\n * @param sh\n * Pointer to shared device context.\n- * @param devargs\n- * Device arguments structure.\n+ * @param mkvlist\n+ * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.\n * @param config\n * Pointer to shared device configuration structure.\n *\n@@ -1265,10 +1248,23 @@ mlx5_dev_args_check_handler(const char *key, const char *val, void *opaque)\n */\n static int\n mlx5_shared_dev_ctx_args_config(struct mlx5_dev_ctx_shared *sh,\n-\t\t\t\tstruct rte_devargs *devargs,\n+\t\t\t\tstruct mlx5_kvargs_ctrl *mkvlist,\n \t\t\t\tstruct mlx5_sh_config *config)\n {\n-\tstruct rte_kvargs *kvlist;\n+\tconst char **params = (const char *[]){\n+\t\tMLX5_TX_PP,\n+\t\tMLX5_TX_SKEW,\n+\t\tMLX5_L3_VXLAN_EN,\n+\t\tMLX5_VF_NL_EN,\n+\t\tMLX5_DV_ESW_EN,\n+\t\tMLX5_DV_FLOW_EN,\n+\t\tMLX5_DV_XMETA_EN,\n+\t\tMLX5_LACP_BY_USER,\n+\t\tMLX5_RECLAIM_MEM,\n+\t\tMLX5_DECAP_EN,\n+\t\tMLX5_ALLOW_DUPLICATE_PATTERN,\n+\t\tNULL,\n+\t};\n \tint ret = 0;\n \n \t/* Default configuration. */\n@@ -1278,19 +1274,10 @@ mlx5_shared_dev_ctx_args_config(struct mlx5_dev_ctx_shared *sh,\n \tconfig->dv_flow_en = 1;\n \tconfig->decap_en = 1;\n \tconfig->allow_duplicate_pattern = 1;\n-\t/* Parse device parameters. */\n-\tif (devargs != NULL) {\n-\t\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n-\t\tif (kvlist == NULL) {\n-\t\t\tDRV_LOG(ERR,\n-\t\t\t\t\"Failed to parse shared device arguments.\");\n-\t\t\trte_errno = EINVAL;\n-\t\t\treturn -rte_errno;\n-\t\t}\n+\tif (mkvlist != NULL) {\n \t\t/* Process parameters. */\n-\t\tret = rte_kvargs_process(kvlist, NULL,\n-\t\t\t\t\t mlx5_dev_args_check_handler, config);\n-\t\trte_kvargs_free(kvlist);\n+\t\tret = mlx5_kvargs_process(mkvlist, params,\n+\t\t\t\t\t mlx5_dev_args_check_handler, config);\n \t\tif (ret) {\n \t\t\tDRV_LOG(ERR, \"Failed to process device arguments: %s\",\n \t\t\t\tstrerror(rte_errno));\n@@ -1398,13 +1385,16 @@ mlx5_rt_timestamp_config(struct mlx5_dev_ctx_shared *sh,\n *\n * @param[in] spawn\n * Pointer to the device attributes (name, port, etc).\n+ * @param mkvlist\n+ * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.\n *\n * @return\n * Pointer to mlx5_dev_ctx_shared object on success,\n * otherwise NULL and rte_errno is set.\n */\n struct mlx5_dev_ctx_shared *\n-mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn)\n+mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,\n+\t\t\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct mlx5_dev_ctx_shared *sh;\n \tint err = 0;\n@@ -1443,8 +1433,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn)\n \t\tDRV_LOG(ERR, \"Fail to configure device capabilities.\");\n \t\tgoto error;\n \t}\n-\terr = mlx5_shared_dev_ctx_args_config(sh, sh->cdev->dev->devargs,\n-\t\t\t\t\t &sh->config);\n+\terr = mlx5_shared_dev_ctx_args_config(sh, mkvlist, &sh->config);\n \tif (err) {\n \t\tDRV_LOG(ERR, \"Failed to process device configure: %s\",\n \t\t\tstrerror(rte_errno));\n@@ -2107,15 +2096,7 @@ mlx5_port_args_check_handler(const char *key, const char *val, void *opaque)\n \tsigned long tmp;\n \n \t/* No-op, port representors are processed in mlx5_dev_spawn(). */\n-\tif (!strcmp(MLX5_DRIVER_KEY, key) || !strcmp(MLX5_REPRESENTOR, key) ||\n-\t !strcmp(MLX5_SYS_MEM_EN, key) || !strcmp(MLX5_TX_DB_NC, key) ||\n-\t !strcmp(MLX5_MR_MEMPOOL_REG_EN, key) || !strcmp(MLX5_TX_PP, key) ||\n-\t !strcmp(MLX5_MR_EXT_MEMSEG_EN, key) || !strcmp(MLX5_TX_SKEW, key) ||\n-\t !strcmp(MLX5_RECLAIM_MEM, key) || !strcmp(MLX5_DECAP_EN, key) ||\n-\t !strcmp(MLX5_ALLOW_DUPLICATE_PATTERN, key) ||\n-\t !strcmp(MLX5_L3_VXLAN_EN, key) || !strcmp(MLX5_VF_NL_EN, key) ||\n-\t !strcmp(MLX5_DV_ESW_EN, key) || !strcmp(MLX5_DV_FLOW_EN, key) ||\n-\t !strcmp(MLX5_DV_XMETA_EN, key) || !strcmp(MLX5_LACP_BY_USER, key))\n+\tif (!strcmp(MLX5_REPRESENTOR, key))\n \t\treturn 0;\n \terrno = 0;\n \ttmp = strtol(val, NULL, 0);\n@@ -2181,17 +2162,11 @@ mlx5_port_args_check_handler(const char *key, const char *val, void *opaque)\n \t\tconfig->max_dump_files_num = tmp;\n \t} else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {\n \t\tconfig->lro_timeout = tmp;\n-\t} else if (strcmp(RTE_DEVARGS_KEY_CLASS, key) == 0) {\n-\t\tDRV_LOG(DEBUG, \"class argument is %s.\", val);\n \t} else if (strcmp(MLX5_HP_BUF_SIZE, key) == 0) {\n \t\tconfig->log_hp_size = tmp;\n \t} else if (strcmp(MLX5_DELAY_DROP, key) == 0) {\n \t\tconfig->std_delay_drop = !!(tmp & MLX5_DELAY_DROP_STANDARD);\n \t\tconfig->hp_delay_drop = !!(tmp & MLX5_DELAY_DROP_HAIRPIN);\n-\t} else {\n-\t\tDRV_LOG(WARNING,\n-\t\t\t\"%s: unknown parameter, maybe it's for another class.\",\n-\t\t\tkey);\n \t}\n \treturn 0;\n }\n@@ -2201,8 +2176,8 @@ mlx5_port_args_check_handler(const char *key, const char *val, void *opaque)\n *\n * @param priv\n * Pointer to shared device context.\n- * @param devargs\n- * Device arguments structure.\n+ * @param mkvlist\n+ * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.\n * @param config\n * Pointer to port configuration structure.\n *\n@@ -2210,13 +2185,38 @@ mlx5_port_args_check_handler(const char *key, const char *val, void *opaque)\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n int\n-mlx5_port_args_config(struct mlx5_priv *priv, struct rte_devargs *devargs,\n+mlx5_port_args_config(struct mlx5_priv *priv, struct mlx5_kvargs_ctrl *mkvlist,\n \t\t struct mlx5_port_config *config)\n {\n-\tstruct rte_kvargs *kvlist;\n \tstruct mlx5_hca_attr *hca_attr = &priv->sh->cdev->config.hca_attr;\n \tstruct mlx5_dev_cap *dev_cap = &priv->sh->dev_cap;\n \tbool devx = priv->sh->cdev->config.devx;\n+\tconst char **params = (const char *[]){\n+\t\tMLX5_RXQ_CQE_COMP_EN,\n+\t\tMLX5_RXQ_PKT_PAD_EN,\n+\t\tMLX5_RX_MPRQ_EN,\n+\t\tMLX5_RX_MPRQ_LOG_STRIDE_NUM,\n+\t\tMLX5_RX_MPRQ_LOG_STRIDE_SIZE,\n+\t\tMLX5_RX_MPRQ_MAX_MEMCPY_LEN,\n+\t\tMLX5_RXQS_MIN_MPRQ,\n+\t\tMLX5_TXQ_INLINE,\n+\t\tMLX5_TXQ_INLINE_MIN,\n+\t\tMLX5_TXQ_INLINE_MAX,\n+\t\tMLX5_TXQ_INLINE_MPW,\n+\t\tMLX5_TXQS_MIN_INLINE,\n+\t\tMLX5_TXQS_MAX_VEC,\n+\t\tMLX5_TXQ_MPW_EN,\n+\t\tMLX5_TXQ_MPW_HDR_DSEG_EN,\n+\t\tMLX5_TXQ_MAX_INLINE_LEN,\n+\t\tMLX5_TX_VEC_EN,\n+\t\tMLX5_RX_VEC_EN,\n+\t\tMLX5_REPRESENTOR,\n+\t\tMLX5_MAX_DUMP_FILES_NUM,\n+\t\tMLX5_LRO_TIMEOUT_USEC,\n+\t\tMLX5_HP_BUF_SIZE,\n+\t\tMLX5_DELAY_DROP,\n+\t\tNULL,\n+\t};\n \tint ret = 0;\n \n \t/* Default configuration. */\n@@ -2234,19 +2234,10 @@ mlx5_port_args_config(struct mlx5_priv *priv, struct rte_devargs *devargs,\n \tconfig->log_hp_size = MLX5_ARG_UNSET;\n \tconfig->std_delay_drop = 0;\n \tconfig->hp_delay_drop = 0;\n-\t/* Parse device parameters. */\n-\tif (devargs != NULL) {\n-\t\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n-\t\tif (kvlist == NULL) {\n-\t\t\tDRV_LOG(ERR,\n-\t\t\t\t\"Failed to parse device arguments.\");\n-\t\t\trte_errno = EINVAL;\n-\t\t\treturn -rte_errno;\n-\t\t}\n+\tif (mkvlist != NULL) {\n \t\t/* Process parameters. */\n-\t\tret = rte_kvargs_process(kvlist, NULL,\n-\t\t\t\t\t mlx5_port_args_check_handler, config);\n-\t\trte_kvargs_free(kvlist);\n+\t\tret = mlx5_kvargs_process(mkvlist, params,\n+\t\t\t\t\t mlx5_port_args_check_handler, config);\n \t\tif (ret) {\n \t\t\tDRV_LOG(ERR, \"Failed to process port arguments: %s\",\n \t\t\t\tstrerror(rte_errno));\n@@ -2349,6 +2340,85 @@ mlx5_port_args_config(struct mlx5_priv *priv, struct rte_devargs *devargs,\n \treturn 0;\n }\n \n+/**\n+ * Print the key for device argument.\n+ *\n+ * It is \"dummy\" handler whose whole purpose is to enable using\n+ * mlx5_kvargs_process() function which set devargs as used.\n+ *\n+ * @param key\n+ * Key argument.\n+ * @param val\n+ * Value associated with key, unused.\n+ * @param opaque\n+ * Unused, can be NULL.\n+ *\n+ * @return\n+ * 0 on success, function cannot fail.\n+ */\n+static int\n+mlx5_dummy_handler(const char *key, const char *val, void *opaque)\n+{\n+\tDRV_LOG(DEBUG, \"\\tKey: \\\"%s\\\" is set as used.\", key);\n+\tRTE_SET_USED(opaque);\n+\tRTE_SET_USED(val);\n+\treturn 0;\n+}\n+\n+/**\n+ * Set requested devargs as used when device is already spawned.\n+ *\n+ * It is necessary since it is valid to ask probe again for existing device,\n+ * if its devargs don't assign as used, mlx5_kvargs_validate() will fail.\n+ *\n+ * @param name\n+ * Name of the existing device.\n+ * @param port_id\n+ * Port identifier of the device.\n+ * @param mkvlist\n+ * Pointer to mlx5 kvargs control to sign as used.\n+ */\n+void\n+mlx5_port_args_set_used(const char *name, uint16_t port_id,\n+\t\t\tstruct mlx5_kvargs_ctrl *mkvlist)\n+{\n+\tconst char **params = (const char *[]){\n+\t\tMLX5_RXQ_CQE_COMP_EN,\n+\t\tMLX5_RXQ_PKT_PAD_EN,\n+\t\tMLX5_RX_MPRQ_EN,\n+\t\tMLX5_RX_MPRQ_LOG_STRIDE_NUM,\n+\t\tMLX5_RX_MPRQ_LOG_STRIDE_SIZE,\n+\t\tMLX5_RX_MPRQ_MAX_MEMCPY_LEN,\n+\t\tMLX5_RXQS_MIN_MPRQ,\n+\t\tMLX5_TXQ_INLINE,\n+\t\tMLX5_TXQ_INLINE_MIN,\n+\t\tMLX5_TXQ_INLINE_MAX,\n+\t\tMLX5_TXQ_INLINE_MPW,\n+\t\tMLX5_TXQS_MIN_INLINE,\n+\t\tMLX5_TXQS_MAX_VEC,\n+\t\tMLX5_TXQ_MPW_EN,\n+\t\tMLX5_TXQ_MPW_HDR_DSEG_EN,\n+\t\tMLX5_TXQ_MAX_INLINE_LEN,\n+\t\tMLX5_TX_VEC_EN,\n+\t\tMLX5_RX_VEC_EN,\n+\t\tMLX5_REPRESENTOR,\n+\t\tMLX5_MAX_DUMP_FILES_NUM,\n+\t\tMLX5_LRO_TIMEOUT_USEC,\n+\t\tMLX5_HP_BUF_SIZE,\n+\t\tMLX5_DELAY_DROP,\n+\t\tNULL,\n+\t};\n+\n+\t/* Secondary process should not handle devargs. */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn;\n+\tMLX5_ASSERT(mkvlist != NULL);\n+\tDRV_LOG(DEBUG, \"Ethernet device \\\"%s\\\" for port %u \"\n+\t\t\"already exists, set devargs as used:\", name, port_id);\n+\t/* This function cannot fail with this handler. */\n+\tmlx5_kvargs_process(mkvlist, params, mlx5_dummy_handler, NULL);\n+}\n+\n /**\n * Check sibling device configurations when probing again.\n *\n@@ -2357,12 +2427,15 @@ mlx5_port_args_config(struct mlx5_priv *priv, struct rte_devargs *devargs,\n *\n * @param cdev\n * Pointer to mlx5 device structure.\n+ * @param mkvlist\n+ * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.\n *\n * @return\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n int\n-mlx5_probe_again_args_validate(struct mlx5_common_device *cdev)\n+mlx5_probe_again_args_validate(struct mlx5_common_device *cdev,\n+\t\t\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct mlx5_dev_ctx_shared *sh = NULL;\n \tstruct mlx5_sh_config *config;\n@@ -2391,8 +2464,7 @@ mlx5_probe_again_args_validate(struct mlx5_common_device *cdev)\n \t * Creates a temporary IB context configure structure according to new\n \t * devargs attached in probing again.\n \t */\n-\tret = mlx5_shared_dev_ctx_args_config(sh, sh->cdev->dev->devargs,\n-\t\t\t\t\t config);\n+\tret = mlx5_shared_dev_ctx_args_config(sh, mkvlist, config);\n \tif (ret) {\n \t\tDRV_LOG(ERR, \"Failed to process device configure: %s\",\n \t\t\tstrerror(rte_errno));\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 95910aba1b..35ea3fb47c 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -1541,16 +1541,21 @@ void mlx5_age_event_prepare(struct mlx5_dev_ctx_shared *sh);\n void mlx5_rt_timestamp_config(struct mlx5_dev_ctx_shared *sh,\n \t\t\t struct mlx5_hca_attr *hca_attr);\n struct mlx5_dev_ctx_shared *\n-mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn);\n+mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,\n+\t\t\t struct mlx5_kvargs_ctrl *mkvlist);\n void mlx5_free_shared_dev_ctx(struct mlx5_dev_ctx_shared *sh);\n int mlx5_dev_ctx_shared_mempool_subscribe(struct rte_eth_dev *dev);\n void mlx5_free_table_hash_list(struct mlx5_priv *priv);\n int mlx5_alloc_table_hash_list(struct mlx5_priv *priv);\n void mlx5_set_min_inline(struct mlx5_priv *priv);\n void mlx5_set_metadata_mask(struct rte_eth_dev *dev);\n-int mlx5_probe_again_args_validate(struct mlx5_common_device *cdev);\n-int mlx5_port_args_config(struct mlx5_priv *priv, struct rte_devargs *devargs,\n+int mlx5_probe_again_args_validate(struct mlx5_common_device *cdev,\n+\t\t\t\t struct mlx5_kvargs_ctrl *mkvlist);\n+int mlx5_port_args_config(struct mlx5_priv *priv,\n+\t\t\t struct mlx5_kvargs_ctrl *mkvlist,\n \t\t\t struct mlx5_port_config *config);\n+void mlx5_port_args_set_used(const char *name, uint16_t port_id,\n+\t\t\t struct mlx5_kvargs_ctrl *mkvlist);\n bool mlx5_flex_parser_ecpri_exist(struct rte_eth_dev *dev);\n int mlx5_flex_parser_ecpri_alloc(struct rte_eth_dev *dev);\n void mlx5_flow_counter_mode_config(struct rte_eth_dev *dev);\n@@ -1811,7 +1816,8 @@ void mlx5_flow_meter_rxq_flush(struct rte_eth_dev *dev);\n struct rte_pci_driver;\n int mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh);\n void mlx5_os_free_shared_dr(struct mlx5_priv *priv);\n-int mlx5_os_net_probe(struct mlx5_common_device *cdev);\n+int mlx5_os_net_probe(struct mlx5_common_device *cdev,\n+\t\t struct mlx5_kvargs_ctrl *mkvlist);\n void mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh);\n void mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh);\n void mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index);\ndiff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c\nindex f511f97494..965df80106 100644\n--- a/drivers/net/mlx5/windows/mlx5_os.c\n+++ b/drivers/net/mlx5/windows/mlx5_os.c\n@@ -284,6 +284,8 @@ mlx5_os_set_nonblock_channel_fd(int fd)\n * Backing DPDK device.\n * @param spawn\n * Verbs device parameters (name, port, switch_info) to spawn.\n+ * @param mkvlist\n+ * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.\n *\n * @return\n * A valid Ethernet device object on success, NULL otherwise and rte_errno\n@@ -293,7 +295,8 @@ mlx5_os_set_nonblock_channel_fd(int fd)\n */\n static struct rte_eth_dev *\n mlx5_dev_spawn(struct rte_device *dpdk_dev,\n-\t struct mlx5_dev_spawn_data *spawn)\n+\t struct mlx5_dev_spawn_data *spawn,\n+\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tconst struct mlx5_switch_info *switch_info = &spawn->info;\n \tstruct mlx5_dev_ctx_shared *sh = NULL;\n@@ -314,7 +317,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\treturn NULL;\n \t}\n \tDRV_LOG(DEBUG, \"naming Ethernet device \\\"%s\\\"\", name);\n-\tsh = mlx5_alloc_shared_dev_ctx(spawn);\n+\tsh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist);\n \tif (!sh)\n \t\treturn NULL;\n \tif (!sh->config.dv_flow_en) {\n@@ -386,7 +389,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\town_domain_id = 1;\n \t}\n \t/* Process parameters and store port configuration on priv structure. */\n-\terr = mlx5_port_args_config(priv, dpdk_dev->devargs, &priv->config);\n+\terr = mlx5_port_args_config(priv, mkvlist, &priv->config);\n \tif (err) {\n \t\terr = rte_errno;\n \t\tDRV_LOG(ERR, \"Failed to process port configure: %s\",\n@@ -770,14 +773,17 @@ mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)\n *\n * This function spawns Ethernet devices out of a given device.\n *\n- * @param[in] dev\n+ * @param[in] cdev\n * Pointer to the common device.\n+ * @param[in, out] mkvlist\n+ * Pointer to mlx5 kvargs control, can be NULL if there is no devargs.\n *\n * @return\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n int\n-mlx5_os_net_probe(struct mlx5_common_device *cdev)\n+mlx5_os_net_probe(struct mlx5_common_device *cdev,\n+\t\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);\n \tstruct mlx5_dev_spawn_data spawn = {\n@@ -805,7 +811,7 @@ mlx5_os_net_probe(struct mlx5_common_device *cdev)\n \t\t\tstrerror(rte_errno));\n \t\treturn -rte_errno;\n \t}\n-\tspawn.eth_dev = mlx5_dev_spawn(cdev->dev, &spawn);\n+\tspawn.eth_dev = mlx5_dev_spawn(cdev->dev, &spawn, mkvlist);\n \tif (!spawn.eth_dev)\n \t\treturn -rte_errno;\n \trestore = spawn.eth_dev->data->dev_flags;\ndiff --git a/drivers/regex/mlx5/mlx5_regex.c b/drivers/regex/mlx5/mlx5_regex.c\nindex e5a12fb3cc..dc2bd868ea 100644\n--- a/drivers/regex/mlx5/mlx5_regex.c\n+++ b/drivers/regex/mlx5/mlx5_regex.c\n@@ -67,7 +67,8 @@ mlx5_regex_get_name(char *name, struct rte_device *dev)\n }\n \n static int\n-mlx5_regex_dev_probe(struct mlx5_common_device *cdev)\n+mlx5_regex_dev_probe(struct mlx5_common_device *cdev,\n+\t\t struct mlx5_kvargs_ctrl *mkvlist __rte_unused)\n {\n \tstruct mlx5_regex_priv *priv = NULL;\n \tstruct mlx5_hca_attr *attr = &cdev->config.hca_attr;\ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa.c b/drivers/vdpa/mlx5/mlx5_vdpa.c\nindex b9e84dd9bf..cb3a1ac340 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa.c\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa.c\n@@ -443,8 +443,6 @@ mlx5_vdpa_args_check_handler(const char *key, const char *val, void *opaque)\n \tunsigned long tmp;\n \tint n_cores = sysconf(_SC_NPROCESSORS_ONLN);\n \n-\tif (strcmp(key, RTE_DEVARGS_KEY_CLASS) == 0)\n-\t\treturn 0;\n \terrno = 0;\n \ttmp = strtoul(val, NULL, 0);\n \tif (errno) {\n@@ -471,28 +469,33 @@ mlx5_vdpa_args_check_handler(const char *key, const char *val, void *opaque)\n \t\tpriv->hw_max_latency_us = (uint32_t)tmp;\n \t} else if (strcmp(key, \"hw_max_pending_comp\") == 0) {\n \t\tpriv->hw_max_pending_comp = (uint32_t)tmp;\n-\t} else {\n-\t\tDRV_LOG(WARNING, \"Invalid key %s.\", key);\n \t}\n \treturn 0;\n }\n \n static void\n-mlx5_vdpa_config_get(struct rte_devargs *devargs, struct mlx5_vdpa_priv *priv)\n+mlx5_vdpa_config_get(struct mlx5_kvargs_ctrl *mkvlist,\n+\t\t struct mlx5_vdpa_priv *priv)\n {\n-\tstruct rte_kvargs *kvlist;\n+\tconst char **params = (const char *[]){\n+\t\t\"event_core\",\n+\t\t\"event_mode\",\n+\t\t\"event_us\",\n+\t\t\"hw_latency_mode\",\n+\t\t\"hw_max_latency_us\",\n+\t\t\"hw_max_pending_comp\",\n+\t\t\"no_traffic_time\",\n+\t\tNULL,\n+\t};\n \n \tpriv->event_mode = MLX5_VDPA_EVENT_MODE_FIXED_TIMER;\n \tpriv->event_us = 0;\n \tpriv->event_core = -1;\n \tpriv->no_traffic_max = MLX5_VDPA_DEFAULT_NO_TRAFFIC_MAX;\n-\tif (devargs == NULL)\n-\t\treturn;\n-\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n-\tif (kvlist == NULL)\n+\tif (mkvlist == NULL)\n \t\treturn;\n-\trte_kvargs_process(kvlist, NULL, mlx5_vdpa_args_check_handler, priv);\n-\trte_kvargs_free(kvlist);\n+\tmlx5_kvargs_process(mkvlist, params, mlx5_vdpa_args_check_handler,\n+\t\t\t priv);\n \tif (!priv->event_us &&\n \t priv->event_mode == MLX5_VDPA_EVENT_MODE_DYNAMIC_TIMER)\n \t\tpriv->event_us = MLX5_VDPA_DEFAULT_TIMER_STEP_US;\n@@ -502,7 +505,8 @@ mlx5_vdpa_config_get(struct rte_devargs *devargs, struct mlx5_vdpa_priv *priv)\n }\n \n static int\n-mlx5_vdpa_dev_probe(struct mlx5_common_device *cdev)\n+mlx5_vdpa_dev_probe(struct mlx5_common_device *cdev,\n+\t\t struct mlx5_kvargs_ctrl *mkvlist)\n {\n \tstruct mlx5_vdpa_priv *priv = NULL;\n \tstruct mlx5_hca_attr *attr = &cdev->config.hca_attr;\n@@ -555,7 +559,7 @@ mlx5_vdpa_dev_probe(struct mlx5_common_device *cdev)\n \t\trte_errno = rte_errno ? rte_errno : EINVAL;\n \t\tgoto error;\n \t}\n-\tmlx5_vdpa_config_get(cdev->dev->devargs, priv);\n+\tmlx5_vdpa_config_get(mkvlist, priv);\n \tSLIST_INIT(&priv->mr_list);\n \tpthread_mutex_init(&priv->vq_config_lock, NULL);\n \tpthread_mutex_lock(&priv_list_lock);\n", "prefixes": [ "20/20" ] }