get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/106937/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 106937,
    "url": "http://patchwork.dpdk.org/api/patches/106937/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220207072932.22409-4-ndabilpuram@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220207072932.22409-4-ndabilpuram@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220207072932.22409-4-ndabilpuram@marvell.com",
    "date": "2022-02-07T07:29:16",
    "name": "[04/20] common/cnxk: support inline device API without ROC NIX",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "e0ce2cea3dde8b8d8848a8a55c3fed82a8253873",
    "submitter": {
        "id": 1202,
        "url": "http://patchwork.dpdk.org/api/people/1202/?format=api",
        "name": "Nithin Dabilpuram",
        "email": "ndabilpuram@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patchwork.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220207072932.22409-4-ndabilpuram@marvell.com/mbox/",
    "series": [
        {
            "id": 21483,
            "url": "http://patchwork.dpdk.org/api/series/21483/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21483",
            "date": "2022-02-07T07:29:13",
            "name": "[01/20] common/cnxk: increase resource count for bitmap alloc",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/21483/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/106937/comments/",
    "check": "pending",
    "checks": "http://patchwork.dpdk.org/api/patches/106937/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3EC3FA034F;\n\tMon,  7 Feb 2022 08:30:44 +0100 (CET)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9728641157;\n\tMon,  7 Feb 2022 08:30:18 +0100 (CET)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 1A1F3410F7\n for <dev@dpdk.org>; Mon,  7 Feb 2022 08:30:15 +0100 (CET)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 216MmlZp020123;\n Sun, 6 Feb 2022 23:30:12 -0800",
            "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3e1smr4p2e-3\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Sun, 06 Feb 2022 23:30:12 -0800",
            "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Sun, 6 Feb 2022 23:29:57 -0800",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Sun, 6 Feb 2022 23:29:57 -0800",
            "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 26B873F704F;\n Sun,  6 Feb 2022 23:29:54 -0800 (PST)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=PN+I1fn6hazJ9mxQP+bxOAD+npdHPASd8hqaJFFWIyA=;\n b=TBIuI90hHtMxpDZx0rzQbqA4iZa5eYJUJxozJLimXZtWqYTneV+BTvecEoJOJ/bWCNTZ\n oYW4sCJci8yzTLarbck97dAUWPa1Ac8/9FUnsO9mJmsh6cpjD41LMiumoZRVEFCji+CS\n 3S5QiHUhhSc9reKvyyPmwAS2bzohehnT676sBZycsq/ReYPuHljg4V9XHrBvN1WTdDRJ\n 1Ko4bX+dDBwsCq63nReZ+UO5z4ib4xokiGnqh/nVABZGwwpVRnQK559ryqD3b+Sleq0q\n /kKUqFX4msffPlSEBmFH3e266GzyGZbz5aXjLmiIg5TjmpSpHV54ymVR00Ib4fOEelNM CA==",
        "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>",
        "To": "<jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>",
        "CC": "<dev@dpdk.org>, Vidya Sagar Velumuri <vvelumuri@marvell.com>",
        "Subject": "[PATCH 04/20] common/cnxk: support inline device API without ROC NIX",
        "Date": "Mon, 7 Feb 2022 12:59:16 +0530",
        "Message-ID": "<20220207072932.22409-4-ndabilpuram@marvell.com>",
        "X-Mailer": "git-send-email 2.8.4",
        "In-Reply-To": "<20220207072932.22409-1-ndabilpuram@marvell.com>",
        "References": "<20220207072932.22409-1-ndabilpuram@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "wYeSBHlSWOTleAD-mKdEPKC6pSdMm89E",
        "X-Proofpoint-ORIG-GUID": "wYeSBHlSWOTleAD-mKdEPKC6pSdMm89E",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2022-02-07_02,2022-02-03_01,2021-12-02_01",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n\nUpdate the inline device functions to work when roc_nix is NULL.\nThis is required, as IPsec driver have to use these APIs to work\nwith inline IPsec device, but the IPsec driver might not have roc_nix\ninformation.\n\nSigned-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n---\n drivers/common/cnxk/roc_nix_inl.c      | 98 ++++++++++++++++++++++++----------\n drivers/common/cnxk/roc_nix_inl.h      |  2 +\n drivers/common/cnxk/roc_nix_inl_dev.c  |  7 +++\n drivers/common/cnxk/roc_nix_inl_priv.h |  1 +\n drivers/common/cnxk/version.map        |  1 +\n drivers/net/cnxk/cnxk_ethdev_sec.c     |  2 +\n 6 files changed, 84 insertions(+), 27 deletions(-)",
    "diff": "diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c\nindex e8981c4..356d11d 100644\n--- a/drivers/common/cnxk/roc_nix_inl.c\n+++ b/drivers/common/cnxk/roc_nix_inl.c\n@@ -107,18 +107,24 @@ roc_nix_inl_outb_sa_base_get(struct roc_nix *roc_nix)\n uintptr_t\n roc_nix_inl_inb_sa_base_get(struct roc_nix *roc_nix, bool inb_inl_dev)\n {\n-\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n \tstruct idev_cfg *idev = idev_get_cfg();\n \tstruct nix_inl_dev *inl_dev;\n+\tstruct nix *nix = NULL;\n \n \tif (idev == NULL)\n \t\treturn 0;\n \n-\tif (!nix->inl_inb_ena)\n-\t\treturn 0;\n+\tif (!inb_inl_dev && roc_nix == NULL)\n+\t\treturn -EINVAL;\n+\n+\tif (roc_nix) {\n+\t\tnix = roc_nix_to_nix_priv(roc_nix);\n+\t\tif (!nix->inl_inb_ena)\n+\t\t\treturn 0;\n+\t}\n \n-\tinl_dev = idev->nix_inl_dev;\n \tif (inb_inl_dev) {\n+\t\tinl_dev = idev->nix_inl_dev;\n \t\t/* Return inline dev sa base */\n \t\tif (inl_dev)\n \t\t\treturn (uintptr_t)inl_dev->inb_sa_base;\n@@ -131,18 +137,24 @@ roc_nix_inl_inb_sa_base_get(struct roc_nix *roc_nix, bool inb_inl_dev)\n uint32_t\n roc_nix_inl_inb_sa_max_spi(struct roc_nix *roc_nix, bool inb_inl_dev)\n {\n-\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n \tstruct idev_cfg *idev = idev_get_cfg();\n \tstruct nix_inl_dev *inl_dev;\n+\tstruct nix *nix;\n \n \tif (idev == NULL)\n \t\treturn 0;\n \n-\tif (!nix->inl_inb_ena)\n-\t\treturn 0;\n+\tif (!inb_inl_dev && roc_nix == NULL)\n+\t\treturn -EINVAL;\n+\n+\tif (roc_nix) {\n+\t\tnix = roc_nix_to_nix_priv(roc_nix);\n+\t\tif (!nix->inl_inb_ena)\n+\t\t\treturn 0;\n+\t}\n \n-\tinl_dev = idev->nix_inl_dev;\n \tif (inb_inl_dev) {\n+\t\tinl_dev = idev->nix_inl_dev;\n \t\tif (inl_dev)\n \t\t\treturn inl_dev->ipsec_in_max_spi;\n \t\treturn 0;\n@@ -154,21 +166,28 @@ roc_nix_inl_inb_sa_max_spi(struct roc_nix *roc_nix, bool inb_inl_dev)\n uint32_t\n roc_nix_inl_inb_sa_sz(struct roc_nix *roc_nix, bool inl_dev_sa)\n {\n-\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n \tstruct idev_cfg *idev = idev_get_cfg();\n \tstruct nix_inl_dev *inl_dev;\n+\tstruct nix *nix;\n \n \tif (idev == NULL)\n \t\treturn 0;\n \n-\tif (!inl_dev_sa)\n-\t\treturn nix->inb_sa_sz;\n+\tif (!inl_dev_sa && roc_nix == NULL)\n+\t\treturn -EINVAL;\n \n-\tinl_dev = idev->nix_inl_dev;\n-\tif (inl_dev_sa && inl_dev)\n-\t\treturn inl_dev->inb_sa_sz;\n+\tif (roc_nix) {\n+\t\tnix = roc_nix_to_nix_priv(roc_nix);\n+\t\tif (!inl_dev_sa)\n+\t\t\treturn nix->inb_sa_sz;\n+\t}\n+\n+\tif (inl_dev_sa) {\n+\t\tinl_dev = idev->nix_inl_dev;\n+\t\tif (inl_dev)\n+\t\t\treturn inl_dev->inb_sa_sz;\n+\t}\n \n-\t/* On error */\n \treturn 0;\n }\n \n@@ -536,7 +555,7 @@ roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq)\n \tinl_rq->tag_mask = 0xFFF00000;\n \tinl_rq->tt = SSO_TT_ORDERED;\n \tinl_rq->hwgrp = 0;\n-\tinl_rq->wqe_skip = 1;\n+\tinl_rq->wqe_skip = inl_dev->wqe_skip;\n \tinl_rq->sso_ena = true;\n \n \t/* Prepare and send RQ init mbox */\n@@ -731,13 +750,14 @@ int\n roc_nix_inl_sa_sync(struct roc_nix *roc_nix, void *sa, bool inb,\n \t\t    enum roc_nix_inl_sa_sync_op op)\n {\n-\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n-\tstruct roc_cpt_lf *outb_lf = nix->cpt_lf_base;\n \tstruct idev_cfg *idev = idev_get_cfg();\n \tstruct nix_inl_dev *inl_dev = NULL;\n+\tstruct roc_cpt_lf *outb_lf = NULL;\n \tunion cpt_lf_ctx_reload reload;\n \tunion cpt_lf_ctx_flush flush;\n+\tbool get_inl_lf = true;\n \tuintptr_t rbase;\n+\tstruct nix *nix;\n \n \t/* Nothing much to do on cn9k */\n \tif (roc_model_is_cn9k()) {\n@@ -745,11 +765,22 @@ roc_nix_inl_sa_sync(struct roc_nix *roc_nix, void *sa, bool inb,\n \t\treturn 0;\n \t}\n \n-\tif (inb && nix->inb_inl_dev) {\n+\tif (idev)\n+\t\tinl_dev = idev->nix_inl_dev;\n+\n+\tif (!inl_dev && roc_nix == NULL)\n+\t\treturn -EINVAL;\n+\n+\tif (roc_nix) {\n+\t\tnix = roc_nix_to_nix_priv(roc_nix);\n+\t\toutb_lf = nix->cpt_lf_base;\n+\t\tif (inb && !nix->inb_inl_dev)\n+\t\t\tget_inl_lf = false;\n+\t}\n+\n+\tif (inb && get_inl_lf) {\n \t\toutb_lf = NULL;\n-\t\tif (idev)\n-\t\t\tinl_dev = idev->nix_inl_dev;\n-\t\tif (inl_dev)\n+\t\tif (inl_dev && inl_dev->attach_cptlf)\n \t\t\toutb_lf = &inl_dev->cpt_lf;\n \t}\n \n@@ -783,12 +814,13 @@ int\n roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr,\n \t\t      bool inb, uint16_t sa_len)\n {\n-\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n-\tstruct roc_cpt_lf *outb_lf = nix->cpt_lf_base;\n \tstruct idev_cfg *idev = idev_get_cfg();\n \tstruct nix_inl_dev *inl_dev = NULL;\n+\tstruct roc_cpt_lf *outb_lf = NULL;\n \tunion cpt_lf_ctx_flush flush;\n+\tbool get_inl_lf = true;\n \tuintptr_t rbase;\n+\tstruct nix *nix;\n \tint rc;\n \n \t/* Nothing much to do on cn9k */\n@@ -797,10 +829,22 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr,\n \t\treturn 0;\n \t}\n \n-\tif (inb && nix->inb_inl_dev) {\n+\tif (idev)\n+\t\tinl_dev = idev->nix_inl_dev;\n+\n+\tif (!inl_dev && roc_nix == NULL)\n+\t\treturn -EINVAL;\n+\n+\tif (roc_nix) {\n+\t\tnix = roc_nix_to_nix_priv(roc_nix);\n+\t\toutb_lf = nix->cpt_lf_base;\n+\n+\t\tif (inb && !nix->inb_inl_dev)\n+\t\t\tget_inl_lf = false;\n+\t}\n+\n+\tif (inb && get_inl_lf) {\n \t\toutb_lf = NULL;\n-\t\tif (idev)\n-\t\t\tinl_dev = idev->nix_inl_dev;\n \t\tif (inl_dev && inl_dev->attach_cptlf)\n \t\t\toutb_lf = &inl_dev->cpt_lf;\n \t}\ndiff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h\nindex bbdcbc8..ceeccab 100644\n--- a/drivers/common/cnxk/roc_nix_inl.h\n+++ b/drivers/common/cnxk/roc_nix_inl.h\n@@ -111,6 +111,7 @@ struct roc_nix_inl_dev {\n \tuint16_t channel;\n \tuint16_t chan_mask;\n \tbool attach_cptlf;\n+\tbool wqe_skip;\n \t/* End of input parameters */\n \n #define ROC_NIX_INL_MEM_SZ (1280)\n@@ -125,6 +126,7 @@ bool __roc_api roc_nix_inl_dev_is_probed(void);\n void __roc_api roc_nix_inl_dev_lock(void);\n void __roc_api roc_nix_inl_dev_unlock(void);\n int __roc_api roc_nix_inl_dev_xaq_realloc(uint64_t aura_handle);\n+uint16_t __roc_api roc_nix_inl_dev_pffunc_get(void);\n \n /* NIX Inline Inbound API */\n int __roc_api roc_nix_inl_inb_init(struct roc_nix *roc_nix);\ndiff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c\nindex 1d14f04..12160e9 100644\n--- a/drivers/common/cnxk/roc_nix_inl_dev.c\n+++ b/drivers/common/cnxk/roc_nix_inl_dev.c\n@@ -27,6 +27,12 @@ nix_inl_dev_pffunc_get(void)\n \treturn 0;\n }\n \n+uint16_t\n+roc_nix_inl_dev_pffunc_get(void)\n+{\n+\treturn nix_inl_dev_pffunc_get();\n+}\n+\n static void\n nix_inl_selftest_work_cb(uint64_t *gw, void *args)\n {\n@@ -655,6 +661,7 @@ roc_nix_inl_dev_init(struct roc_nix_inl_dev *roc_inl_dev)\n \tinl_dev->channel = roc_inl_dev->channel;\n \tinl_dev->chan_mask = roc_inl_dev->chan_mask;\n \tinl_dev->attach_cptlf = roc_inl_dev->attach_cptlf;\n+\tinl_dev->wqe_skip = roc_inl_dev->wqe_skip;\n \n \t/* Initialize base device */\n \trc = dev_init(&inl_dev->dev, pci_dev);\ndiff --git a/drivers/common/cnxk/roc_nix_inl_priv.h b/drivers/common/cnxk/roc_nix_inl_priv.h\nindex 17df23f..dcf752e 100644\n--- a/drivers/common/cnxk/roc_nix_inl_priv.h\n+++ b/drivers/common/cnxk/roc_nix_inl_priv.h\n@@ -58,6 +58,7 @@ struct nix_inl_dev {\n \tbool is_multi_channel;\n \tuint16_t ipsec_in_max_spi;\n \tbool attach_cptlf;\n+\tbool wqe_skip;\n };\n \n int nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev);\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 617364f..4f98a38 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -156,6 +156,7 @@ INTERNAL {\n \troc_nix_inl_outb_is_enabled;\n \troc_nix_inl_sa_sync;\n \troc_nix_inl_ctx_write;\n+\troc_nix_inl_dev_pffunc_get;\n \troc_nix_inl_inb_sa_init;\n \troc_nix_inl_outb_sa_init;\n \troc_nix_cpt_ctx_cache_sync;\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_sec.c b/drivers/net/cnxk/cnxk_ethdev_sec.c\nindex 3fef056..ea204ca 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_sec.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_sec.c\n@@ -278,6 +278,8 @@ cnxk_nix_inl_dev_probe(struct rte_pci_driver *pci_drv,\n \t}\n \n \tinl_dev->attach_cptlf = true;\n+\t/* WQE skip is one for DPDK */\n+\tinl_dev->wqe_skip = true;\n \trc = roc_nix_inl_dev_init(inl_dev);\n \tif (rc) {\n \t\tplt_err(\"Failed to init nix inl device, rc=%d(%s)\", rc,\n",
    "prefixes": [
        "04/20"
    ]
}