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{
    "id": 107824,
    "url": "http://patchwork.dpdk.org/api/patches/107824/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220218171527.56719-10-kai.ji@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220218171527.56719-10-kai.ji@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220218171527.56719-10-kai.ji@intel.com",
    "date": "2022-02-18T17:15:27",
    "name": "[v9,9/9] crypto/qat: support out of place SG list",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "f9e325d405ab5c985835e4cfdfc69f37deb8031c",
    "submitter": {
        "id": 2202,
        "url": "http://patchwork.dpdk.org/api/people/2202/?format=api",
        "name": "Ji, Kai",
        "email": "kai.ji@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patchwork.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220218171527.56719-10-kai.ji@intel.com/mbox/",
    "series": [
        {
            "id": 21741,
            "url": "http://patchwork.dpdk.org/api/series/21741/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=21741",
            "date": "2022-02-18T17:15:18",
            "name": "drivers/qat: QAT symmetric crypto datapatch rework",
            "version": 9,
            "mbox": "http://patchwork.dpdk.org/series/21741/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/107824/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/107824/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
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            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 8E54A41190;\n\tFri, 18 Feb 2022 18:16:02 +0100 (CET)",
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        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1645204549; x=1676740549;\n h=from:to:cc:subject:date:message-id:in-reply-to: references;\n bh=e10CUen7xOu5Gn8neA2LK0/8OvMaDpekHReOMPT/+hU=;\n b=THEAb9shRYsEO5wqAHvWh6V6MkJujrXtc5K23TP6b9vCpWD5lwr8nkam\n l6/uX4quo9Gd/e56+LkCLFDrBDD83xuN/fqmTWjStmHWkQZoXyGLw9h4H\n gBwRVlKdn8ErtC6eHdhgy+ipPBsOO/zgCpcHBaXCg1WjtGle784BJRmvk\n wdvxlJmo3EAYx1wSsAU8fRhd8CqNY6e6d3ErtcuWTRw+OdL6WipDOkaTm\n gx/WAtH4PgKsdcNzkL4EqncYLAi6y40j1LpJckUgm2I1uA/KL2scie/or\n XNO8tNppmUn9Q3UVEkWy7XoVtx9Nzpw4v+v1byIYmVz93ulQEBaKQB7mu g==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,10262\"; a=\"238571914\"",
            "E=Sophos;i=\"5.88,379,1635231600\"; d=\"scan'208\";a=\"238571914\"",
            "E=Sophos;i=\"5.88,379,1635231600\"; d=\"scan'208\";a=\"705446329\""
        ],
        "X-ExtLoop1": "1",
        "From": "Kai Ji <kai.ji@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "gakhil@marvell.com,\n\troy.fan.zhang@intel.com,\n\tKai Ji <kai.ji@intel.com>",
        "Subject": "[dpdk-dev v9 9/9] crypto/qat: support out of place SG list",
        "Date": "Sat, 19 Feb 2022 01:15:27 +0800",
        "Message-Id": "<20220218171527.56719-10-kai.ji@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20220218171527.56719-1-kai.ji@intel.com>",
        "References": "<20220217162909.22713-1-kai.ji@intel.com>\n <20220218171527.56719-1-kai.ji@intel.com>",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "This patch adds the SGL out of place support to QAT PMD\n\nSigned-off-by: Kai Ji <kai.ji@intel.com>\n---\n drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 28 ++++++++--\n drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c | 14 ++++-\n drivers/crypto/qat/dev/qat_sym_pmd_gen1.c    | 55 +++++++++++++++++---\n 3 files changed, 83 insertions(+), 14 deletions(-)",
    "diff": "diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c\nindex ffa093a7a3..5084a5fcd1 100644\n--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c\n+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c\n@@ -468,8 +468,18 @@ qat_sym_dp_enqueue_aead_jobs_gen3(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \n@@ -565,8 +575,18 @@ qat_sym_dp_enqueue_auth_jobs_gen3(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \t\tenqueue_one_auth_job_gen3(ctx, cookie, req, &vec->digest[i],\ndiff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c\nindex f803bc1459..bd7f3785df 100644\n--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c\n+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c\n@@ -297,8 +297,18 @@ qat_sym_dp_enqueue_aead_jobs_gen4(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \ndiff --git a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c\nindex fee6507512..83d9b66f34 100644\n--- a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c\n+++ b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c\n@@ -526,9 +526,18 @@ qat_sym_dp_enqueue_cipher_jobs_gen1(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i],\n-\t\t\t\tcookie, vec->src_sgl[i].vec,\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n \t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \t\tenqueue_one_cipher_job_gen1(ctx, req, &vec->iv[i], ofs,\n@@ -625,8 +634,18 @@ qat_sym_dp_enqueue_auth_jobs_gen1(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \t\tenqueue_one_auth_job_gen1(ctx, req, &vec->digest[i],\n@@ -725,8 +744,18 @@ qat_sym_dp_enqueue_chain_jobs_gen1(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \n@@ -830,8 +859,18 @@ qat_sym_dp_enqueue_aead_jobs_gen1(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \n",
    "prefixes": [
        "v9",
        "9/9"
    ]
}