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GET /api/patches/111250/?format=api
{ "id": 111250, "url": "http://patchwork.dpdk.org/api/patches/111250/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220517173941.189330-9-hkalra@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220517173941.189330-9-hkalra@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220517173941.189330-9-hkalra@marvell.com", "date": "2022-05-17T17:39:38", "name": "[09/12] net/octeontx: implement xstats", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "28086a10b05778bf1586cec5d9c5f02733dd4a04", "submitter": { "id": 1182, "url": "http://patchwork.dpdk.org/api/people/1182/?format=api", "name": "Harman Kalra", "email": "hkalra@marvell.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220517173941.189330-9-hkalra@marvell.com/mbox/", "series": [ { "id": 22975, "url": "http://patchwork.dpdk.org/api/series/22975/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=22975", "date": "2022-05-17T17:39:30", "name": "[01/12] config: add thundert83 config", "version": 1, "mbox": "http://patchwork.dpdk.org/series/22975/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/111250/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/111250/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 37FB7A0503;\n\tTue, 17 May 2022 19:40:35 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2883042B7B;\n\tTue, 17 May 2022 19:40:18 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id A618D42B6A\n for <dev@dpdk.org>; Tue, 17 May 2022 19:40:14 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 24H9gPb8017672\n for <dev@dpdk.org>; Tue, 17 May 2022 10:40:14 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3g2bxsw8yc-4\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 17 May 2022 10:40:13 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 17 May 2022 10:40:12 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 17 May 2022 10:40:12 -0700", "from localhost.localdomain (unknown [10.29.52.211])\n by maili.marvell.com (Postfix) with ESMTP id A1EB23F70F2;\n Tue, 17 May 2022 10:40:11 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : subject\n : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=WRK71imUJqtV8MoDM64xYjMofiiJ2L8Jafm+mAwcy/E=;\n b=MeU9bEXMtES6uDczXozBx0b3LglMW4f0pvI6D/TQMfMN1fnfwDqIElW/dQWGB0JdD3/I\n iQzc4s9g76C5mOQVkdoRukf0TfN7M/BlQe78NgDC41Cz8rMT9hAV7xXm/noG62JOErWo\n KG5jA2035XrsIbHbd7peYKRwDCdmnrryt/ESmsaFmzMacRiIF1PjyhCvrciEKnPWIwny\n gwW4o6pyalC4+Dd07ntdF/V4i8ac20yb5SAWMiy05imMvwMdn8LA+I/Utu3XxVrYT0JN\n fzT3ynoFdj9cnaSzXbyUgwED0NWN0Kj3Toa7EJHyiDfe1q4N24mhdqkFerN4PaVc+TEg +w==", "From": "Harman Kalra <hkalra@marvell.com>", "To": "<dev@dpdk.org>, Harman Kalra <hkalra@marvell.com>", "Subject": "[PATCH 09/12] net/octeontx: implement xstats", "Date": "Tue, 17 May 2022 23:09:38 +0530", "Message-ID": "<20220517173941.189330-9-hkalra@marvell.com>", "X-Mailer": "git-send-email 2.18.0", "In-Reply-To": "<20220517173941.189330-1-hkalra@marvell.com>", "References": "<20220517173941.189330-1-hkalra@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "bkxQeyySPbxdTCayMfOqnGM_ufXOu1vZ", "X-Proofpoint-GUID": "bkxQeyySPbxdTCayMfOqnGM_ufXOu1vZ", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.486,FMLib:17.11.64.514\n definitions=2022-05-17_03,2022-05-17_02,2022-02-23_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Adding support for xstats eth operations.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n drivers/net/octeontx/base/octeontx_bgx.c | 17 +++\n drivers/net/octeontx/base/octeontx_bgx.h | 3 +\n drivers/net/octeontx/octeontx_ethdev.c | 126 +++++++++++++++++++++++\n drivers/net/octeontx/octeontx_stats.h | 41 ++++++++\n 4 files changed, 187 insertions(+)\n create mode 100644 drivers/net/octeontx/octeontx_stats.h", "diff": "diff --git a/drivers/net/octeontx/base/octeontx_bgx.c b/drivers/net/octeontx/base/octeontx_bgx.c\nindex 1c6fa05ebc..81a8cbecaf 100644\n--- a/drivers/net/octeontx/base/octeontx_bgx.c\n+++ b/drivers/net/octeontx/base/octeontx_bgx.c\n@@ -144,6 +144,23 @@ octeontx_bgx_port_status(int port, octeontx_mbox_bgx_port_status_t *stat)\n \treturn res;\n }\n \n+int\n+octeontx_bgx_port_xstats(int port, octeontx_mbox_bgx_port_stats_t *stats)\n+{\n+\tstruct octeontx_mbox_hdr hdr;\n+\tint len = sizeof(octeontx_mbox_bgx_port_stats_t);\n+\tint res;\n+\n+\thdr.coproc = OCTEONTX_BGX_COPROC;\n+\thdr.msg = MBOX_BGX_PORT_GET_STATS;\n+\thdr.vfid = port;\n+\n+\tres = octeontx_mbox_send(&hdr, NULL, 0, stats, len);\n+\tif (res < 0)\n+\t\treturn -EACCES;\n+\treturn res;\n+}\n+\n int\n octeontx_bgx_port_stats(int port, octeontx_mbox_bgx_port_stats_t *stats)\n {\ndiff --git a/drivers/net/octeontx/base/octeontx_bgx.h b/drivers/net/octeontx/base/octeontx_bgx.h\nindex e4cfa3e73a..c5662202ac 100644\n--- a/drivers/net/octeontx/base/octeontx_bgx.h\n+++ b/drivers/net/octeontx/base/octeontx_bgx.h\n@@ -117,6 +117,8 @@ typedef struct octeontx_mbox_bgx_port_stats {\n \tuint64_t rx_oversize_errors;\n \tuint64_t rx_fragmented_errors;\n \tuint64_t rx_jabber_errors;\n+\tuint64_t rx_pause_packets;\n+\tuint64_t tx_pause_packets;\n } octeontx_mbox_bgx_port_stats_t;\n \n struct octeontx_mbox_bgx_port_mac_filter {\n@@ -161,6 +163,7 @@ int octeontx_bgx_port_get_config(int port, octeontx_mbox_bgx_port_conf_t *conf);\n int octeontx_bgx_port_status(int port, octeontx_mbox_bgx_port_status_t *stat);\n int octeontx_bgx_port_stats(int port, octeontx_mbox_bgx_port_stats_t *stats);\n int octeontx_bgx_port_stats_clr(int port);\n+int octeontx_bgx_port_xstats(int port, octeontx_mbox_bgx_port_stats_t *stats);\n int octeontx_bgx_port_link_status(int port);\n int octeontx_bgx_port_promisc_set(int port, int en);\n int octeontx_bgx_port_mac_set(int port, uint8_t *mac_addr);\ndiff --git a/drivers/net/octeontx/octeontx_ethdev.c b/drivers/net/octeontx/octeontx_ethdev.c\nindex 9351fcb5c7..c15014bdde 100644\n--- a/drivers/net/octeontx/octeontx_ethdev.c\n+++ b/drivers/net/octeontx/octeontx_ethdev.c\n@@ -25,6 +25,7 @@\n #include \"octeontx_ethdev.h\"\n #include \"octeontx_rxtx.h\"\n #include \"octeontx_logs.h\"\n+#include \"octeontx_stats.h\"\n \n /* Useful in stopping/closing event device if no of\n * eth ports are using it.\n@@ -846,6 +847,127 @@ octeontx_dev_link_update(struct rte_eth_dev *dev,\n \treturn rte_eth_linkstatus_set(dev, &link);\n }\n \n+static inline int octeontx_dev_total_xstat(void)\n+{\n+\treturn NUM_BGX_XSTAT;\n+}\n+\n+static int\n+octeontx_port_xstats(struct octeontx_nic *nic, struct rte_eth_xstat *xstats,\n+\t\t unsigned int n)\n+{\n+\tocteontx_mbox_bgx_port_stats_t bgx_stats;\n+\tint stat_cnt, res, si, i;\n+\n+\tres = octeontx_bgx_port_xstats(nic->port_id, &bgx_stats);\n+\tif (res < 0) {\n+\t\tocteontx_log_err(\"failed to get port stats %d\", nic->port_id);\n+\t\treturn res;\n+\t}\n+\n+\tsi = 0;\n+\t/* Fill BGX stats */\n+\tstat_cnt = (n > NUM_BGX_XSTAT) ? NUM_BGX_XSTAT : n;\n+\tn = n - stat_cnt;\n+\tfor (i = 0; i < stat_cnt; i++) {\n+\t\txstats[si].id = si;\n+\t\txstats[si].value = *(uint64_t *)(((char *)&bgx_stats) +\n+\t\t\t\tocteontx_bgx_xstats[i].soffset);\n+\t\tsi++;\n+\t}\n+\t/*TODO: Similarly fill rest of HW stats */\n+\n+\treturn si;\n+}\n+\n+static int\n+octeontx_dev_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,\n+\t\t\t uint64_t *stat_val, unsigned int n)\n+{\n+\tunsigned int i, xstat_cnt = octeontx_dev_total_xstat();\n+\tstruct octeontx_nic *nic = octeontx_pmd_priv(dev);\n+\tstruct rte_eth_xstat xstats[xstat_cnt];\n+\n+\tocteontx_port_xstats(nic, xstats, xstat_cnt);\n+\tfor (i = 0; i < n; i++) {\n+\t\tif (ids[i] >= xstat_cnt) {\n+\t\t\tPMD_INIT_LOG(ERR, \"out of range id value\");\n+\t\t\treturn -1;\n+\t\t}\n+\t\tstat_val[i] = xstats[ids[i]].value;\n+\t}\n+\treturn n;\n+}\n+\n+static int\n+octeontx_dev_xstats_get_names(struct rte_eth_dev *dev __rte_unused,\n+\t\t\t struct rte_eth_xstat_name *xstats_names,\n+\t\t\t unsigned int size)\n+{\n+\tint stat_cnt, si, i;\n+\n+\tif (xstats_names) {\n+\t\tsi = 0;\n+\t\t/* Fill BGX stats */\n+\t\tstat_cnt = (size > NUM_BGX_XSTAT) ? NUM_BGX_XSTAT : size;\n+\t\tsize = size - stat_cnt;\n+\t\tfor (i = 0; i < stat_cnt; i++) {\n+\t\t\tstrlcpy(xstats_names[si].name,\n+\t\t\t\tocteontx_bgx_xstats[i].sname,\n+\t\t\t\tsizeof(xstats_names[si].name));\n+\t\t\tsi++;\n+\t\t}\n+\t\t/*TODO: Similarly fill rest of HW stats */\n+\t\treturn si;\n+\t} else {\n+\t\treturn octeontx_dev_total_xstat();\n+\t}\n+}\n+\n+static void build_xstat_names(struct rte_eth_xstat_name *xstat_names)\n+{\n+\tunsigned int i;\n+\n+\tfor (i = 0; i < NUM_BGX_XSTAT; i++) {\n+\t\tstrlcpy(xstat_names[i].name, octeontx_bgx_xstats[i].sname,\n+\t\t\tRTE_ETH_XSTATS_NAME_SIZE);\n+\t}\n+}\n+\n+static int\n+octeontx_dev_xstats_get_names_by_id(struct rte_eth_dev *dev __rte_unused,\n+\t\t\t\t const uint64_t *ids,\n+\t\t\t\t struct rte_eth_xstat_name *stat_names,\n+\t\t\t\t unsigned int n)\n+{\n+\tunsigned int i, xstat_cnt = octeontx_dev_total_xstat();\n+\tstruct rte_eth_xstat_name xstat_names[xstat_cnt];\n+\n+\tbuild_xstat_names(xstat_names);\n+\tfor (i = 0; i < n; i++) {\n+\t\tif (ids[i] >= xstat_cnt) {\n+\t\t\tPMD_INIT_LOG(ERR, \"out of range id value\");\n+\t\t\treturn -1;\n+\t\t}\n+\t\tstrlcpy(stat_names[i].name, xstat_names[ids[i]].name,\n+\t\t\tsizeof(stat_names[i].name));\n+\t}\n+\t/*TODO: Similarly fill rest of HW stats */\n+\n+\treturn n;\n+}\n+\n+static int\n+octeontx_dev_xstats_get(struct rte_eth_dev *dev,\n+\t\t\tstruct rte_eth_xstat *xstats,\n+\t\t\tunsigned int n)\n+{\n+\tstruct octeontx_nic *nic = octeontx_pmd_priv(dev);\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\treturn octeontx_port_xstats(nic, xstats, n);\n+}\n+\n static int\n octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)\n {\n@@ -1354,6 +1476,10 @@ static const struct eth_dev_ops octeontx_dev_ops = {\n \t.pool_ops_supported = octeontx_pool_ops,\n \t.flow_ctrl_get = octeontx_dev_flow_ctrl_get,\n \t.flow_ctrl_set = octeontx_dev_flow_ctrl_set,\n+\t.xstats_get\t\t = octeontx_dev_xstats_get,\n+\t.xstats_get_by_id\t = octeontx_dev_xstats_get_by_id,\n+\t.xstats_get_names\t = octeontx_dev_xstats_get_names,\n+\t.xstats_get_names_by_id\t = octeontx_dev_xstats_get_names_by_id,\n };\n \n /* Create Ethdev interface per BGX LMAC ports */\ndiff --git a/drivers/net/octeontx/octeontx_stats.h b/drivers/net/octeontx/octeontx_stats.h\nnew file mode 100644\nindex 0000000000..95e03a993d\n--- /dev/null\n+++ b/drivers/net/octeontx/octeontx_stats.h\n@@ -0,0 +1,41 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2017 Cavium, Inc\n+ */\n+\n+#ifndef __OCTEONTX_STATS_H__\n+#define __OCTEONTX_STATS_H__\n+\n+#define BGX_XSTAT(stat) \\\n+\t{#stat, offsetof(octeontx_mbox_bgx_port_stats_t, stat)}\n+struct octeontx_xstats {\n+\tchar sname[RTE_ETH_XSTATS_NAME_SIZE];\n+\tuint32_t soffset;\n+};\n+\n+struct octeontx_xstats octeontx_bgx_xstats[] = {\n+\tBGX_XSTAT(rx_packets),\n+\tBGX_XSTAT(tx_packets),\n+\tBGX_XSTAT(rx_broadcast_packets),\n+\tBGX_XSTAT(multicast),\n+\tBGX_XSTAT(tx_multicast_packets),\n+\tBGX_XSTAT(tx_broadcast_packets),\n+\tBGX_XSTAT(rx_undersized_errors),\n+\tBGX_XSTAT(rx_oversize_errors),\n+\tBGX_XSTAT(rx_jabber_errors),\n+\tBGX_XSTAT(rx_crc_errors),\n+\tBGX_XSTAT(collisions),\n+\tBGX_XSTAT(tx_1_to_64_packets),\n+\tBGX_XSTAT(tx_65_to_127_packets),\n+\tBGX_XSTAT(tx_128_to_255_packets),\n+\tBGX_XSTAT(tx_256_to_511_packets),\n+\tBGX_XSTAT(tx_512_to_1023_packets),\n+\tBGX_XSTAT(tx_1024_to_1522_packets),\n+\tBGX_XSTAT(tx_1523_to_max_packets),\n+\tBGX_XSTAT(rx_fragmented_errors),\n+\tBGX_XSTAT(rx_pause_packets),\n+\tBGX_XSTAT(tx_pause_packets),\n+};\n+\n+#define NUM_BGX_XSTAT \\\n+\t(sizeof(octeontx_bgx_xstats) / sizeof(struct octeontx_xstats))\n+#endif /* __OCTEONTX_STATS_H__ */\n", "prefixes": [ "09/12" ] }