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GET /api/patches/112246/?format=api
{ "id": 112246, "url": "http://patchwork.dpdk.org/api/patches/112246/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220602015304.710197-8-jin.liu@corigine.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220602015304.710197-8-jin.liu@corigine.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220602015304.710197-8-jin.liu@corigine.com", "date": "2022-06-02T01:52:57", "name": "[07/14] net/nfp: support NFDK firmware", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "292b2be4f7b267fed75454cf5081ce7fd836e874", "submitter": { "id": 2670, "url": "http://patchwork.dpdk.org/api/people/2670/?format=api", "name": "Jin Liu", "email": "jin.liu@corigine.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220602015304.710197-8-jin.liu@corigine.com/mbox/", "series": [ { "id": 23295, "url": "http://patchwork.dpdk.org/api/series/23295/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=23295", "date": "2022-06-02T01:52:50", "name": "Add support of NFP3800 chip and firmware with NFDk", "version": 1, "mbox": "http://patchwork.dpdk.org/series/23295/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/112246/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/112246/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", 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"Authentication-Results": "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=corigine.com;", "From": "Jin Liu <jin.liu@corigine.com>", "To": "dev@dpdk.org", "Cc": "niklas.soderlund@corigine.com, Jin Liu <jin.liu@corigine.com>,\n Diana Wang <na.wang@corigine.com>, Peng Zhang <peng.zhang@corigine.com>,\n Chaoyong He <chaoyong.he@corigine.com>", "Subject": "[PATCH 07/14] net/nfp: support NFDK firmware", "Date": "Thu, 2 Jun 2022 03:52:57 +0200", "Message-Id": "<20220602015304.710197-8-jin.liu@corigine.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20220602015304.710197-1-jin.liu@corigine.com>", "References": "<20220602015304.710197-1-jin.liu@corigine.com>", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-ClientProxiedBy": "LO4P123CA0457.GBRP123.PROD.OUTLOOK.COM\n (2603:10a6:600:1aa::12) To DM6PR13MB3004.namprd13.prod.outlook.com\n (2603:10b6:5:191::21)", "MIME-Version": "1.0", "X-MS-PublicTrafficType": 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"=?utf-8?q?9sjUCzSfTkZ1mOpYMp3UBWBXPSk1?=\n\t=?utf-8?q?cIco+yW5Wly7pbzDq1P1OQiSgzFkRMR+h7qQGsq3HoT8rml+4vD6h8QBgtH0hTqPf?=\n\t=?utf-8?q?TnB2vV7oJgPj0aYrGYsp4D2jY4mi6nJ7OdDsqBLJxnPTN2c34tdIrx+hSIpq+T+sQ?=\n\t=?utf-8?q?zBH6CKsPZBxswsLeKqFuHeJ5qpSukM2EQTAqMhRbFQiG9qdhjlJfQ+/eZkOVl8yBQ?=\n\t=?utf-8?q?6DcRfRGXUTmQLINGN0dy3KzfrarE3vXOFKdSxmbqOpvU08x6+dWcn5VsKVHLrn1JK?=\n\t=?utf-8?q?BeML8tBInm9JSwnDdzWA3gRcADL90Z3j2R6+t79KG9UvzY+LmTiloEFxSDY9ltgk7?=\n\t=?utf-8?q?vhq9541CmyOIMPgdE2LCQaqHMwOEfGDSlEi3RmP/9u7OvVD83/HoV6rd3ROGxB9KQ?=\n\t=?utf-8?q?zBACZ2eFxDvGqwt+R8VJwWziiI9Bc27zSsCsU7xXuV35XO4YFa4FvhxrJDydQMjxI?=\n\t=?utf-8?q?4IjA4m36zZkuaTd8ZVxdAIUhtH4gsab3P5yRaRLCX0PPrtbAJp4dTSCu9pyeHSQ+v?=\n\t=?utf-8?q?VIMKk8k4v/cEY3QWxzxbiZaITItSamI6uL1CbW0xBQgFAI/Lm6PqrB7YA1AsNc0+Y?=\n\t=?utf-8?q?nqxvkFhdYKOlRrzVetidd4+NmxAmhoyC7PY7sY5J/MWTa8xSbqgNzoS0KGs7UbDgr?=\n\t=?utf-8?q?24orpIii05GbARHIldwH2gtzDumyxQ07CtHKp0Yaei2Kf+AsRTe+0E8+G7ZoSkO4Y?=\n\t=?utf-8?q?Acs1m4+E8TqTICPEX1eFbq+zTzmbIWTDZ7uYreVnG0wJgeCI/jbwtPfhLYsjz3KVP?=\n\t=?utf-8?q?UhEj4eZg6J4VncM9HRqGPtFan8Rw1Obu6JmiAXoi9OiyVgU7EjOGV3iZrLHOU1CG3?=\n\t=?utf-8?q?Othpq5bTVhg+ZFicqbbt0XuQ0WKm+kqbM21jSJp9E3nyHgXqxNYjw0VI8BpxyJl3O?=\n\t=?utf-8?q?ukH0fsWMhI9Dz5PN0hyVpgFi8y2sE7KoloSYb9a7yk9uTdwDDj6q6VWw2k8jivX+T?=\n\t=?utf-8?q?U/rwexVTfD7kHKNFgJp6CzNIoJohCWWTtVfdro68SxQix7emrd4nYnDXv+gKq5VAd?=\n\t=?utf-8?q?zRh/bOpAItOJSe1gWWXi211EOvBXM43VjFbjYapnznm/s5tW1kfS6py8k565eDLPe?=\n\t=?utf-8?q?xUoq0PXn3o0mS50BpFY5xlOambs5/TTioPaU2U1dwaWr0lgr76QTht/tn9VB/OBnN?=\n\t=?utf-8?q?HL/ySBeafiStpJ0+izxkZUaH55f0uInAIAXsrhnGMcMu6jqoSjr8+mGgW7d8sxWre?=\n\t=?utf-8?q?ijwVz4efQIz5npJfwUju3mwF+/Ema2/kBK8wx4saWuVc3G/S9VPZjxMaqAKOMI/vi?=\n\t=?utf-8?q?NW9yhJIq1FFxBBP+EK8f+raec1S8OWyCUu6v7evil7paYXxxHQ6OMegQBdFSE6sso?=\n\t=?utf-8?q?2ExSmqBFERta3JBBWvHal5GpL2FvL6/r/JdZ9yBvowAj1k8k1T3tkZT+SYjUgeUGH?=\n\t=?utf-8?q?jKueVQ2/l4WvNKjhigvy/FzRxH+5b5kYF6wptjVx/ta9IuwfrR+QP8mYv/bhBcMiX?=\n\t=?utf-8?q?gB57WDgSNs1kF1wcE24rRO9exORW873Ky0IqYvreR/uTxYIvKclMJvKKHcQd4XQ1J?=\n\t=?utf-8?q?0JP/je0ql78AWP3DNORRcEMLDo3zVPcY7kMOU4uhi+at0kU5zXtkJ1WunuJ1J/+d9?=\n\t=?utf-8?q?dM3PFni0suPUhpzQTlYcU/VZYb1RGQEBm4ID8kCGitp3yKniwd8i8MNVvNFdJprZB?=\n\t=?utf-8?q?b3fbSRUJzr0NdMTAoU+/adNcSpzzbP8A=3D=3D?=", "X-OriginatorOrg": "corigine.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 9d659ad1-76a1-411a-42c4-08da443ae1b6", "X-MS-Exchange-CrossTenant-AuthSource": "DM6PR13MB3004.namprd13.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "02 Jun 2022 01:54:51.4456 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "fe128f2c-073b-4c20-818e-7246a585940c", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n g7EJux8EUpteY8iOZ5BWQd3R3JpuK+facDL5c2MeBd9fMgjQFak9OviKTuqDXQtqoTsbwfSrjQH83YRlVxe8Og==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM4PR13MB5858", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Modify nfp driver logic, add firmware version (NFD3 or NFDK) judgment, will\naccording to the firmware version, mount different driver functions.\n\nSigned-off-by: Jin Liu <jin.liu@corigine.com>\nSigned-off-by: Diana Wang <na.wang@corigine.com>\nSigned-off-by: Peng Zhang <peng.zhang@corigine.com>\nSigned-off-by: Chaoyong He <chaoyong.he@corigine.com>\nSigned-off-by: Niklas Söderlund <niklas.soderlund@corigine.com>\n---\n drivers/net/nfp/nfp_ctrl.h | 2 ++\n drivers/net/nfp/nfp_ethdev.c | 51 ++++++++++++++++++++++++++-------\n drivers/net/nfp/nfp_ethdev_vf.c | 37 +++++++++++++++++-------\n 3 files changed, 69 insertions(+), 21 deletions(-)", "diff": "diff --git a/drivers/net/nfp/nfp_ctrl.h b/drivers/net/nfp/nfp_ctrl.h\nindex 4dd62ef194..e73715e2aa 100644\n--- a/drivers/net/nfp/nfp_ctrl.h\n+++ b/drivers/net/nfp/nfp_ctrl.h\n@@ -135,6 +135,8 @@\n * - define more STS bits\n */\n #define NFP_NET_CFG_VERSION 0x0030\n+#define NFP_NET_CFG_VERSION_DP_NFD3 0\n+#define NFP_NET_CFG_VERSION_DP_NFDK 1\n #define NFP_NET_CFG_VERSION_RESERVED_MASK\t(0xff << 24)\n #define NFP_NET_CFG_VERSION_CLASS_MASK (0xff << 16)\n #define NFP_NET_CFG_VERSION_CLASS(x) (((x) & 0xff) << 16)\ndiff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c\nindex 4d2cd9b0b3..c09a035323 100644\n--- a/drivers/net/nfp/nfp_ethdev.c\n+++ b/drivers/net/nfp/nfp_ethdev.c\n@@ -358,6 +358,32 @@ static const struct eth_dev_ops nfp_net_nfd3_eth_dev_ops = {\n \t.rx_queue_intr_disable = nfp_rx_queue_intr_disable,\n };\n \n+static inline int\n+nfp_net_ethdev_ops_mount(struct nfp_net_hw *hw, struct rte_eth_dev *eth_dev)\n+{\n+\tswitch (NFD_CFG_CLASS_VER_of(hw->ver)) {\n+\tcase NFP_NET_CFG_VERSION_DP_NFD3:\n+\t\tbreak;\n+\tcase NFP_NET_CFG_VERSION_DP_NFDK:\n+\t\tif (NFD_CFG_MAJOR_VERSION_of(hw->ver) < 5) {\n+\t\t\tPMD_DRV_LOG(ERR, \"NFDK must use ABI 5 or newer, found: %d\",\n+\t\t\t\tNFD_CFG_MAJOR_VERSION_of(hw->ver));\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(ERR, \"The version of firmware is not correct.\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\teth_dev->dev_ops = &nfp_net_nfd3_eth_dev_ops;\n+\teth_dev->rx_queue_count = nfp_net_rx_queue_count;\n+\teth_dev->rx_pkt_burst = &nfp_net_recv_pkts;\n+\teth_dev->tx_pkt_burst = &nfp_net_nfd3_xmit_pkts;\n+\n+\treturn 0;\n+}\n+\n static int\n nfp_net_init(struct rte_eth_dev *eth_dev)\n {\n@@ -384,7 +410,7 @@ nfp_net_init(struct rte_eth_dev *eth_dev)\n \t\tRTE_LOG(ERR, PMD, \"device %s can not be used: restricted dma \"\n \t\t\t\"mask to 40 bits!\\n\", pci_dev->device.name);\n \t\treturn -ENODEV;\n-\t};\n+\t}\n \n \tport = ((struct nfp_net_hw *)eth_dev->data->dev_private)->idx;\n \tif (port < 0 || port > 7) {\n@@ -401,11 +427,6 @@ nfp_net_init(struct rte_eth_dev *eth_dev)\n \tPMD_INIT_LOG(DEBUG, \"Working with physical port number: %d, \"\n \t\t\t\"NFP internal port number: %d\", port, hw->nfp_idx);\n \n-\teth_dev->dev_ops = &nfp_net_nfd3_eth_dev_ops;\n-\teth_dev->rx_queue_count = nfp_net_rx_queue_count;\n-\teth_dev->rx_pkt_burst = &nfp_net_recv_pkts;\n-\teth_dev->tx_pkt_burst = &nfp_net_nfd3_xmit_pkts;\n-\n \t/* For secondary processes, the primary has done all the work */\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n@@ -440,6 +461,11 @@ nfp_net_init(struct rte_eth_dev *eth_dev)\n \n \tPMD_INIT_LOG(DEBUG, \"ctrl bar: %p\", hw->ctrl_bar);\n \n+\thw->ver = nn_cfg_readl(hw, NFP_NET_CFG_VERSION);\n+\n+\tif (nfp_net_ethdev_ops_mount(hw, eth_dev))\n+\t\treturn -EINVAL;\n+\n \thw->max_rx_queues = nn_cfg_readl(hw, NFP_NET_CFG_MAX_RXRINGS);\n \thw->max_tx_queues = nn_cfg_readl(hw, NFP_NET_CFG_MAX_TXRINGS);\n \n@@ -472,7 +498,6 @@ nfp_net_init(struct rte_eth_dev *eth_dev)\n \tnfp_net_cfg_queue_setup(hw);\n \n \t/* Get some of the read-only fields from the config BAR */\n-\thw->ver = nn_cfg_readl(hw, NFP_NET_CFG_VERSION);\n \thw->cap = nn_cfg_readl(hw, NFP_NET_CFG_CAP);\n \thw->max_mtu = nn_cfg_readl(hw, NFP_NET_CFG_MAX_MTU);\n \thw->mtu = RTE_ETHER_MTU;\n@@ -938,6 +963,7 @@ nfp_pf_secondary_init(struct rte_pci_device *pci_dev)\n \tint err;\n \tint total_ports;\n \tstruct nfp_cpp *cpp;\n+\tstruct nfp_net_hw *hw;\n \tstruct nfp_rtsym_table *sym_tbl;\n \n \tif (pci_dev == NULL)\n@@ -987,11 +1013,14 @@ nfp_pf_secondary_init(struct rte_pci_device *pci_dev)\n \t\t\t\t\"ethdev doesn't exist\");\n \t\t\treturn -ENODEV;\n \t\t}\n+\n+\t\thw = NFP_NET_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);\n+\n+\t\tif (nfp_net_ethdev_ops_mount(hw, eth_dev))\n+\t\t\treturn -EINVAL;\n+\n \t\teth_dev->process_private = cpp;\n-\t\teth_dev->dev_ops = &nfp_net_nfd3_eth_dev_ops;\n-\t\teth_dev->rx_queue_count = nfp_net_rx_queue_count;\n-\t\teth_dev->rx_pkt_burst = &nfp_net_recv_pkts;\n-\t\teth_dev->tx_pkt_burst = &nfp_net_nfd3_xmit_pkts;\n+\n \t\trte_eth_dev_probing_finish(eth_dev);\n \t}\n \ndiff --git a/drivers/net/nfp/nfp_ethdev_vf.c b/drivers/net/nfp/nfp_ethdev_vf.c\nindex f5a0406e7d..e83c9dbcaf 100644\n--- a/drivers/net/nfp/nfp_ethdev_vf.c\n+++ b/drivers/net/nfp/nfp_ethdev_vf.c\n@@ -287,7 +287,7 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev)\n \t\tRTE_LOG(ERR, PMD, \"device %s can not be used: restricted dma \"\n \t\t\t\"mask to 40 bits!\\n\", pci_dev->device.name);\n \t\treturn -ENODEV;\n-\t};\n+\t}\n \n \thw = NFP_NET_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);\n \n@@ -296,6 +296,32 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev)\n \teth_dev->rx_pkt_burst = &nfp_net_recv_pkts;\n \teth_dev->tx_pkt_burst = &nfp_net_nfd3_xmit_pkts;\n \n+\thw->ctrl_bar = (uint8_t *)pci_dev->mem_resource[0].addr;\n+\tif (hw->ctrl_bar == NULL) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t\"hw->ctrl_bar is NULL. BAR0 not configured\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tPMD_INIT_LOG(DEBUG, \"ctrl bar: %p\", hw->ctrl_bar);\n+\n+\thw->ver = nn_cfg_readl(hw, NFP_NET_CFG_VERSION);\n+\n+\tswitch (NFD_CFG_CLASS_VER_of(hw->ver)) {\n+\tcase NFP_NET_CFG_VERSION_DP_NFD3:\n+\t\tbreak;\n+\tcase NFP_NET_CFG_VERSION_DP_NFDK:\n+\t\tif (NFD_CFG_MAJOR_VERSION_of(hw->ver) < 5) {\n+\t\t\tPMD_DRV_LOG(ERR, \"NFDK must use ABI 5 or newer,found: %d\",\n+\t\t\t\tNFD_CFG_MAJOR_VERSION_of(hw->ver));\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(ERR, \"The version of firmware is not correct.\");\n+\t\treturn -EINVAL;\n+\t}\n+\n \t/* For secondary processes, the primary has done all the work */\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n@@ -312,15 +338,6 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev)\n \t\t pci_dev->addr.domain, pci_dev->addr.bus,\n \t\t pci_dev->addr.devid, pci_dev->addr.function);\n \n-\thw->ctrl_bar = (uint8_t *)pci_dev->mem_resource[0].addr;\n-\tif (hw->ctrl_bar == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\"hw->ctrl_bar is NULL. BAR0 not configured\");\n-\t\treturn -ENODEV;\n-\t}\n-\n-\tPMD_INIT_LOG(DEBUG, \"ctrl bar: %p\", hw->ctrl_bar);\n-\n \thw->max_rx_queues = nn_cfg_readl(hw, NFP_NET_CFG_MAX_RXRINGS);\n \thw->max_tx_queues = nn_cfg_readl(hw, NFP_NET_CFG_MAX_TXRINGS);\n \n", "prefixes": [ "07/14" ] }