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GET /api/patches/112321/?format=api
{ "id": 112321, "url": "http://patchwork.dpdk.org/api/patches/112321/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20220604162651.3503338-11-tduszynski@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220604162651.3503338-11-tduszynski@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220604162651.3503338-11-tduszynski@marvell.com", "date": "2022-06-04T16:26:51", "name": "[10/10] common/cnxk: support switching CPRI/ETH back and forth", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "15dd7c3993aa5b7eb18ec45693d67f16401c0695", "submitter": { "id": 2215, "url": "http://patchwork.dpdk.org/api/people/2215/?format=api", "name": "Tomasz Duszynski", "email": "tduszynski@marvell.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20220604162651.3503338-11-tduszynski@marvell.com/mbox/", "series": [ { "id": 23325, "url": "http://patchwork.dpdk.org/api/series/23325/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=23325", "date": "2022-06-04T16:26:41", "name": "Sync BPHY changes", "version": 1, "mbox": "http://patchwork.dpdk.org/series/23325/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/112321/comments/", "check": "fail", "checks": "http://patchwork.dpdk.org/api/patches/112321/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 799A0A034C;\n\tSat, 4 Jun 2022 18:28:00 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 05BCD427F6;\n\tSat, 4 Jun 2022 18:27:46 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 148F6427F6\n for <dev@dpdk.org>; Sat, 4 Jun 2022 18:27:43 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 254G5RAU012809;\n Sat, 4 Jun 2022 09:27:43 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3gg6wq0dhh-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Sat, 04 Jun 2022 09:27:43 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Sat, 4 Jun 2022 09:27:41 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Sat, 4 Jun 2022 09:27:41 -0700", "from localhost.localdomain (unknown [10.28.34.39])\n by maili.marvell.com (Postfix) with ESMTP id C9DB13F7097;\n Sat, 4 Jun 2022 09:27:38 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=Fxa0moYnHln5wo0mTnbFnCe0kvLrfXf49zYwpYDL+AY=;\n b=eidO/poSVDr1I6e91FGWJ8qvV3newSzy4XHB+nRL4c7Kp8xXp7BjPTcpzBIMo2wWtzKr\n Qt6qWWb3/NHhAgfZXNmQDjuzhrQYB7Z8x9TsYnGVKIzYzoeZV7V0gQ1VZUVO4u/Ai3kT\n 10rE9AenSTftim0SbiDso4LaJ7H+8WqfdMTDD+gqnLWMhGdrNE4LrE4NKweUdCggPps4\n Ji8i+9hd8x6uxyFmKh9x8NW/pggR27wiRHcgkeFsCVrQP1gSoi8dmJQMuMYUHihZhR6B\n 3pBeYd62Gs5+23kJqVVKWMEcPwHVP6i+/Gdv1edW/zbSWQDN9k8+Me4pki3lCYhipbec 0w==", "From": "Tomasz Duszynski <tduszynski@marvell.com>", "To": "<dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Jakub Palider <jpalider@marvell.com>, \"Tomasz\n Duszynski\" <tduszynski@marvell.com>", "CC": "<thomas@monjalon.net>, <jerinj@marvell.com>", "Subject": "[PATCH 10/10] common/cnxk: support switching CPRI/ETH back and forth", "Date": "Sat, 4 Jun 2022 18:26:51 +0200", "Message-ID": "<20220604162651.3503338-11-tduszynski@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220604162651.3503338-1-tduszynski@marvell.com>", "References": "<20220604162651.3503338-1-tduszynski@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "rHifoJjZBoOWYgTxIjPT2cAqihU_RoA7", "X-Proofpoint-GUID": "rHifoJjZBoOWYgTxIjPT2cAqihU_RoA7", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514\n definitions=2022-06-04_05,2022-06-03_01,2022-02-23_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add support for toggling modes between ETH and CPRI on\nnewer MACs (RPM).\n\nSigned-off-by: Tomasz Duszynski <tduszynski@marvell.com>\nReviewed-by: Jakub Palider <jpalider@marvell.com>\nReviewed-by: Jerin Jacob Kollanukkaran <jerinj@marvell.com>\n---\n drivers/common/cnxk/roc_bphy_cgx.h | 17 ++++++++++++++++-\n drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c | 14 ++++++++++++--\n drivers/raw/cnxk_bphy/rte_pmd_bphy.h | 27 +++++++++++++++++++++++++--\n 3 files changed, 53 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_bphy_cgx.h b/drivers/common/cnxk/roc_bphy_cgx.h\nindex 4ce1316513..2b9a23f5b1 100644\n--- a/drivers/common/cnxk/roc_bphy_cgx.h\n+++ b/drivers/common/cnxk/roc_bphy_cgx.h\n@@ -86,8 +86,20 @@ enum roc_bphy_cgx_eth_link_mode {\n \t__ROC_BPHY_CGX_ETH_LINK_MODE_MAX\n };\n \n+/* Supported CPRI modes */\n+enum roc_bphy_cgx_eth_mode_cpri {\n+\tROC_BPHY_CGX_ETH_MODE_CPRI_2_4G_BIT,\n+\tROC_BPHY_CGX_ETH_MODE_CPRI_3_1G_BIT,\n+\tROC_BPHY_CGX_ETH_MODE_CPRI_4_9G_BIT,\n+\tROC_BPHY_CGX_ETH_MODE_CPRI_6_1G_BIT,\n+\tROC_BPHY_CGX_ETH_MODE_CPRI_9_8G_BIT,\n+\tROC_BPHY_CGX_ETH_MODE_CPRI_10_1_BIT,\n+\tROC_BPHY_CGX_ETH_MODE_CPRI_24_3G_BIT,\n+};\n+\n enum roc_bphy_cgx_mode_group {\n \tROC_BPHY_CGX_MODE_GROUP_ETH,\n+\tROC_BPHY_CGX_MODE_GROUP_CPRI = 2,\n };\n \n struct roc_bphy_cgx_link_mode {\n@@ -97,7 +109,10 @@ struct roc_bphy_cgx_link_mode {\n \tunsigned int portm_idx;\n \tenum roc_bphy_cgx_mode_group mode_group_idx;\n \tenum roc_bphy_cgx_eth_link_speed speed;\n-\tenum roc_bphy_cgx_eth_link_mode mode;\n+\tunion {\n+\t\tenum roc_bphy_cgx_eth_link_mode mode;\n+\t\tenum roc_bphy_cgx_eth_mode_cpri mode_cpri;\n+\t};\n };\n \n struct roc_bphy_cgx_link_info {\ndiff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c\nindex f839a70f04..26def43564 100644\n--- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c\n+++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c\n@@ -118,8 +118,18 @@ cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx, unsigned int queue,\n \t\t\t(enum roc_bphy_cgx_mode_group)link_mode->mode_group_idx;\n \t\trlink_mode.speed =\n \t\t\t(enum roc_bphy_cgx_eth_link_speed)link_mode->speed;\n-\t\trlink_mode.mode =\n-\t\t\t(enum roc_bphy_cgx_eth_link_mode)link_mode->mode;\n+\t\tswitch (link_mode->mode_group_idx) {\n+\t\tcase CNXK_BPHY_CGX_MODE_GROUP_ETH:\n+\t\t\trlink_mode.mode =\n+\t\t\t\t(enum roc_bphy_cgx_eth_link_mode)\n+\t\t\t\tlink_mode->mode;\n+\t\t\tbreak;\n+\t\tcase CNXK_BPHY_CGX_MODE_GROUP_CPRI:\n+\t\t\trlink_mode.mode_cpri =\n+\t\t\t\t(enum roc_bphy_cgx_eth_mode_cpri)\n+\t\t\t\tlink_mode->mode_cpri;\n+\t\t\tbreak;\n+\t\t}\n \t\tret = roc_bphy_cgx_set_link_mode(cgx->rcgx, lmac, &rlink_mode);\n \t\tbreak;\n \tcase CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE:\ndiff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h\nindex 7f326e3643..f9949fa313 100644\n--- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h\n+++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h\n@@ -168,9 +168,28 @@ enum cnxk_bphy_cgx_eth_link_mode {\n \t__CNXK_BPHY_CGX_ETH_LINK_MODE_MAX\n };\n \n+enum cnxk_bphy_cgx_eth_mode_cpri {\n+\t/** 2.4G Lane Rate */\n+\tCNXK_BPHY_CGX_ETH_MODE_CPRI_2_4G_BIT,\n+\t/** 3.1G Lane Rate */\n+\tCNXK_BPHY_CGX_ETH_MODE_CPRI_3_1G_BIT,\n+\t/** 4.9G Lane Rate */\n+\tCNXK_BPHY_CGX_ETH_MODE_CPRI_4_9G_BIT,\n+\t/** 6.1G Lane Rate */\n+\tCNXK_BPHY_CGX_ETH_MODE_CPRI_6_1G_BIT,\n+\t/** 9.8G Lane Rate */\n+\tCNXK_BPHY_CGX_ETH_MODE_CPRI_9_8G_BIT,\n+\t/** 10.1G Lane Rate */\n+\tCNXK_BPHY_CGX_ETH_MODE_CPRI_10_1_BIT,\n+\t/** 24.3G Lane Rate */\n+\tCNXK_BPHY_CGX_ETH_MODE_CPRI_24_3G_BIT,\n+};\n+\n enum cnxk_bphy_cgx_mode_group {\n \t/** ETH group */\n \tCNXK_BPHY_CGX_MODE_GROUP_ETH,\n+\t/** CPRI group */\n+\tCNXK_BPHY_CGX_MODE_GROUP_CPRI = 2,\n };\n \n struct cnxk_bphy_cgx_msg_link_mode {\n@@ -186,8 +205,12 @@ struct cnxk_bphy_cgx_msg_link_mode {\n \tenum cnxk_bphy_cgx_mode_group mode_group_idx;\n \t/** Link speed */\n \tenum cnxk_bphy_cgx_eth_link_speed speed;\n-\t/** Link mode */\n-\tenum cnxk_bphy_cgx_eth_link_mode mode;\n+\tunion {\n+\t\t/** Link mode */\n+\t\tenum cnxk_bphy_cgx_eth_link_mode mode;\n+\t\t/** CPRI mode */\n+\t\tenum cnxk_bphy_cgx_eth_mode_cpri mode_cpri;\n+\t};\n };\n \n struct cnxk_bphy_cgx_msg_link_info {\n", "prefixes": [ "10/10" ] }