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GET /api/patches/119020/?format=api
{ "id": 119020, "url": "http://patchwork.dpdk.org/api/patches/119020/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20221024131227.1062446-16-junfeng.guo@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221024131227.1062446-16-junfeng.guo@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221024131227.1062446-16-junfeng.guo@intel.com", "date": "2022-10-24T13:12:24", "name": "[v11,15/18] net/idpf: add support for Rx offloading", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "2ec8fafbb9e521d10085c5799ff8afd85d4586b7", "submitter": { "id": 1785, "url": "http://patchwork.dpdk.org/api/people/1785/?format=api", "name": "Junfeng Guo", "email": "junfeng.guo@intel.com" }, "delegate": { "id": 3961, "url": "http://patchwork.dpdk.org/api/users/3961/?format=api", "username": "arybchenko", "first_name": "Andrew", "last_name": "Rybchenko", "email": "andrew.rybchenko@oktetlabs.ru" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20221024131227.1062446-16-junfeng.guo@intel.com/mbox/", "series": [ { "id": 25386, "url": "http://patchwork.dpdk.org/api/series/25386/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=25386", "date": "2022-10-24T13:12:09", "name": "add support for idpf PMD in DPDK", "version": 11, "mbox": "http://patchwork.dpdk.org/series/25386/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/119020/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/119020/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C1593A034C;\n\tMon, 24 Oct 2022 15:15:59 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BFF7A42B9C;\n\tMon, 24 Oct 2022 15:14:49 +0200 (CEST)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n by mails.dpdk.org (Postfix) with ESMTP id 5AAE842BE3\n for <dev@dpdk.org>; Mon, 24 Oct 2022 15:14:41 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Oct 2022 06:14:40 -0700", "from dpdk-jf-ntb-one.sh.intel.com ([10.67.111.104])\n by orsmga001.jf.intel.com with ESMTP; 24 Oct 2022 06:14:38 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1666617281; x=1698153281;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=VHcA6tYScxx0YTmFOmv6t49iT8VX8BXx/IpwpcIBV/A=;\n b=QHcc9LsTh9XJpdANxCuQOwzX8NCxtcm3UFkqVz/Kcsbzx02F8wupzBGY\n FLfAyS6OiI5h32XGyvqNo3Hj4nY0LZNS2gvoszWYXTFo7rjtbe+po5h4g\n OA6e9BZLnMNdeMYi0AgyabEk9nZ33flAHAAd+jeBGnMwlL0swYd4OY+wi\n FrA4ISQzoZ6vm9lW13Q/1SUCEQvtRz+u26o9/TD2AmIPvE96nfrcpTXxs\n FacbSDqKQYZENklNAkgp6EjP7iXq0yYUqlzWufgLkmyLyTr3ZOzpIE7H1\n 45K2kFCtv0rekygUSzltKnwpK3Um43VFkwEsyKMiKbtjCRlp4s6Gf8h7I g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10510\"; a=\"309100077\"", "E=Sophos;i=\"5.95,209,1661842800\"; d=\"scan'208\";a=\"309100077\"", "E=McAfee;i=\"6500,9779,10510\"; a=\"664540078\"", "E=Sophos;i=\"5.95,209,1661842800\"; d=\"scan'208\";a=\"664540078\"" ], "X-ExtLoop1": "1", "From": "Junfeng Guo <junfeng.guo@intel.com>", "To": "andrew.rybchenko@oktetlabs.ru, qi.z.zhang@intel.com,\n jingjing.wu@intel.com,\n beilei.xing@intel.com", "Cc": "dev@dpdk.org, Junfeng Guo <junfeng.guo@intel.com>,\n Xiaoyun Li <xiaoyun.li@intel.com>", "Subject": "[PATCH v11 15/18] net/idpf: add support for Rx offloading", "Date": "Mon, 24 Oct 2022 21:12:24 +0800", "Message-Id": "<20221024131227.1062446-16-junfeng.guo@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20221024131227.1062446-1-junfeng.guo@intel.com>", "References": "<20221024130134.1046536-2-junfeng.guo@intel.com>\n <20221024131227.1062446-1-junfeng.guo@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add Rx offloading support:\n - support CHKSUM and RSS offload for split queue model\n - support CHKSUM offload for single queue model\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n doc/guides/nics/features/idpf.ini | 2 +\n drivers/net/idpf/idpf_ethdev.c | 9 ++-\n drivers/net/idpf/idpf_rxtx.c | 122 ++++++++++++++++++++++++++++++\n 3 files changed, 132 insertions(+), 1 deletion(-)", "diff": "diff --git a/doc/guides/nics/features/idpf.ini b/doc/guides/nics/features/idpf.ini\nindex d4eb9b374c..c86d9378ea 100644\n--- a/doc/guides/nics/features/idpf.ini\n+++ b/doc/guides/nics/features/idpf.ini\n@@ -9,5 +9,7 @@\n [Features]\n Queue start/stop = Y\n MTU update = Y\n+L3 checksum offload = P\n+L4 checksum offload = P\n Packet type parsing = Y\n Linux = Y\ndiff --git a/drivers/net/idpf/idpf_ethdev.c b/drivers/net/idpf/idpf_ethdev.c\nindex 739cf31d65..d8cc423a23 100644\n--- a/drivers/net/idpf/idpf_ethdev.c\n+++ b/drivers/net/idpf/idpf_ethdev.c\n@@ -94,7 +94,14 @@ idpf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \tdev_info->max_mac_addrs = IDPF_NUM_MACADDR_MAX;\n \tdev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |\n \t\tRTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;\n-\tdev_info->rx_offload_capa = 0;\n+\n+\tdev_info->rx_offload_capa =\n+\t\tRTE_ETH_RX_OFFLOAD_IPV4_CKSUM\t\t|\n+\t\tRTE_ETH_RX_OFFLOAD_UDP_CKSUM\t\t|\n+\t\tRTE_ETH_RX_OFFLOAD_TCP_CKSUM\t\t|\n+\t\tRTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM\t|\n+\t\tRTE_ETH_RX_OFFLOAD_RSS_HASH;\n+\n \tdev_info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_MULTI_SEGS;\n \n \tdev_info->default_rxconf = (struct rte_eth_rxconf) {\ndiff --git a/drivers/net/idpf/idpf_rxtx.c b/drivers/net/idpf/idpf_rxtx.c\nindex fd203c985d..143c8b69f3 100644\n--- a/drivers/net/idpf/idpf_rxtx.c\n+++ b/drivers/net/idpf/idpf_rxtx.c\n@@ -1250,6 +1250,72 @@ idpf_stop_queues(struct rte_eth_dev *dev)\n \t}\n }\n \n+#define IDPF_RX_FLEX_DESC_ADV_STATUS0_XSUM_S\t\t\t\t\\\n+\t(RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_IPE_S) |\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_L4E_S) |\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EIPE_S) |\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EUDPE_S))\n+\n+static inline uint64_t\n+idpf_splitq_rx_csum_offload(uint8_t err)\n+{\n+\tuint64_t flags = 0;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_L3L4P_S)) == 0))\n+\t\treturn flags;\n+\n+\tif (likely((err & IDPF_RX_FLEX_DESC_ADV_STATUS0_XSUM_S) == 0)) {\n+\t\tflags |= (RTE_MBUF_F_RX_IP_CKSUM_GOOD |\n+\t\t\t RTE_MBUF_F_RX_L4_CKSUM_GOOD);\n+\t\treturn flags;\n+\t}\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_IPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_L4E_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EIPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EUDPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_GOOD;\n+\n+\treturn flags;\n+}\n+\n+#define IDPF_RX_FLEX_DESC_ADV_HASH1_S\t0\n+#define IDPF_RX_FLEX_DESC_ADV_HASH2_S\t16\n+#define IDPF_RX_FLEX_DESC_ADV_HASH3_S\t24\n+\n+static inline uint64_t\n+idpf_splitq_rx_rss_offload(struct rte_mbuf *mb,\n+\t\t\t volatile struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc)\n+{\n+\tuint8_t status_err0_qw0;\n+\tuint64_t flags = 0;\n+\n+\tstatus_err0_qw0 = rx_desc->status_err0_qw0;\n+\n+\tif ((status_err0_qw0 & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_RSS_VALID_S)) != 0) {\n+\t\tflags |= RTE_MBUF_F_RX_RSS_HASH;\n+\t\tmb->hash.rss = (rte_le_to_cpu_16(rx_desc->hash1) <<\n+\t\t\t\tIDPF_RX_FLEX_DESC_ADV_HASH1_S) |\n+\t\t\t\t((uint32_t)(rx_desc->ff2_mirrid_hash2.hash2) <<\n+\t\t\t\tIDPF_RX_FLEX_DESC_ADV_HASH2_S) |\n+\t\t\t\t((uint32_t)(rx_desc->hash3) <<\n+\t\t\t\tIDPF_RX_FLEX_DESC_ADV_HASH3_S);\n+\t}\n+\n+\treturn flags;\n+}\n \n static void\n idpf_split_rx_bufq_refill(struct idpf_rx_queue *rx_bufq)\n@@ -1325,9 +1391,11 @@ idpf_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \tuint16_t pktlen_gen_bufq_id;\n \tstruct idpf_rx_queue *rxq;\n \tconst uint32_t *ptype_tbl;\n+\tuint8_t status_err0_qw1;\n \tstruct rte_mbuf *rxm;\n \tuint16_t rx_id_bufq1;\n \tuint16_t rx_id_bufq2;\n+\tuint64_t pkt_flags;\n \tuint16_t pkt_len;\n \tuint16_t bufq_id;\n \tuint16_t gen_id;\n@@ -1393,11 +1461,18 @@ idpf_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\trxm->next = NULL;\n \t\trxm->nb_segs = 1;\n \t\trxm->port = rxq->port_id;\n+\t\trxm->ol_flags = 0;\n \t\trxm->packet_type =\n \t\t\tptype_tbl[(rte_le_to_cpu_16(rx_desc->ptype_err_fflags0) &\n \t\t\t\t VIRTCHNL2_RX_FLEX_DESC_ADV_PTYPE_M) >>\n \t\t\t\t VIRTCHNL2_RX_FLEX_DESC_ADV_PTYPE_S];\n \n+\t\tstatus_err0_qw1 = rx_desc->status_err0_qw1;\n+\t\tpkt_flags = idpf_splitq_rx_csum_offload(status_err0_qw1);\n+\t\tpkt_flags |= idpf_splitq_rx_rss_offload(rxm, rx_desc);\n+\n+\t\trxm->ol_flags |= pkt_flags;\n+\n \t\trx_pkts[nb_rx++] = rxm;\n \t}\n \n@@ -1557,6 +1632,48 @@ idpf_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \treturn nb_tx;\n }\n \n+#define IDPF_RX_FLEX_DESC_STATUS0_XSUM_S\t\t\t\t\\\n+\t(RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_IPE_S) |\t\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_L4E_S) |\t\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S) |\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S))\n+\n+/* Translate the rx descriptor status and error fields to pkt flags */\n+static inline uint64_t\n+idpf_rxd_to_pkt_flags(uint16_t status_error)\n+{\n+\tuint64_t flags = 0;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_L3L4P_S)) == 0))\n+\t\treturn flags;\n+\n+\tif (likely((status_error & IDPF_RX_FLEX_DESC_STATUS0_XSUM_S) == 0)) {\n+\t\tflags |= (RTE_MBUF_F_RX_IP_CKSUM_GOOD |\n+\t\t\t RTE_MBUF_F_RX_L4_CKSUM_GOOD);\n+\t\treturn flags;\n+\t}\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_IPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_L4E_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_GOOD;\n+\n+\treturn flags;\n+}\n+\n static inline void\n idpf_update_rx_tail(struct idpf_rx_queue *rxq, uint16_t nb_hold,\n \t\t uint16_t rx_id)\n@@ -1590,6 +1707,7 @@ idpf_singleq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \tstruct rte_mbuf *rxm;\n \tstruct rte_mbuf *nmb;\n \tuint16_t rx_status0;\n+\tuint64_t pkt_flags;\n \tuint64_t dma_addr;\n \tuint16_t nb_rx;\n \n@@ -1655,10 +1773,14 @@ idpf_singleq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\trxm->pkt_len = rx_packet_len;\n \t\trxm->data_len = rx_packet_len;\n \t\trxm->port = rxq->port_id;\n+\t\trxm->ol_flags = 0;\n+\t\tpkt_flags = idpf_rxd_to_pkt_flags(rx_status0);\n \t\trxm->packet_type =\n \t\t\tptype_tbl[(uint8_t)(rte_cpu_to_le_16(rxd.flex_nic_wb.ptype_flex_flags0) &\n \t\t\t\tVIRTCHNL2_RX_FLEX_DESC_PTYPE_M)];\n \n+\t\trxm->ol_flags |= pkt_flags;\n+\n \t\trx_pkts[nb_rx++] = rxm;\n \t}\n \trxq->rx_tail = rx_id;\n", "prefixes": [ "v11", "15/18" ] }