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GET /api/patches/119149/?format=api
{ "id": 119149, "url": "http://patchwork.dpdk.org/api/patches/119149/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20221026101027.240583-16-junfeng.guo@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221026101027.240583-16-junfeng.guo@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221026101027.240583-16-junfeng.guo@intel.com", "date": "2022-10-26T10:10:24", "name": "[v12,15/18] net/idpf: add support for Rx offloading", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a7b051c968c6431019fec3e7c2d9f51bc8c8f0ea", "submitter": { "id": 1785, "url": "http://patchwork.dpdk.org/api/people/1785/?format=api", "name": "Junfeng Guo", "email": "junfeng.guo@intel.com" }, "delegate": { "id": 3961, "url": "http://patchwork.dpdk.org/api/users/3961/?format=api", "username": "arybchenko", "first_name": "Andrew", "last_name": "Rybchenko", "email": "andrew.rybchenko@oktetlabs.ru" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20221026101027.240583-16-junfeng.guo@intel.com/mbox/", "series": [ { "id": 25436, "url": "http://patchwork.dpdk.org/api/series/25436/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=25436", "date": "2022-10-26T10:10:09", "name": "add support for idpf PMD in DPDK", "version": 12, "mbox": "http://patchwork.dpdk.org/series/25436/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/119149/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/119149/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 502CFA04FD;\n\tWed, 26 Oct 2022 12:13:53 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id EFA8D42C79;\n\tWed, 26 Oct 2022 12:12:50 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id A9C9E42C4F\n for <dev@dpdk.org>; Wed, 26 Oct 2022 12:12:40 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 26 Oct 2022 03:12:40 -0700", "from dpdk-jf-ntb-one.sh.intel.com ([10.67.111.104])\n by fmsmga008.fm.intel.com with ESMTP; 26 Oct 2022 03:12:38 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1666779160; x=1698315160;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=AsOQfNG2bSsBpSsKvEF0BzRDBaeIvrVYRaZunVtiLJ4=;\n b=Iw+oHVmGhR2SwjEseF4Cs7RZWyuUcaTDzHUSRE1cDvT4JUdRkK/ejQro\n m46awb6yTeTDLaRYvPwJvUg4vvXjpcQErGUXFJiYW/4MPCHpSoq68f8hW\n Ma6ViEWS+VawAIP7fOrhdwjOZzWr4SNkA5bb0jSfezYfpLC0EDxamMAFc\n xb/Qg0scEik5yTycdDxJG/PLyngcJ5BzvQk626yuzEI0s12RppUITRp09\n ycGZV/sNUFUcsrWbCCl/QtuJX5mJUDpDdLSIMvVzsZcNCURca7cFMkq6u\n fKoXkYdKND8hpFNNY7QfcaWmGGyJ17VJrzNbvWjR5zyMaG2trCA1z5tvs A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10511\"; a=\"307904686\"", "E=Sophos;i=\"5.95,214,1661842800\"; d=\"scan'208\";a=\"307904686\"", "E=McAfee;i=\"6500,9779,10511\"; a=\"695306444\"", "E=Sophos;i=\"5.95,214,1661842800\"; d=\"scan'208\";a=\"695306444\"" ], "X-ExtLoop1": "1", "From": "Junfeng Guo <junfeng.guo@intel.com>", "To": "andrew.rybchenko@oktetlabs.ru, qi.z.zhang@intel.com,\n jingjing.wu@intel.com,\n beilei.xing@intel.com", "Cc": "dev@dpdk.org, Junfeng Guo <junfeng.guo@intel.com>,\n Xiaoyun Li <xiaoyun.li@intel.com>", "Subject": "[PATCH v12 15/18] net/idpf: add support for Rx offloading", "Date": "Wed, 26 Oct 2022 18:10:24 +0800", "Message-Id": "<20221026101027.240583-16-junfeng.guo@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20221026101027.240583-1-junfeng.guo@intel.com>", "References": "<20221024131227.1062446-2-junfeng.guo@intel.com>\n <20221026101027.240583-1-junfeng.guo@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add Rx offloading support:\n - support CHKSUM and RSS offload for split queue model\n - support CHKSUM offload for single queue model\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n doc/guides/nics/features/idpf.ini | 5 ++\n drivers/net/idpf/idpf_ethdev.c | 6 ++\n drivers/net/idpf/idpf_rxtx.c | 122 ++++++++++++++++++++++++++++++\n 3 files changed, 133 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/idpf.ini b/doc/guides/nics/features/idpf.ini\nindex c8f4a0d6ed..6eefac9529 100644\n--- a/doc/guides/nics/features/idpf.ini\n+++ b/doc/guides/nics/features/idpf.ini\n@@ -3,9 +3,14 @@\n ;\n ; Refer to default.ini for the full list of available PMD features.\n ;\n+; A feature with \"P\" indicates only be supported when non-vector path\n+; is selected.\n+;\n [Features]\n Queue start/stop = Y\n MTU update = Y\n+L3 checksum offload = P\n+L4 checksum offload = P\n Linux = Y\n x86-32 = Y\n x86-64 = Y\ndiff --git a/drivers/net/idpf/idpf_ethdev.c b/drivers/net/idpf/idpf_ethdev.c\nindex ea7d3bfd7e..88f3db3267 100644\n--- a/drivers/net/idpf/idpf_ethdev.c\n+++ b/drivers/net/idpf/idpf_ethdev.c\n@@ -89,6 +89,12 @@ idpf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \tdev_info->flow_type_rss_offloads = IDPF_RSS_OFFLOAD_ALL;\n \tdev_info->max_mac_addrs = IDPF_NUM_MACADDR_MAX;\n \n+\tdev_info->rx_offload_capa =\n+\t\tRTE_ETH_RX_OFFLOAD_IPV4_CKSUM |\n+\t\tRTE_ETH_RX_OFFLOAD_UDP_CKSUM |\n+\t\tRTE_ETH_RX_OFFLOAD_TCP_CKSUM |\n+\t\tRTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM;\n+\n \tdev_info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_MULTI_SEGS;\n \n \tdev_info->default_txconf = (struct rte_eth_txconf) {\ndiff --git a/drivers/net/idpf/idpf_rxtx.c b/drivers/net/idpf/idpf_rxtx.c\nindex f9f751a6ad..cdd20702d8 100644\n--- a/drivers/net/idpf/idpf_rxtx.c\n+++ b/drivers/net/idpf/idpf_rxtx.c\n@@ -1209,6 +1209,72 @@ idpf_stop_queues(struct rte_eth_dev *dev)\n \t}\n }\n \n+#define IDPF_RX_FLEX_DESC_ADV_STATUS0_XSUM_S\t\t\t\t\\\n+\t(RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_IPE_S) |\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_L4E_S) |\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EIPE_S) |\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EUDPE_S))\n+\n+static inline uint64_t\n+idpf_splitq_rx_csum_offload(uint8_t err)\n+{\n+\tuint64_t flags = 0;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_L3L4P_S)) == 0))\n+\t\treturn flags;\n+\n+\tif (likely((err & IDPF_RX_FLEX_DESC_ADV_STATUS0_XSUM_S) == 0)) {\n+\t\tflags |= (RTE_MBUF_F_RX_IP_CKSUM_GOOD |\n+\t\t\t RTE_MBUF_F_RX_L4_CKSUM_GOOD);\n+\t\treturn flags;\n+\t}\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_IPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_L4E_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EIPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EUDPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_GOOD;\n+\n+\treturn flags;\n+}\n+\n+#define IDPF_RX_FLEX_DESC_ADV_HASH1_S\t0\n+#define IDPF_RX_FLEX_DESC_ADV_HASH2_S\t16\n+#define IDPF_RX_FLEX_DESC_ADV_HASH3_S\t24\n+\n+static inline uint64_t\n+idpf_splitq_rx_rss_offload(struct rte_mbuf *mb,\n+\t\t\t volatile struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc)\n+{\n+\tuint8_t status_err0_qw0;\n+\tuint64_t flags = 0;\n+\n+\tstatus_err0_qw0 = rx_desc->status_err0_qw0;\n+\n+\tif ((status_err0_qw0 & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_RSS_VALID_S)) != 0) {\n+\t\tflags |= RTE_MBUF_F_RX_RSS_HASH;\n+\t\tmb->hash.rss = (rte_le_to_cpu_16(rx_desc->hash1) <<\n+\t\t\t\tIDPF_RX_FLEX_DESC_ADV_HASH1_S) |\n+\t\t\t\t((uint32_t)(rx_desc->ff2_mirrid_hash2.hash2) <<\n+\t\t\t\tIDPF_RX_FLEX_DESC_ADV_HASH2_S) |\n+\t\t\t\t((uint32_t)(rx_desc->hash3) <<\n+\t\t\t\tIDPF_RX_FLEX_DESC_ADV_HASH3_S);\n+\t}\n+\n+\treturn flags;\n+}\n \n static void\n idpf_split_rx_bufq_refill(struct idpf_rx_queue *rx_bufq)\n@@ -1283,9 +1349,11 @@ idpf_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \tuint16_t pktlen_gen_bufq_id;\n \tstruct idpf_rx_queue *rxq;\n \tconst uint32_t *ptype_tbl;\n+\tuint8_t status_err0_qw1;\n \tstruct rte_mbuf *rxm;\n \tuint16_t rx_id_bufq1;\n \tuint16_t rx_id_bufq2;\n+\tuint64_t pkt_flags;\n \tuint16_t pkt_len;\n \tuint16_t bufq_id;\n \tuint16_t gen_id;\n@@ -1350,11 +1418,18 @@ idpf_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\trxm->next = NULL;\n \t\trxm->nb_segs = 1;\n \t\trxm->port = rxq->port_id;\n+\t\trxm->ol_flags = 0;\n \t\trxm->packet_type =\n \t\t\tptype_tbl[(rte_le_to_cpu_16(rx_desc->ptype_err_fflags0) &\n \t\t\t\t VIRTCHNL2_RX_FLEX_DESC_ADV_PTYPE_M) >>\n \t\t\t\t VIRTCHNL2_RX_FLEX_DESC_ADV_PTYPE_S];\n \n+\t\tstatus_err0_qw1 = rx_desc->status_err0_qw1;\n+\t\tpkt_flags = idpf_splitq_rx_csum_offload(status_err0_qw1);\n+\t\tpkt_flags |= idpf_splitq_rx_rss_offload(rxm, rx_desc);\n+\n+\t\trxm->ol_flags |= pkt_flags;\n+\n \t\trx_pkts[nb_rx++] = rxm;\n \t}\n \n@@ -1514,6 +1589,48 @@ idpf_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \treturn nb_tx;\n }\n \n+#define IDPF_RX_FLEX_DESC_STATUS0_XSUM_S\t\t\t\t\\\n+\t(RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_IPE_S) |\t\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_L4E_S) |\t\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S) |\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S))\n+\n+/* Translate the rx descriptor status and error fields to pkt flags */\n+static inline uint64_t\n+idpf_rxd_to_pkt_flags(uint16_t status_error)\n+{\n+\tuint64_t flags = 0;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_L3L4P_S)) == 0))\n+\t\treturn flags;\n+\n+\tif (likely((status_error & IDPF_RX_FLEX_DESC_STATUS0_XSUM_S) == 0)) {\n+\t\tflags |= (RTE_MBUF_F_RX_IP_CKSUM_GOOD |\n+\t\t\t RTE_MBUF_F_RX_L4_CKSUM_GOOD);\n+\t\treturn flags;\n+\t}\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_IPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_L4E_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_GOOD;\n+\n+\treturn flags;\n+}\n+\n static inline void\n idpf_update_rx_tail(struct idpf_rx_queue *rxq, uint16_t nb_hold,\n \t\t uint16_t rx_id)\n@@ -1547,6 +1664,7 @@ idpf_singleq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \tstruct rte_mbuf *rxm;\n \tstruct rte_mbuf *nmb;\n \tuint16_t rx_status0;\n+\tuint64_t pkt_flags;\n \tuint64_t dma_addr;\n \tuint16_t nb_rx;\n \n@@ -1612,10 +1730,14 @@ idpf_singleq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\trxm->pkt_len = rx_packet_len;\n \t\trxm->data_len = rx_packet_len;\n \t\trxm->port = rxq->port_id;\n+\t\trxm->ol_flags = 0;\n+\t\tpkt_flags = idpf_rxd_to_pkt_flags(rx_status0);\n \t\trxm->packet_type =\n \t\t\tptype_tbl[(uint8_t)(rte_cpu_to_le_16(rxd.flex_nic_wb.ptype_flex_flags0) &\n \t\t\t\t\t VIRTCHNL2_RX_FLEX_DESC_PTYPE_M)];\n \n+\t\trxm->ol_flags |= pkt_flags;\n+\n \t\trx_pkts[nb_rx++] = rxm;\n \t}\n \trxq->rx_tail = rx_id;\n", "prefixes": [ "v12", "15/18" ] }