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GET /api/patches/119819/?format=api
{ "id": 119819, "url": "http://patchwork.dpdk.org/api/patches/119819/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20221114105321.163430-1-rbhansali@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221114105321.163430-1-rbhansali@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221114105321.163430-1-rbhansali@marvell.com", "date": "2022-11-14T10:53:20", "name": "[1/2] common/cnxk: update IPsec completion codes", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "7c3b4c1b08c9eb234ea287e09aab3e6fb71c2944", "submitter": { "id": 2436, "url": "http://patchwork.dpdk.org/api/people/2436/?format=api", "name": "Rahul Bhansali", "email": "rbhansali@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20221114105321.163430-1-rbhansali@marvell.com/mbox/", "series": [ { "id": 25751, "url": "http://patchwork.dpdk.org/api/series/25751/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=25751", "date": "2022-11-14T10:53:20", "name": "[1/2] common/cnxk: update IPsec completion codes", "version": 1, "mbox": "http://patchwork.dpdk.org/series/25751/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/119819/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/119819/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DB6BEA0032;\n\tMon, 14 Nov 2022 11:53:44 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7C0A840150;\n\tMon, 14 Nov 2022 11:53:44 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id DD3704014F\n for <dev@dpdk.org>; Mon, 14 Nov 2022 11:53:42 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2AE7v59h024488 for <dev@dpdk.org>; Mon, 14 Nov 2022 02:53:41 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3kuhr3gffs-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Mon, 14 Nov 2022 02:53:41 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Mon, 14 Nov 2022 02:53:40 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Mon, 14 Nov 2022 02:53:40 -0800", "from localhost.localdomain (unknown [10.28.36.158])\n by maili.marvell.com (Postfix) with ESMTP id D4AAD5C68E2;\n Mon, 14 Nov 2022 02:53:36 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-transfer-encoding :\n content-type; s=pfpt0220; bh=nc7540qpasN6T3F+dYeEsiSLo5gy4lfyotGNriYpm90=;\n b=hVYR1ZZRCXYN1KNK6DwbVjyZcBDwWSPgg8abxrrWC4GGn1MzKkn8rerlTcDAz2+vQ1Ij\n uj6IITylqFTPxq4TYKr0n91g5amBIKyDnH8K/Jfp6GBIju6MKhivrqxTsoL1EU0AZQr3\n AI6RiJXmbNDVRenASd4cUniJY70lT6/ZhZXJ748mbBpA9h46qy65jPbwfDMcWQshK3rL\n tUVwqaktbSJuu+JUdqZRNbKdq0Hzte9JFh3enAke+6pYdXwfilvT3gTWhc66qeu33jmJ\n ovORvGQbuVLuXoEmoYjZKC3P/wDrw6V7C1lOelJPU8btuav/GkQSvFskumjU8iM9yPb6 CA==", "From": "Rahul Bhansali <rbhansali@marvell.com>", "To": "<dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Ankur Dwivedi <adwivedi@marvell.com>,\n Anoob Joseph <anoobj@marvell.com>, Tejasree Kondoj <ktejasree@marvell.com>", "CC": "<jerinj@marvell.com>, Rahul Bhansali <rbhansali@marvell.com>", "Subject": "[PATCH 1/2] common/cnxk: update IPsec completion codes", "Date": "Mon, 14 Nov 2022 16:23:20 +0530", "Message-ID": "<20221114105321.163430-1-rbhansali@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "HVKgmLunhTSAlCKDzUb_QAUCWz3Mp5KP", "X-Proofpoint-ORIG-GUID": "HVKgmLunhTSAlCKDzUb_QAUCWz3Mp5KP", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-11-14_10,2022-11-11_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Update the IPsec completion codes as per UCODE version\nOCPT-04-IE-IPSEC-MC-30-01-28-00\n\nSigned-off-by: Rahul Bhansali <rbhansali@marvell.com>\n---\n drivers/common/cnxk/hw/cpt.h | 2 ++\n drivers/common/cnxk/roc_cpt.c | 2 +-\n drivers/common/cnxk/roc_ie_ot.h | 21 +++++++++++++++------\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 2 --\n 4 files changed, 18 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h\nindex 3c87a0d1e4..1ebe49da12 100644\n--- a/drivers/common/cnxk/hw/cpt.h\n+++ b/drivers/common/cnxk/hw/cpt.h\n@@ -15,6 +15,8 @@\n #define CPT_COMP_INSTERR (0x5ull)\n #define CPT_COMP_WARN\t (0x6ull) /* [CN10K, .) */\n \n+#define CPT_COMP_HWGOOD_MASK ((1U << CPT_COMP_WARN) | (1U << CPT_COMP_GOOD))\n+\n #define CPT_LF_INT_VEC_MISC\t(0x0ull)\n #define CPT_LF_INT_VEC_DONE\t(0x1ull)\n #define CPT_LF_CTL\t\t(0x10ull)\ndiff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c\nindex 8fc072b9d0..8defdc8ddf 100644\n--- a/drivers/common/cnxk/roc_cpt.c\n+++ b/drivers/common/cnxk/roc_cpt.c\n@@ -990,7 +990,7 @@ roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr, void *sa_cptr,\n \tplt_free(dptr);\n \tplt_free(hw_res);\n \n-\tif (res.cn10k.compcode != CPT_COMP_WARN) {\n+\tif (res.cn10k.compcode != CPT_COMP_GOOD || res.cn10k.uc_compcode) {\n \t\tplt_err(\"Write SA operation timed out\");\n \t\treturn -ETIMEDOUT;\n \t}\ndiff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h\nindex 56a1e9f1d6..a1ba60de75 100644\n--- a/drivers/common/cnxk/roc_ie_ot.h\n+++ b/drivers/common/cnxk/roc_ie_ot.h\n@@ -46,14 +46,14 @@ enum roc_ie_ot_ucc_ipsec {\n \tROC_IE_OT_UCC_ERR_SA_BAD_IP = 0xc7,\n \tROC_IE_OT_UCC_ERR_PKT_IP_FRAG = 0xc8,\n \tROC_IE_OT_UCC_ERR_PKT_REPLAY_WINDOW = 0xc9,\n+\tROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM = 0xed,\n+\tROC_IE_OT_UCC_SUCCESS_PKT_L4_GOODCSUM = 0xee,\n+\tROC_IE_OT_UCC_SUCCESS_PKT_L4_BADCSUM = 0xef,\n \tROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST = 0xf0,\n-\tROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM = 0xf1,\n+\tROC_IE_OT_UCC_SUCCESS_PKT_UDPESP_NZCSUM = 0xf1,\n \tROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_AGAIN = 0xf2,\n-\tROC_IE_OT_UCC_SUCCESS_PKT_L4_GOODCSUM = 0xf3,\n-\tROC_IE_OT_UCC_SUCCESS_PKT_L4_BADCSUM = 0xf4,\n-\tROC_IE_OT_UCC_SUCCESS_PKT_UDPESP_NZCSUM = 0xf5,\n-\tROC_IE_OT_UCC_SUCCESS_PKT_UDP_ZEROCSUM = 0xf6,\n-\tROC_IE_OT_UCC_SUCCESS_PKT_IP_GOODCSUM = 0xf7,\n+\tROC_IE_OT_UCC_SUCCESS_PKT_UDP_ZEROCSUM = 0xf3,\n+\tROC_IE_OT_UCC_SUCCESS_PKT_IP_GOODCSUM = 0x0,\n };\n \n enum {\n@@ -161,6 +161,15 @@ enum {\n \tROC_IE_OT_ERR_CTL_MODE_RING = 2,\n };\n \n+static __plt_always_inline bool\n+roc_ie_ot_ucc_is_success(uint8_t ucc)\n+{\n+\tuint8_t uc_base = (uint8_t)ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM - 1u;\n+\n+\tucc--;\n+\treturn (ucc >= uc_base);\n+}\n+\n /* Context units in bytes */\n #define ROC_CTX_UNIT_8B\t\t 8\n #define ROC_CTX_UNIT_128B\t 128\ndiff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex 1d7a9e2952..68e6a660ea 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -779,8 +779,6 @@ cn10k_cpt_sec_post_process(struct rte_crypto_op *cop, struct cpt_cn10k_res_s *re\n \tmbuf->pkt_len = m_len;\n \n \tswitch (res->uc_compcode) {\n-\tcase ROC_IE_OT_UCC_SUCCESS:\n-\t\tbreak;\n \tcase ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM:\n \t\tmbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;\n \t\tbreak;\n", "prefixes": [ "1/2" ] }