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GET /api/patches/121318/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 121318,
    "url": "http://patchwork.dpdk.org/api/patches/121318/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20221223015558.3143279-7-mingxia.liu@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20221223015558.3143279-7-mingxia.liu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20221223015558.3143279-7-mingxia.liu@intel.com",
    "date": "2022-12-23T01:55:43",
    "name": "[06/21] net/cpfl: support queue stop",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "d67f204b8c0a753667c30042139673aecf81e8d2",
    "submitter": {
        "id": 2514,
        "url": "http://patchwork.dpdk.org/api/people/2514/?format=api",
        "name": "Liu, Mingxia",
        "email": "mingxia.liu@intel.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patchwork.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20221223015558.3143279-7-mingxia.liu@intel.com/mbox/",
    "series": [
        {
            "id": 26253,
            "url": "http://patchwork.dpdk.org/api/series/26253/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=26253",
            "date": "2022-12-23T01:55:37",
            "name": "add support for cpfl PMD in DPDK",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/26253/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/121318/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/121318/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1A416A0093;\n\tFri, 23 Dec 2022 03:52:21 +0100 (CET)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C508342D34;\n\tFri, 23 Dec 2022 03:51:58 +0100 (CET)",
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n by mails.dpdk.org (Postfix) with ESMTP id EE7EC42D2C\n for <dev@dpdk.org>; Fri, 23 Dec 2022 03:51:56 +0100 (CET)",
            "from orsmga006.jf.intel.com ([10.7.209.51])\n by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 22 Dec 2022 18:51:56 -0800",
            "from dpdk-mingxial-01.sh.intel.com ([10.67.119.112])\n by orsmga006.jf.intel.com with ESMTP; 22 Dec 2022 18:51:55 -0800"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1671763917; x=1703299917;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=UAU95EZqJscIr+XguLf7/imsFBeEgH0/ZVObEJ+XEP0=;\n b=M0yowKXSCIePJ0AufZCXs8OG3sMklXpVgG5F5CJKPcbi9vo5gZL6eZyR\n klSWc4zEpXgT7cjpTw996IXI9O+aqoTVDHWe3pyoRbZ0NJRxxRz+tYrPJ\n 2rAuSdkMiPQ+/fpUFMADkfNpE5cKPDMAaPxE/zjBbe7K+NKQqn8sjZSAe\n Wqd/UlOiJeUyMuVb2uKRNr1wgDHp0wHHqXeDEJKf/nHikdPlOi1RnQRTn\n L9U8pu6eR7PFNDN1Rh2F4rhpldxAdyZA6U/29DHQbwLUphayod5VQoQGW\n FpHSPjZz4moSJOvjN5QYmhXbnIse15gGmgGq1c12Qhup+yTFrQalNctSR Q==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6500,9779,10569\"; a=\"321467103\"",
            "E=Sophos;i=\"5.96,267,1665471600\"; d=\"scan'208\";a=\"321467103\"",
            "E=McAfee;i=\"6500,9779,10569\"; a=\"629707159\"",
            "E=Sophos;i=\"5.96,267,1665471600\"; d=\"scan'208\";a=\"629707159\""
        ],
        "X-ExtLoop1": "1",
        "From": "Mingxia Liu <mingxia.liu@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com,\n Mingxia Liu <mingxia.liu@intel.com>",
        "Subject": "[PATCH 06/21] net/cpfl: support queue stop",
        "Date": "Fri, 23 Dec 2022 01:55:43 +0000",
        "Message-Id": "<20221223015558.3143279-7-mingxia.liu@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20221223015558.3143279-1-mingxia.liu@intel.com>",
        "References": "<20221223015558.3143279-1-mingxia.liu@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Add support for these device ops:\n - rx_queue_stop\n - tx_queue_stop\n\nSigned-off-by: Mingxia Liu <mingxia.liu@intel.com>\n---\n drivers/net/cpfl/cpfl_ethdev.c |  9 +++-\n drivers/net/cpfl/cpfl_rxtx.c   | 87 ++++++++++++++++++++++++++++++++++\n drivers/net/cpfl/cpfl_rxtx.h   |  3 ++\n 3 files changed, 98 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c\nindex d939dcb005..4332f66ed6 100644\n--- a/drivers/net/cpfl/cpfl_ethdev.c\n+++ b/drivers/net/cpfl/cpfl_ethdev.c\n@@ -242,10 +242,13 @@ cpfl_dev_start(struct rte_eth_dev *dev)\n \tret = idpf_vc_ena_dis_vport(vport, true);\n \tif (ret != 0) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to enable vport\");\n-\t\treturn ret;\n+\t\tgoto err_vport;\n \t}\n \n \treturn 0;\n+\n+err_vport:\n+\tcpfl_stop_queues(dev);\n err_mtu:\n \treturn ret;\n }\n@@ -260,6 +263,8 @@ cpfl_dev_stop(struct rte_eth_dev *dev)\n \n \tidpf_vc_ena_dis_vport(vport, false);\n \n+\tcpfl_stop_queues(dev);\n+\n \tvport->stopped = 1;\n \n \treturn 0;\n@@ -625,6 +630,8 @@ static const struct eth_dev_ops cpfl_eth_dev_ops = {\n \t.link_update\t\t\t= cpfl_dev_link_update,\n \t.rx_queue_start\t\t\t= cpfl_rx_queue_start,\n \t.tx_queue_start\t\t\t= cpfl_tx_queue_start,\n+\t.rx_queue_stop\t\t\t= cpfl_rx_queue_stop,\n+\t.tx_queue_stop\t\t\t= cpfl_tx_queue_stop,\n \t.dev_supported_ptypes_get\t= cpfl_dev_supported_ptypes_get,\n };\n \ndiff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c\nindex aa67db1e92..b7d616de4f 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.c\n+++ b/drivers/net/cpfl/cpfl_rxtx.c\n@@ -612,3 +612,90 @@ cpfl_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \n \treturn err;\n }\n+\n+int\n+cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n+{\n+\tstruct idpf_vport *vport = dev->data->dev_private;\n+\tstruct idpf_rx_queue *rxq;\n+\tint err;\n+\n+\tif (rx_queue_id >= dev->data->nb_rx_queues)\n+\t\treturn -EINVAL;\n+\n+\terr = idpf_switch_queue(vport, rx_queue_id, true, false);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to switch RX queue %u off\",\n+\t\t\t    rx_queue_id);\n+\t\treturn err;\n+\t}\n+\n+\trxq = dev->data->rx_queues[rx_queue_id];\n+\tif (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {\n+\t\trxq->ops->release_mbufs(rxq);\n+\t\treset_single_rx_queue(rxq);\n+\t} else {\n+\t\trxq->bufq1->ops->release_mbufs(rxq->bufq1);\n+\t\trxq->bufq2->ops->release_mbufs(rxq->bufq2);\n+\t\treset_split_rx_queue(rxq);\n+\t}\n+\tdev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;\n+\n+\treturn 0;\n+}\n+\n+int\n+cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n+{\n+\tstruct idpf_vport *vport = dev->data->dev_private;\n+\tstruct idpf_tx_queue *txq;\n+\tint err;\n+\n+\tif (tx_queue_id >= dev->data->nb_tx_queues)\n+\t\treturn -EINVAL;\n+\n+\terr = idpf_switch_queue(vport, tx_queue_id, false, false);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to switch TX queue %u off\",\n+\t\t\t    tx_queue_id);\n+\t\treturn err;\n+\t}\n+\n+\ttxq = dev->data->tx_queues[tx_queue_id];\n+\ttxq->ops->release_mbufs(txq);\n+\tif (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {\n+\t\treset_single_tx_queue(txq);\n+\t} else {\n+\t\treset_split_tx_descq(txq);\n+\t\treset_split_tx_complq(txq->complq);\n+\t}\n+\tdev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;\n+\n+\treturn 0;\n+}\n+\n+void\n+cpfl_stop_queues(struct rte_eth_dev *dev)\n+{\n+\tstruct idpf_rx_queue *rxq;\n+\tstruct idpf_tx_queue *txq;\n+\tint i;\n+\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n+\t\trxq = dev->data->rx_queues[i];\n+\t\tif (rxq == NULL)\n+\t\t\tcontinue;\n+\n+\t\tif (cpfl_rx_queue_stop(dev, i) != 0)\n+\t\t\tPMD_DRV_LOG(WARNING, \"Fail to stop Rx queue %d\", i);\n+\t}\n+\n+\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n+\t\ttxq = dev->data->tx_queues[i];\n+\t\tif (txq == NULL)\n+\t\t\tcontinue;\n+\n+\t\tif (cpfl_tx_queue_stop(dev, i) != 0)\n+\t\t\tPMD_DRV_LOG(WARNING, \"Fail to stop Tx queue %d\", i);\n+\t}\n+}\ndiff --git a/drivers/net/cpfl/cpfl_rxtx.h b/drivers/net/cpfl/cpfl_rxtx.h\nindex 2fa7950775..6b63137d5c 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.h\n+++ b/drivers/net/cpfl/cpfl_rxtx.h\n@@ -32,4 +32,7 @@ int cpfl_rx_queue_init(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n int cpfl_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n int cpfl_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n int cpfl_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n+void cpfl_stop_queues(struct rte_eth_dev *dev);\n+int cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n+int cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n #endif /* _CPFL_RXTX_H_ */\n",
    "prefixes": [
        "06/21"
    ]
}