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GET /api/patches/122732/?format=api
{ "id": 122732, "url": "http://patchwork.dpdk.org/api/patches/122732/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230131093346.1261066-15-valex@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230131093346.1261066-15-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230131093346.1261066-15-valex@nvidia.com", "date": "2023-01-31T09:33:43", "name": "[v1,14/16] net/mlx5/hws: add debug dump support for range and hash", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "aaf21f0a4ecb617cf12ee0db3e9a213fd01ec864", "submitter": { "id": 2858, "url": "http://patchwork.dpdk.org/api/people/2858/?format=api", "name": "Alex Vesker", "email": "valex@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230131093346.1261066-15-valex@nvidia.com/mbox/", "series": [ { "id": 26709, "url": "http://patchwork.dpdk.org/api/series/26709/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=26709", "date": "2023-01-31T09:33:29", "name": "net/mlx5/hws: support range and partial hash matching", "version": 1, "mbox": "http://patchwork.dpdk.org/series/26709/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/122732/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/122732/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1FE4A41B8D;\n\tTue, 31 Jan 2023 10:36:01 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C385C42F90;\n\tTue, 31 Jan 2023 10:34:54 +0100 (CET)", "from NAM04-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam04on2084.outbound.protection.outlook.com [40.107.101.84])\n by mails.dpdk.org (Postfix) with ESMTP id C070B42F8E\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Alex Vesker <valex@nvidia.com>", "To": "<valex@nvidia.com>, <viacheslavo@nvidia.com>, <thomas@monjalon.net>,\n \"Matan Azrad\" <matan@nvidia.com>", "CC": "<dev@dpdk.org>, <orika@nvidia.com>", "Subject": "[v1 14/16] net/mlx5/hws: add debug dump support for range and hash", "Date": "Tue, 31 Jan 2023 11:33:43 +0200", "Message-ID": "<20230131093346.1261066-15-valex@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20230131093346.1261066-1-valex@nvidia.com>", "References": "<20230131093346.1261066-1-valex@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.37]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CO1NAM11FT039:EE_|LV2PR12MB5944:EE_", "X-MS-Office365-Filtering-Correlation-Id": "ef4f3f94-10fc-4857-64ad-08db036e66be", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 8mIIKPip8JX01p1Gq7860rufzBqvRhnhIZaSFOP4mojT9mIU7cbJA0eG1Bj3pjykqdhpHFTrSOA0i6AC+qgkW3syD0dM/qbTf1RuWtug0ny0coGWJuV3WmPx/jiAxs5i42dkUuhIccWbo9i01pAoLFSPN75v8vNpmudiZ0NWNOx5l+j8MhbHPhm3+XkEHDX5OjXrio4AiO1qpV1U6pRjmIA3R6Px/qx2dLiDGQIj7vnlUFriNjtwSv9w03LOUOr70b+cnpfdBecO9DmDQBjytRlphQPbf93vmFEW7decrnwAeUaBVUkfTAtuE7gK4lpk115pPpxBGhQR6Pkx80VSSdCi6FsgJlKNcmjjwObnbZ1VyKiL/xIwz6TcYAahKAQmKFkC/9BqbIpg1Roi4jTDXJblxLNd2Izw+m19y+m8PM548qKQY1k82kG4/w3HY95ptO32BPy0+VAHC1JO6LyTv3bqz+RMWCVHBSxpr+2us/yU4l+p1BwmKYySgmJnSBw1jHrS2B7BADru0aOFv6Hb/7URDHTgtt7m+L7D5+AWb+4tawvAwFZR/2CtT4AFEagsGvRq+pf/9ZIeZT7sy3CBq8iTFMm85l1tZS+uaXwFSQGTpYHmWmMPGuqybpDld9jfcq6oq8VD0vCImAmYrab6qYL58Mlu/0ObiRrCjMS420yzbYhmur21aOIIWh4SDPuN7S/w82GaVZZ4Uv0ovCUr2A==", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230025)(4636009)(396003)(39860400002)(376002)(136003)(346002)(451199018)(36840700001)(46966006)(40470700004)(83380400001)(336012)(47076005)(86362001)(2616005)(82310400005)(7636003)(82740400003)(356005)(2906002)(7696005)(26005)(36860700001)(36756003)(1076003)(40460700003)(426003)(186003)(6286002)(16526019)(478600001)(55016003)(107886003)(40480700001)(110136005)(8676002)(8936002)(41300700001)(4326008)(6636002)(54906003)(5660300002)(6666004)(70206006)(316002)(70586007);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "31 Jan 2023 09:34:50.7159 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n ef4f3f94-10fc-4857-64ad-08db036e66be", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT039.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "LV2PR12MB5944", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add support for dumping range and hash definers objects.\nHash definer is a per matcher object describing the fields\nused for hashing. Range definer is per match template object\ndescribing the fields used for range matching.\nBoth are optional based on the given match templates.\n\nSigned-off-by: Alex Vesker <valex@nvidia.com>\n---\n drivers/net/mlx5/hws/mlx5dr_debug.c | 37 ++++++++++++++++++++---------\n drivers/net/mlx5/hws/mlx5dr_debug.h | 4 +++-\n 2 files changed, 29 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/hws/mlx5dr_debug.c b/drivers/net/mlx5/hws/mlx5dr_debug.c\nindex 9199ec16e0..b1d271eebe 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_debug.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_debug.c\n@@ -34,15 +34,19 @@ const char *mlx5dr_debug_action_type_to_str(enum mlx5dr_action_type action_type)\n \n static int\n mlx5dr_debug_dump_matcher_template_definer(FILE *f,\n-\t\t\t\t\t struct mlx5dr_match_template *mt)\n+\t\t\t\t\t void *parent_obj,\n+\t\t\t\t\t struct mlx5dr_definer *definer,\n+\t\t\t\t\t enum mlx5dr_debug_res_type type)\n {\n-\tstruct mlx5dr_definer *definer = mt->definer;\n \tint i, ret;\n \n+\tif (!definer)\n+\t\treturn 0;\n+\n \tret = fprintf(f, \"%d,0x%\" PRIx64 \",0x%\" PRIx64 \",%d,%d,\",\n-\t\t MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_DEFINER,\n+\t\t type,\n \t\t (uint64_t)(uintptr_t)definer,\n-\t\t (uint64_t)(uintptr_t)mt,\n+\t\t (uint64_t)(uintptr_t)parent_obj,\n \t\t definer->obj->id,\n \t\t definer->type);\n \tif (ret < 0) {\n@@ -89,29 +93,40 @@ static int\n mlx5dr_debug_dump_matcher_match_template(FILE *f, struct mlx5dr_matcher *matcher)\n {\n \tbool is_root = matcher->tbl->level == MLX5DR_ROOT_LEVEL;\n+\tenum mlx5dr_debug_res_type res_type;\n \tint i, ret;\n \n \tfor (i = 0; i < matcher->num_of_mt; i++) {\n \t\tstruct mlx5dr_match_template *mt = &matcher->mt[i];\n \n-\t\tret = fprintf(f, \"%d,0x%\" PRIx64 \",0x%\" PRIx64 \",%d,%d\\n\",\n+\t\tret = fprintf(f, \"%d,0x%\" PRIx64 \",0x%\" PRIx64 \",%d,%d,%d\\n\",\n \t\t\t MLX5DR_DEBUG_RES_TYPE_MATCHER_MATCH_TEMPLATE,\n \t\t\t (uint64_t)(uintptr_t)mt,\n \t\t\t (uint64_t)(uintptr_t)matcher,\n \t\t\t is_root ? 0 : mt->fc_sz,\n-\t\t\t mt->flags);\n+\t\t\t mt->flags,\n+\t\t\t is_root ? 0 : mt->fcr_sz);\n \t\tif (ret < 0) {\n \t\t\trte_errno = EINVAL;\n \t\t\treturn rte_errno;\n \t\t}\n \n-\t\tif (!is_root) {\n-\t\t\tret = mlx5dr_debug_dump_matcher_template_definer(f, mt);\n-\t\t\tif (ret)\n-\t\t\t\treturn ret;\n-\t\t}\n+\t\tres_type = MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_MATCH_DEFINER;\n+\t\tret = mlx5dr_debug_dump_matcher_template_definer(f, mt, mt->definer, res_type);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\n+\t\tres_type = MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_RANGE_DEFINER;\n+\t\tret = mlx5dr_debug_dump_matcher_template_definer(f, mt, mt->range_definer, res_type);\n+\t\tif (ret)\n+\t\t\treturn ret;\n \t}\n \n+\tres_type = MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_HASH_DEFINER;\n+\tret = mlx5dr_debug_dump_matcher_template_definer(f, matcher, matcher->hash_definer, res_type);\n+\tif (ret)\n+\t\treturn ret;\n+\n \treturn 0;\n }\n \ndiff --git a/drivers/net/mlx5/hws/mlx5dr_debug.h b/drivers/net/mlx5/hws/mlx5dr_debug.h\nindex cf00170f7d..2c29ca295c 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_debug.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_debug.h\n@@ -19,8 +19,10 @@ enum mlx5dr_debug_res_type {\n \tMLX5DR_DEBUG_RES_TYPE_MATCHER = 4200,\n \tMLX5DR_DEBUG_RES_TYPE_MATCHER_ATTR = 4201,\n \tMLX5DR_DEBUG_RES_TYPE_MATCHER_MATCH_TEMPLATE = 4202,\n+\tMLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_MATCH_DEFINER = 4203,\n \tMLX5DR_DEBUG_RES_TYPE_MATCHER_ACTION_TEMPLATE = 4204,\n-\tMLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_DEFINER = 4203,\n+\tMLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_HASH_DEFINER = 4205,\n+\tMLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_RANGE_DEFINER = 4206,\n };\n \n const char *mlx5dr_debug_action_type_to_str(enum mlx5dr_action_type action_type);\n", "prefixes": [ "v1", "14/16" ] }