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{
    "id": 124766,
    "url": "http://patchwork.dpdk.org/api/patches/124766/?format=api",
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    "msgid": "<20230303081013.589868-9-ndabilpuram@marvell.com>",
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    "date": "2023-03-03T08:10:07",
    "name": "[09/15] net/cnxk: don't allow PFC configuration on started port",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
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    "hash": "795dbf8ec1f1312169d51b35d84fcd78f982f627",
    "submitter": {
        "id": 1202,
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        "name": "Nithin Dabilpuram",
        "email": "ndabilpuram@marvell.com"
    },
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        "id": 310,
        "url": "http://patchwork.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230303081013.589868-9-ndabilpuram@marvell.com/mbox/",
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        {
            "id": 27237,
            "url": "http://patchwork.dpdk.org/api/series/27237/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=27237",
            "date": "2023-03-03T08:09:59",
            "name": "[01/15] net/cnxk: resolve sefgault caused during transmit completion",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/27237/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/124766/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/124766/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        ],
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        "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>",
        "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>",
        "CC": "<jerinj@marvell.com>, <dev@dpdk.org>, Rahul Bhansali\n <rbhansali@marvell.com>",
        "Subject": "[PATCH 09/15] net/cnxk: don't allow PFC configuration on started port",
        "Date": "Fri, 3 Mar 2023 13:40:07 +0530",
        "Message-ID": "<20230303081013.589868-9-ndabilpuram@marvell.com>",
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    },
    "content": "From: Rahul Bhansali <rbhansali@marvell.com>\n\nAvoid priority flow control configuration when port is\nstarted.\n\nSigned-off-by: Rahul Bhansali <rbhansali@marvell.com>\n---\n drivers/net/cnxk/cnxk_ethdev_ops.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c\nindex 5df7927d7b..068b7c3502 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_ops.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_ops.c\n@@ -1121,8 +1121,8 @@ nix_priority_flow_ctrl_rq_conf(struct rte_eth_dev *eth_dev, uint16_t qid,\n \tstruct roc_nix_cq *cq;\n \tint rc, i;\n \n-\tif (roc_model_is_cn96_ax() && data->dev_started) {\n-\t\t/* On Ax, CQ should be in disabled state\n+\tif (data->dev_started) {\n+\t\t/* RQ should be in disabled state\n \t\t * while setting flow control configuration.\n \t\t */\n \t\tplt_info(\"Stop the port=%d for setting flow control\",\n",
    "prefixes": [
        "09/15"
    ]
}