Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/125869/?format=api
{ "id": 125869, "url": "http://patchwork.dpdk.org/api/patches/125869/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230410064724.2094392-1-junfeng.guo@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230410064724.2094392-1-junfeng.guo@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230410064724.2094392-1-junfeng.guo@intel.com", "date": "2023-04-10T06:47:24", "name": "net/gve: add struct members and typedefs for DQO", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "d7676ae428fd9b95bbf4bb342291cc4b0524886a", "submitter": { "id": 1785, "url": "http://patchwork.dpdk.org/api/people/1785/?format=api", "name": "Junfeng Guo", "email": "junfeng.guo@intel.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230410064724.2094392-1-junfeng.guo@intel.com/mbox/", "series": [ { "id": 27647, "url": "http://patchwork.dpdk.org/api/series/27647/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=27647", "date": "2023-04-10T06:47:24", "name": "net/gve: add struct members and typedefs for DQO", "version": 1, "mbox": "http://patchwork.dpdk.org/series/27647/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/125869/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/125869/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 279534290A;\n\tMon, 10 Apr 2023 08:47:40 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B0E1C40DDC;\n\tMon, 10 Apr 2023 08:47:39 +0200 (CEST)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by mails.dpdk.org (Postfix) with ESMTP id 4E30840A81\n for <dev@dpdk.org>; Mon, 10 Apr 2023 08:47:38 +0200 (CEST)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 09 Apr 2023 23:47:37 -0700", "from dpdk-jf-ntb-one.sh.intel.com ([10.67.111.104])\n by fmsmga001.fm.intel.com with ESMTP; 09 Apr 2023 23:47:34 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1681109258; x=1712645258;\n h=from:to:cc:subject:date:message-id:mime-version:\n content-transfer-encoding;\n bh=D3vjzqt9p4vq7+YJj+ajJrbt2nnnBKmO2UDnmMVKjlk=;\n b=YmSZhyH37zZiM4VfH2MZyWzDmibIgZMGUDNa9VhWGQvElXsWFTe361E2\n zrmKT3L2wCy7mPwbmY8gUCoiIIhU2NoHg2i+k9w9EBwT9ekFEfwE5cysO\n QblVXEaY6nHDlnfWB8TYdIWg22HOXmTMy4b9v7Sj+rdZI/uSyMSle4TL6\n WZFmeIlxck/OHpkcc8883udiWkCmYWTDk6pfWDgVLO2KkzFiptSPQ98+h\n ibsZPl9kTJ1elRKQv8PLSdXSQZsvDX3UIj7q3PKUSmdQRvvLTuVPxGdJA\n g2GWUKQh9ZwK+vIMwUI1W6hWFmRIBds52Bap4lnJUmttrC6DFYk92fm8S A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10675\"; a=\"408435783\"", "E=Sophos;i=\"5.98,333,1673942400\"; d=\"scan'208\";a=\"408435783\"", "E=McAfee;i=\"6600,9927,10675\"; a=\"831841851\"", "E=Sophos;i=\"5.98,333,1673942400\"; d=\"scan'208\";a=\"831841851\"" ], "X-ExtLoop1": "1", "From": "Junfeng Guo <junfeng.guo@intel.com>", "To": "qi.z.zhang@intel.com, jingjing.wu@intel.com, ferruh.yigit@amd.com,\n beilei.xing@intel.com", "Cc": "dev@dpdk.org, Junfeng Guo <junfeng.guo@intel.com>,\n Rushil Gupta <rushilg@google.com>, Joshua Washington <joshwash@google.com>,\n Jeroen de Borst <jeroendb@google.com>", "Subject": "[PATCH] net/gve: add struct members and typedefs for DQO", "Date": "Mon, 10 Apr 2023 14:47:24 +0800", "Message-Id": "<20230410064724.2094392-1-junfeng.guo@intel.com>", "X-Mailer": "git-send-email 2.34.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add struct members for gve_tx_queue and gve_rx_queue.\nAdd typedefs for little endians.\n\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\nSigned-off-by: Rushil Gupta <rushilg@google.com>\nSigned-off-by: Joshua Washington <joshwash@google.com>\nSigned-off-by: Jeroen de Borst <jeroendb@google.com>\n---\n .mailmap | 1 +\n drivers/net/gve/base/gve_osdep.h | 4 ++++\n drivers/net/gve/gve_ethdev.h | 9 +++++++++\n 3 files changed, 14 insertions(+)", "diff": "diff --git a/.mailmap b/.mailmap\nindex 0859104404..10e1392cd8 100644\n--- a/.mailmap\n+++ b/.mailmap\n@@ -590,6 +590,7 @@ Jens Freimann <jfreimann@redhat.com> <jfreiman@redhat.com>\n Jeremy Plsek <jplsek@iol.unh.edu>\n Jeremy Spewock <jspewock@iol.unh.edu>\n Jerin Jacob <jerinj@marvell.com> <jerin.jacob@caviumnetworks.com> <jerinjacobk@gmail.com>\n+Jeroen de Borst <jeroendb@google.com>\n Jerome Jutteau <jerome.jutteau@outscale.com>\n Jerry Hao OS <jerryhao@os.amperecomputing.com>\n Jerry Lilijun <jerry.lilijun@huawei.com>\ndiff --git a/drivers/net/gve/base/gve_osdep.h b/drivers/net/gve/base/gve_osdep.h\nindex 7cb73002f4..abf3d379ae 100644\n--- a/drivers/net/gve/base/gve_osdep.h\n+++ b/drivers/net/gve/base/gve_osdep.h\n@@ -35,6 +35,10 @@ typedef rte_be16_t __be16;\n typedef rte_be32_t __be32;\n typedef rte_be64_t __be64;\n \n+typedef rte_le16_t __le16;\n+typedef rte_le32_t __le32;\n+typedef rte_le64_t __le64;\n+\n typedef rte_iova_t dma_addr_t;\n \n #define ETH_MIN_MTU\tRTE_ETHER_MIN_MTU\ndiff --git a/drivers/net/gve/gve_ethdev.h b/drivers/net/gve/gve_ethdev.h\nindex 42a02cf5d4..0b825113f6 100644\n--- a/drivers/net/gve/gve_ethdev.h\n+++ b/drivers/net/gve/gve_ethdev.h\n@@ -11,6 +11,9 @@\n \n #include \"base/gve.h\"\n \n+/* TODO: this is a workaround to ensure that Tx complq is enough */\n+#define DQO_TX_MULTIPLIER 4\n+\n /*\n * Following macros are derived from linux/pci_regs.h, however,\n * we can't simply include that header here, as there is no such\n@@ -124,6 +127,9 @@ struct gve_tx_queue {\n \tconst struct rte_memzone *qres_mz;\n \tstruct gve_queue_resources *qres;\n \n+\t/* newly added for DQO */\n+\tuint64_t compl_ring_phys_addr;\n+\n \t/* Only valid for DQO_RDA queue format */\n \tstruct gve_tx_queue *complq;\n \n@@ -164,6 +170,9 @@ struct gve_rx_queue {\n \tuint16_t ntfy_id;\n \tuint16_t rx_buf_len;\n \n+\t/* newly added for DQO */\n+\tuint64_t compl_ring_phys_addr;\n+\n \t/* Only valid for DQO_RDA queue format */\n \tstruct gve_rx_queue *bufq;\n \n", "prefixes": [] }