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GET /api/patches/125892/?format=api
{ "id": 125892, "url": "http://patchwork.dpdk.org/api/patches/125892/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230411045908.844901-2-rushilg@google.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230411045908.844901-2-rushilg@google.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230411045908.844901-2-rushilg@google.com", "date": "2023-04-11T04:59:08", "name": "[1/1] net/gve: update base code for DQO", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f790b06a1e6c738c0b6d20a76e4b495cbdcdbcb4", "submitter": { "id": 2890, "url": "http://patchwork.dpdk.org/api/people/2890/?format=api", "name": "Rushil Gupta", "email": "rushilg@google.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230411045908.844901-2-rushilg@google.com/mbox/", "series": [ { "id": 27653, "url": "http://patchwork.dpdk.org/api/series/27653/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=27653", "date": "2023-04-11T04:59:07", "name": "*** Update drivers/net/gve/base code for DQO ***", "version": 1, "mbox": "http://patchwork.dpdk.org/series/27653/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/125892/comments/", "check": "fail", "checks": "http://patchwork.dpdk.org/api/patches/125892/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BEC5542917;\n\tTue, 11 Apr 2023 06:59:35 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A9B4341143;\n\tTue, 11 Apr 2023 06:59:35 +0200 (CEST)", "from mail-yw1-f202.google.com (mail-yw1-f202.google.com\n [209.85.128.202])\n by mails.dpdk.org (Postfix) with ESMTP id 4797F40A8B\n for <dev@dpdk.org>; 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Mon, 10\n Apr 2023 21:59:33 -0700 (PDT)", "Date": "Mon, 10 Apr 2023 21:59:08 -0700", "In-Reply-To": "<20230411045908.844901-1-rushilg@google.com>", "Mime-Version": "1.0", "References": "<20230411045908.844901-1-rushilg@google.com>", "X-Mailer": "git-send-email 2.40.0.577.gac1e443424-goog", "Message-ID": "<20230411045908.844901-2-rushilg@google.com>", "Subject": "[PATCH 1/1] net/gve: update base code for DQO", "From": "Rushil Gupta <rushilg@google.com>", "To": "qi.z.zhang@intel.com, ferruh.yigit@amd.com", "Cc": "bruce.richardson@intel.com, dev@dpdk.org,\n Rushil Gupta <rushilg@google.com>, Junfeng Guo <junfeng.guo@intel.com>", "Content-Type": "text/plain; charset=\"UTF-8\"", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Update gve base code to support DQO.\n\nThis patch is based on this:\nhttps://patchwork.dpdk.org/project/dpdk/list/?series=27647&state=*\n\nSigned-off-by: Rushil Gupta <rushilg@google.com>\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n drivers/net/gve/base/gve.h | 1 +\n drivers/net/gve/base/gve_adminq.c | 10 +++++-----\n drivers/net/gve/base/gve_desc_dqo.h | 4 ----\n 3 files changed, 6 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/net/gve/base/gve.h b/drivers/net/gve/base/gve.h\nindex 2dc4507acb..2b7cf7d99b 100644\n--- a/drivers/net/gve/base/gve.h\n+++ b/drivers/net/gve/base/gve.h\n@@ -7,6 +7,7 @@\n #define _GVE_H_\n \n #include \"gve_desc.h\"\n+#include \"gve_desc_dqo.h\"\n \n #define GVE_VERSION\t\t\"1.3.0\"\n #define GVE_VERSION_PREFIX\t\"GVE-\"\ndiff --git a/drivers/net/gve/base/gve_adminq.c b/drivers/net/gve/base/gve_adminq.c\nindex e745b709b2..e963f910a0 100644\n--- a/drivers/net/gve/base/gve_adminq.c\n+++ b/drivers/net/gve/base/gve_adminq.c\n@@ -497,11 +497,11 @@ static int gve_adminq_create_tx_queue(struct gve_priv *priv, u32 queue_index)\n \t\tcmd.create_tx_queue.queue_page_list_id = cpu_to_be32(qpl_id);\n \t} else {\n \t\tcmd.create_tx_queue.tx_ring_size =\n-\t\t\tcpu_to_be16(txq->nb_tx_desc);\n+\t\t\tcpu_to_be16(priv->tx_desc_cnt);\n \t\tcmd.create_tx_queue.tx_comp_ring_addr =\n-\t\t\tcpu_to_be64(txq->complq->tx_ring_phys_addr);\n+\t\t\tcpu_to_be64(txq->compl_ring_phys_addr);\n \t\tcmd.create_tx_queue.tx_comp_ring_size =\n-\t\t\tcpu_to_be16(priv->tx_compq_size);\n+\t\t\tcpu_to_be16(priv->tx_compq_size * DQO_TX_MULTIPLIER);\n \t}\n \n \treturn gve_adminq_issue_cmd(priv, &cmd);\n@@ -549,9 +549,9 @@ static int gve_adminq_create_rx_queue(struct gve_priv *priv, u32 queue_index)\n \t\tcmd.create_rx_queue.rx_ring_size =\n \t\t\tcpu_to_be16(priv->rx_desc_cnt);\n \t\tcmd.create_rx_queue.rx_desc_ring_addr =\n-\t\t\tcpu_to_be64(rxq->rx_ring_phys_addr);\n+\t\t\tcpu_to_be64(rxq->compl_ring_phys_addr);\n \t\tcmd.create_rx_queue.rx_data_ring_addr =\n-\t\t\tcpu_to_be64(rxq->bufq->rx_ring_phys_addr);\n+\t\t\tcpu_to_be64(rxq->rx_ring_phys_addr);\n \t\tcmd.create_rx_queue.packet_buffer_size =\n \t\t\tcpu_to_be16(rxq->rx_buf_len);\n \t\tcmd.create_rx_queue.rx_buff_ring_size =\ndiff --git a/drivers/net/gve/base/gve_desc_dqo.h b/drivers/net/gve/base/gve_desc_dqo.h\nindex ee1afdecb8..bb4a18d4d1 100644\n--- a/drivers/net/gve/base/gve_desc_dqo.h\n+++ b/drivers/net/gve/base/gve_desc_dqo.h\n@@ -13,10 +13,6 @@\n #define GVE_TX_MAX_HDR_SIZE_DQO 255\n #define GVE_TX_MIN_TSO_MSS_DQO 88\n \n-#ifndef __LITTLE_ENDIAN_BITFIELD\n-#error \"Only little endian supported\"\n-#endif\n-\n /* Basic TX descriptor (DTYPE 0x0C) */\n struct gve_tx_pkt_desc_dqo {\n \t__le64 buf_addr;\n", "prefixes": [ "1/1" ] }