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GET /api/patches/126401/?format=api
{ "id": 126401, "url": "http://patchwork.dpdk.org/api/patches/126401/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230421145406.12831-4-nipun.gupta@amd.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230421145406.12831-4-nipun.gupta@amd.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230421145406.12831-4-nipun.gupta@amd.com", "date": "2023-04-21T14:54:04", "name": "[v3,3/5] bus/cdx: add support for MSI", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "225733fa82b08f0fb2efa7f72aedd4567be963f8", "submitter": { "id": 2928, "url": "http://patchwork.dpdk.org/api/people/2928/?format=api", "name": "Gupta, Nipun", "email": "nipun.gupta@amd.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230421145406.12831-4-nipun.gupta@amd.com/mbox/", "series": [ { "id": 27819, "url": "http://patchwork.dpdk.org/api/series/27819/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=27819", "date": "2023-04-21T14:54:01", "name": "Support AMD CDX bus, for FPGA based CDX devices. The CDX", "version": 3, "mbox": "http://patchwork.dpdk.org/series/27819/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/126401/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/126401/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DD5B3429AE;\n\tFri, 21 Apr 2023 16:54:52 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 677A042D2D;\n\tFri, 21 Apr 2023 16:54:38 +0200 (CEST)", "from NAM02-BN1-obe.outbound.protection.outlook.com\n (mail-bn1nam02on2084.outbound.protection.outlook.com [40.107.212.84])\n by mails.dpdk.org (Postfix) with ESMTP id 567F842D12\n for <dev@dpdk.org>; Fri, 21 Apr 2023 16:54:36 +0200 (CEST)", "from BN9PR03CA0888.namprd03.prod.outlook.com (2603:10b6:408:13c::23)\n by SA0PR12MB7001.namprd12.prod.outlook.com (2603:10b6:806:2c0::11)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.22; 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helo=SATLEXMB04.amd.com; pr=C", "From": "Nipun Gupta <nipun.gupta@amd.com>", "To": "<dev@dpdk.org>, <thomas@monjalon.net>, <david.marchand@redhat.com>,\n <ferruh.yigit@amd.com>", "CC": "<harpreet.anand@amd.com>, <nikhil.agarwal@amd.com>, Nipun Gupta\n <nipun.gupta@amd.com>", "Subject": "[PATCH v3 3/5] bus/cdx: add support for MSI", "Date": "Fri, 21 Apr 2023 20:24:04 +0530", "Message-ID": "<20230421145406.12831-4-nipun.gupta@amd.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20230421145406.12831-1-nipun.gupta@amd.com>", "References": "<20230124140746.594066-1-nipun.gupta@amd.com>\n <20230421145406.12831-1-nipun.gupta@amd.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BN8NAM11FT052:EE_|SA0PR12MB7001:EE_", "X-MS-Office365-Filtering-Correlation-Id": "955b9ed5-b815-49f7-a5d9-08db427851c8", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n iU9Q1feOmu28TEI/OdUtTA4UNb50FO/3pUHN+4al69En3rMLuhv6Fbwyvt0PlFsundIofqBRTX/CgRzV6XtpvPEQqj/TJJqb8793KUNZyuhWAlgrcYCDR4vNkz1XtolrEuV43zmPAZojF4P402z71btTpvhywLtsb6OjO7NqyAmPh9LqhLV7O+LVEy8FrnZcKShoOe0ul4VZO61EaAJiVCHmKsBcykce2YBz9QlSqZ75eDJUS30vNdN+i3K9q6zEdbcVjzcGQqe8Un+X0YqL79SqNBUBDhJY43PBvh3P5yWYFszMUxJUK8LcU4ZQ2YG0IwwwKv4Gk9+SN+7Dta9OJjbPdYjKJU3m3tfoqFtSOvF63QjFIdH2ge6P8x/MFr0HIlqsOuGZTLnL7PPinTCzzwPhw0gUn0FYDV2U9eD5MbmC5GDBEplUg6xM3XRF8vBqrHKWhl7sU/DDEQPVJW2FBGB/sLyNyTM9mts72JJiDT1lXNCuBhPPU/UfSqckJjUb/J8QkQjgY6EcENZGG/v05aCzS/3BQHN6kJWaywuReIDP7q04jT49gq3ESObwvhuXBsPc75iKeLLHYhZRFZeGONujzqIsJzVJat3wa7uKr66x7WrD55EydbgHcP0bDiQYyiGEeTepVbcnqKsyYPOhl0GC7GDEGzmwmwIAe6nD0J4sGe2irG8GX4+ywMA2XUqZUwB3sz66V/hZmoFB4urw4ae5m6PYnL7SVTnJkAPFjuI=", "X-Forefront-Antispam-Report": "CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE;\n SFS:(13230028)(4636009)(376002)(39860400002)(346002)(136003)(396003)(451199021)(40470700004)(36840700001)(46966006)(81166007)(356005)(36860700001)(47076005)(82740400003)(426003)(83380400001)(336012)(2906002)(86362001)(2616005)(82310400005)(26005)(186003)(1076003)(44832011)(30864003)(70206006)(316002)(40480700001)(6666004)(40460700003)(478600001)(70586007)(36756003)(4326008)(6636002)(5660300002)(54906003)(110136005)(8936002)(41300700001)(8676002)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "amd.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "21 Apr 2023 14:54:33.8357 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 955b9ed5-b815-49f7-a5d9-08db427851c8", "X-MS-Exchange-CrossTenant-Id": "3dd8961f-e488-4e60-8e11-a82d994e183d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17];\n Helo=[SATLEXMB04.amd.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT052.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SA0PR12MB7001", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "MSI's are exposed to the devices using VFIO (vfio-cdx). This\npatch uses the same to add support for MSI for the devices on\nthe cdx bus.\n\nA couple of API's have been introduced in the EAL interrupt\nframework:\n- rte_intr_irq_count_set: This API is used to set the total\n interrupts on the interrupt handle. This would be provided\n by VFIO (irq.count) for VFIO enabled devices.\n- rte_intr_irq_count_get: This API returns the total number\n interrupts which were set.\n\nSigned-off-by: Nipun Gupta <nipun.gupta@amd.com>\n---\n drivers/bus/cdx/bus_cdx_driver.h | 25 ++++\n drivers/bus/cdx/cdx.c | 11 ++\n drivers/bus/cdx/cdx_vfio.c | 182 ++++++++++++++++++++++++-\n drivers/bus/cdx/version.map | 2 +\n lib/eal/common/eal_common_interrupts.c | 21 +++\n lib/eal/common/eal_interrupts.h | 1 +\n lib/eal/include/rte_interrupts.h | 32 +++++\n lib/eal/version.map | 2 +\n 8 files changed, 274 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/bus/cdx/bus_cdx_driver.h b/drivers/bus/cdx/bus_cdx_driver.h\nindex 7edcb019eb..fdeaf46664 100644\n--- a/drivers/bus/cdx/bus_cdx_driver.h\n+++ b/drivers/bus/cdx/bus_cdx_driver.h\n@@ -72,6 +72,7 @@ struct rte_cdx_device {\n \tstruct rte_cdx_id id;\t\t\t/**< CDX ID. */\n \tstruct rte_mem_resource mem_resource[CDX_MAX_RESOURCE];\n \t\t\t\t\t\t/**< CDX Memory Resource */\n+\tstruct rte_intr_handle *intr_handle;\t/**< Interrupt handle */\n };\n \n /**\n@@ -173,6 +174,30 @@ void rte_cdx_unmap_device(struct rte_cdx_device *dev);\n __rte_internal\n void rte_cdx_register(struct rte_cdx_driver *driver);\n \n+/**\n+ * Enables VFIO Interrupts for CDX bus devices.\n+ *\n+ * @param intr_handle\n+ * Pointer to the interrupt handle.\n+ *\n+ * @return\n+ * 0 on success, -1 on error.\n+ */\n+__rte_internal\n+int rte_cdx_vfio_intr_enable(const struct rte_intr_handle *intr_handle);\n+\n+/**\n+ * Disable VFIO Interrupts for CDX bus devices.\n+ *\n+ * @param intr_handle\n+ * Pointer to the interrupt handle.\n+ *\n+ * @return\n+ * 0 on success, -1 on error.\n+ */\n+__rte_internal\n+int rte_cdx_vfio_intr_disable(const struct rte_intr_handle *intr_handle);\n+\n /**\n * Helper for CDX device registration from driver (eth, crypto, raw) instance\n */\ndiff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c\nindex 8cc273336e..6c9ceaaf7f 100644\n--- a/drivers/bus/cdx/cdx.c\n+++ b/drivers/bus/cdx/cdx.c\n@@ -204,6 +204,15 @@ cdx_scan_one(const char *dirname, const char *dev_name)\n \t\tgoto err;\n \t}\n \n+\t/* Allocate interrupt instance for cdx device */\n+\tdev->intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\tif (dev->intr_handle == NULL) {\n+\t\tCDX_BUS_ERR(\"Failed to create interrupt instance for %s\\n\",\n+\t\t\tdev->device.name);\n+\t\treturn -ENOMEM;\n+\t}\n+\n \t/*\n \t * Check if device is bound to 'vfio-cdx' driver, so that user-space\n \t * can gracefully access the device.\n@@ -394,6 +403,8 @@ cdx_probe_one_driver(struct rte_cdx_driver *dr,\n \treturn ret;\n \n error_probe:\n+\trte_intr_instance_free(dev->intr_handle);\n+\tdev->intr_handle = NULL;\n \tcdx_vfio_unmap_resource(dev);\n error_map_device:\n \treturn ret;\ndiff --git a/drivers/bus/cdx/cdx_vfio.c b/drivers/bus/cdx/cdx_vfio.c\nindex ae11f589b3..1422b98503 100644\n--- a/drivers/bus/cdx/cdx_vfio.c\n+++ b/drivers/bus/cdx/cdx_vfio.c\n@@ -60,6 +60,10 @@ struct mapped_cdx_resource {\n /** mapped cdx device list */\n TAILQ_HEAD(mapped_cdx_res_list, mapped_cdx_resource);\n \n+/* irq set buffer length for MSI interrupts */\n+#define MSI_IRQ_SET_BUF_LEN (sizeof(struct vfio_irq_set) + \\\n+\t\t\t sizeof(int) * (RTE_MAX_RXTX_INTR_VEC_ID + 1))\n+\n static struct rte_tailq_elem cdx_vfio_tailq = {\n \t.name = \"VFIO_CDX_RESOURCE_LIST\",\n };\n@@ -104,6 +108,27 @@ cdx_vfio_unmap_resource_primary(struct rte_cdx_device *dev)\n \tchar cdx_addr[PATH_MAX] = {0};\n \tstruct mapped_cdx_resource *vfio_res = NULL;\n \tstruct mapped_cdx_res_list *vfio_res_list;\n+\tint ret, vfio_dev_fd;\n+\n+\tif (rte_intr_fd_get(dev->intr_handle) < 0)\n+\t\treturn -1;\n+\n+\tif (close(rte_intr_fd_get(dev->intr_handle)) < 0) {\n+\t\tCDX_BUS_ERR(\"Error when closing eventfd file descriptor for %s\",\n+\t\t\tdev->device.name);\n+\t\treturn -1;\n+\t}\n+\n+\tvfio_dev_fd = rte_intr_dev_fd_get(dev->intr_handle);\n+\tif (vfio_dev_fd < 0)\n+\t\treturn -1;\n+\n+\tret = rte_vfio_release_device(rte_cdx_get_sysfs_path(), dev->device.name,\n+\t\t\t\t vfio_dev_fd);\n+\tif (ret < 0) {\n+\t\tCDX_BUS_ERR(\"Cannot release VFIO device\");\n+\t\treturn ret;\n+\t}\n \n \tvfio_res_list =\n \t\tRTE_TAILQ_CAST(cdx_vfio_tailq.head, mapped_cdx_res_list);\n@@ -126,6 +151,18 @@ cdx_vfio_unmap_resource_secondary(struct rte_cdx_device *dev)\n {\n \tstruct mapped_cdx_resource *vfio_res = NULL;\n \tstruct mapped_cdx_res_list *vfio_res_list;\n+\tint ret, vfio_dev_fd;\n+\n+\tvfio_dev_fd = rte_intr_dev_fd_get(dev->intr_handle);\n+\tif (vfio_dev_fd < 0)\n+\t\treturn -1;\n+\n+\tret = rte_vfio_release_device(rte_cdx_get_sysfs_path(), dev->device.name,\n+\t\t\t\t vfio_dev_fd);\n+\tif (ret < 0) {\n+\t\tCDX_BUS_ERR(\"Cannot release VFIO device\");\n+\t\treturn ret;\n+\t}\n \n \tvfio_res_list =\n \t\tRTE_TAILQ_CAST(cdx_vfio_tailq.head, mapped_cdx_res_list);\n@@ -150,9 +187,80 @@ cdx_vfio_unmap_resource(struct rte_cdx_device *dev)\n \t\treturn cdx_vfio_unmap_resource_secondary(dev);\n }\n \n+/* set up interrupt support (but not enable interrupts) */\n static int\n-cdx_rte_vfio_setup_device(int vfio_dev_fd)\n+cdx_vfio_setup_interrupts(struct rte_cdx_device *dev, int vfio_dev_fd,\n+\t\tint num_irqs)\n {\n+\tint i, ret;\n+\n+\tif (num_irqs == 0)\n+\t\treturn 0;\n+\n+\t/* start from MSI interrupt type */\n+\tfor (i = 0; i < num_irqs; i++) {\n+\t\tstruct vfio_irq_info irq = { .argsz = sizeof(irq) };\n+\t\tint fd = -1;\n+\n+\t\tirq.index = i;\n+\n+\t\tret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);\n+\t\tif (ret < 0) {\n+\t\t\tCDX_BUS_ERR(\"Cannot get VFIO IRQ info, error %i (%s)\",\n+\t\t\t\terrno, strerror(errno));\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\t/* if this vector cannot be used with eventfd, fail if we explicitly\n+\t\t * specified interrupt type, otherwise continue\n+\t\t */\n+\t\tif ((irq.flags & VFIO_IRQ_INFO_EVENTFD) == 0)\n+\t\t\tcontinue;\n+\n+\t\tif (rte_intr_irq_count_set(dev->intr_handle, irq.count))\n+\t\t\treturn -1;\n+\n+\t\t/* Reallocate the efds and elist fields of intr_handle based\n+\t\t * on CDX device MSI size.\n+\t\t */\n+\t\tif ((uint32_t)rte_intr_nb_intr_get(dev->intr_handle) < irq.count &&\n+\t\t\t\trte_intr_event_list_update(dev->intr_handle, irq.count))\n+\t\t\treturn -1;\n+\n+\t\t/* set up an eventfd for interrupts */\n+\t\tfd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);\n+\t\tif (fd < 0) {\n+\t\t\tCDX_BUS_ERR(\"Cannot set up eventfd, error %i (%s)\",\n+\t\t\t\terrno, strerror(errno));\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\tif (rte_intr_fd_set(dev->intr_handle, fd))\n+\t\t\treturn -1;\n+\n+\t\t/* DPDK CDX bus currently supports only MSI-X */\n+\t\tif (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_VFIO_MSIX))\n+\t\t\treturn -1;\n+\n+\t\tif (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))\n+\t\t\treturn -1;\n+\n+\t\treturn 0;\n+\t}\n+\n+\t/* if we're here, we haven't found a suitable interrupt vector */\n+\treturn -1;\n+}\n+\n+static int\n+cdx_vfio_setup_device(struct rte_cdx_device *dev, int vfio_dev_fd,\n+\t\tint num_irqs)\n+{\n+\tif (cdx_vfio_setup_interrupts(dev, vfio_dev_fd, num_irqs) != 0) {\n+\t\tCDX_BUS_ERR(\"Error setting up interrupts!\");\n+\t\treturn -1;\n+\t}\n+\n \t/*\n \t * Reset the device. If the device is not capable of resetting,\n \t * then it updates errno as EINVAL.\n@@ -288,6 +396,9 @@ cdx_vfio_map_resource_primary(struct rte_cdx_device *dev)\n \tstruct cdx_map *maps;\n \tint vfio_dev_fd, i, ret;\n \n+\tif (rte_intr_fd_set(dev->intr_handle, -1))\n+\t\treturn -1;\n+\n \tret = rte_vfio_setup_device(rte_cdx_get_sysfs_path(), dev_name,\n \t\t\t\t &vfio_dev_fd, &device_info);\n \tif (ret)\n@@ -353,7 +464,7 @@ cdx_vfio_map_resource_primary(struct rte_cdx_device *dev)\n \t\tfree(reg);\n \t}\n \n-\tif (cdx_rte_vfio_setup_device(vfio_dev_fd) < 0) {\n+\tif (cdx_vfio_setup_device(dev, vfio_dev_fd, device_info.num_irqs) < 0) {\n \t\tCDX_BUS_ERR(\"%s setup device failed\", dev_name);\n \t\tgoto err_vfio_res;\n \t}\n@@ -383,6 +494,9 @@ cdx_vfio_map_resource_secondary(struct rte_cdx_device *dev)\n \tconst char *dev_name = dev->device.name;\n \tstruct cdx_map *maps;\n \n+\tif (rte_intr_fd_set(dev->intr_handle, -1))\n+\t\treturn -1;\n+\n \t/* if we're in a secondary process, just find our tailq entry */\n \tTAILQ_FOREACH(vfio_res, vfio_res_list, next) {\n \t\tif (strcmp(vfio_res->name, dev_name))\n@@ -416,6 +530,10 @@ cdx_vfio_map_resource_secondary(struct rte_cdx_device *dev)\n \t\tdev->mem_resource[i].len = maps[i].size;\n \t}\n \n+\t/* we need save vfio_dev_fd, so it can be used during release */\n+\tif (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))\n+\t\tgoto err_vfio_dev_fd;\n+\n \treturn 0;\n err_vfio_dev_fd:\n \trte_vfio_release_device(rte_cdx_get_sysfs_path(),\n@@ -435,3 +553,63 @@ cdx_vfio_map_resource(struct rte_cdx_device *dev)\n \telse\n \t\treturn cdx_vfio_map_resource_secondary(dev);\n }\n+\n+int\n+rte_cdx_vfio_intr_enable(const struct rte_intr_handle *intr_handle)\n+{\n+\tchar irq_set_buf[MSI_IRQ_SET_BUF_LEN];\n+\tstruct vfio_irq_set *irq_set;\n+\tint *fd_ptr, vfio_dev_fd, i;\n+\tint ret;\n+\n+\tirq_set = (struct vfio_irq_set *) irq_set_buf;\n+\tirq_set->count = rte_intr_irq_count_get(intr_handle);\n+\tirq_set->argsz = sizeof(struct vfio_irq_set) +\n+\t\t\t (sizeof(int) * irq_set->count);\n+\n+\tirq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;\n+\tirq_set->index = 0;\n+\tirq_set->start = 0;\n+\tfd_ptr = (int *) &irq_set->data;\n+\n+\tfor (i = 0; i < rte_intr_nb_efd_get(intr_handle); i++)\n+\t\tfd_ptr[i] = rte_intr_efds_index_get(intr_handle, i);\n+\n+\tvfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n+\tret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\n+\tif (ret) {\n+\t\tCDX_BUS_ERR(\"Error enabling MSI interrupts for fd %d\",\n+\t\t\trte_intr_fd_get(intr_handle));\n+\t\treturn -1;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* disable MSI interrupts */\n+int\n+rte_cdx_vfio_intr_disable(const struct rte_intr_handle *intr_handle)\n+{\n+\tstruct vfio_irq_set *irq_set;\n+\tchar irq_set_buf[MSI_IRQ_SET_BUF_LEN];\n+\tint len, ret, vfio_dev_fd;\n+\n+\tlen = sizeof(struct vfio_irq_set);\n+\n+\tirq_set = (struct vfio_irq_set *) irq_set_buf;\n+\tirq_set->argsz = len;\n+\tirq_set->count = 0;\n+\tirq_set->flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER;\n+\tirq_set->index = 0;\n+\tirq_set->start = 0;\n+\n+\tvfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n+\tret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\n+\tif (ret)\n+\t\tCDX_BUS_ERR(\"Error disabling MSI interrupts for fd %d\",\n+\t\t\trte_intr_fd_get(intr_handle));\n+\n+\treturn ret;\n+}\ndiff --git a/drivers/bus/cdx/version.map b/drivers/bus/cdx/version.map\nindex 957fcab978..2f3d484ebd 100644\n--- a/drivers/bus/cdx/version.map\n+++ b/drivers/bus/cdx/version.map\n@@ -6,6 +6,8 @@ INTERNAL {\n \trte_cdx_register;\n \trte_cdx_unmap_device;\n \trte_cdx_unregister;\n+\trte_cdx_vfio_intr_disable;\n+\trte_cdx_vfio_intr_enable;\n \n \tlocal: *;\n };\ndiff --git a/lib/eal/common/eal_common_interrupts.c b/lib/eal/common/eal_common_interrupts.c\nindex 97b64fed58..a0167d9ad4 100644\n--- a/lib/eal/common/eal_common_interrupts.c\n+++ b/lib/eal/common/eal_common_interrupts.c\n@@ -398,6 +398,27 @@ int rte_intr_elist_index_set(struct rte_intr_handle *intr_handle,\n \treturn -rte_errno;\n }\n \n+int rte_intr_irq_count_set(struct rte_intr_handle *intr_handle,\n+\tint irq_count)\n+{\n+\tCHECK_VALID_INTR_HANDLE(intr_handle);\n+\n+\tintr_handle->irq_count = irq_count;\n+\n+\treturn 0;\n+fail:\n+\treturn -rte_errno;\n+}\n+\n+int rte_intr_irq_count_get(const struct rte_intr_handle *intr_handle)\n+{\n+\tCHECK_VALID_INTR_HANDLE(intr_handle);\n+\n+\treturn intr_handle->irq_count;\n+fail:\n+\treturn -rte_errno;\n+}\n+\n int rte_intr_vec_list_alloc(struct rte_intr_handle *intr_handle,\n \tconst char *name, int size)\n {\ndiff --git a/lib/eal/common/eal_interrupts.h b/lib/eal/common/eal_interrupts.h\nindex 482781b862..237f471a76 100644\n--- a/lib/eal/common/eal_interrupts.h\n+++ b/lib/eal/common/eal_interrupts.h\n@@ -16,6 +16,7 @@ struct rte_intr_handle {\n \t};\n \tuint32_t alloc_flags;\t/**< flags passed at allocation */\n \tenum rte_intr_handle_type type; /**< handle type */\n+\tuint32_t irq_count;\t\t/**< IRQ count provided via VFIO */\n \tuint32_t max_intr; /**< max interrupt requested */\n \tuint32_t nb_efd; /**< number of available efd(event fd) */\n \tuint8_t efd_counter_size; /**< size of efd counter, used for vdev */\ndiff --git a/lib/eal/include/rte_interrupts.h b/lib/eal/include/rte_interrupts.h\nindex 487e3c8875..bc477a483f 100644\n--- a/lib/eal/include/rte_interrupts.h\n+++ b/lib/eal/include/rte_interrupts.h\n@@ -506,6 +506,38 @@ __rte_internal\n int\n rte_intr_max_intr_get(const struct rte_intr_handle *intr_handle);\n \n+/**\n+ * @internal\n+ * Set the irq count field of interrupt handle with user\n+ * provided irq count value.\n+ *\n+ * @param intr_handle\n+ * pointer to the interrupt handle.\n+ * @param irq_count\n+ * IRQ count\n+ *\n+ * @return\n+ * - On success, zero.\n+ * - On failure, a negative value and rte_errno is set.\n+ */\n+__rte_internal\n+int\n+rte_intr_irq_count_set(struct rte_intr_handle *intr_handle, int irq_count);\n+\n+/**\n+ * @internal\n+ * Returns the irq count field of the given interrupt handle instance.\n+ *\n+ * @param intr_handle\n+ * pointer to the interrupt handle.\n+ *\n+ * @return\n+ * - On success, ir count.\n+ * - On failure, a negative value and rte_errno is set.\n+ */\n+__rte_internal\n+int rte_intr_irq_count_get(const struct rte_intr_handle *intr_handle);\n+\n /**\n * @internal\n * Set the number of event fd field of interrupt handle\ndiff --git a/lib/eal/version.map b/lib/eal/version.map\nindex 6d6978f108..14bf7ade77 100644\n--- a/lib/eal/version.map\n+++ b/lib/eal/version.map\n@@ -458,6 +458,8 @@ INTERNAL {\n \trte_intr_instance_dup;\n \trte_intr_instance_windows_handle_get;\n \trte_intr_instance_windows_handle_set;\n+\trte_intr_irq_count_get;\n+\trte_intr_irq_count_set;\n \trte_intr_max_intr_get;\n \trte_intr_max_intr_set;\n \trte_intr_nb_efd_get;\n", "prefixes": [ "v3", "3/5" ] }