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GET /api/patches/126586/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 126586,
    "url": "http://patchwork.dpdk.org/api/patches/126586/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230427062001.478032-20-qiming.yang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230427062001.478032-20-qiming.yang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230427062001.478032-20-qiming.yang@intel.com",
    "date": "2023-04-27T06:19:50",
    "name": "[19/30] net/ice/base: reduce time to read Option ROM CIVD",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "0356f9a7379f37e31f4b0aceeeb1643c04d5ffea",
    "submitter": {
        "id": 522,
        "url": "http://patchwork.dpdk.org/api/people/522/?format=api",
        "name": "Qiming Yang",
        "email": "qiming.yang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patchwork.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230427062001.478032-20-qiming.yang@intel.com/mbox/",
    "series": [
        {
            "id": 27885,
            "url": "http://patchwork.dpdk.org/api/series/27885/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=27885",
            "date": "2023-04-27T06:19:31",
            "name": "net/ice/base: share code update",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/27885/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/126586/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/126586/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E16F542A08;\n\tThu, 27 Apr 2023 08:40:05 +0200 (CEST)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 12DA642FC2;\n\tThu, 27 Apr 2023 08:38:22 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id 8516142FA8\n for <dev@dpdk.org>; Thu, 27 Apr 2023 08:38:19 +0200 (CEST)",
            "from fmsmga002.fm.intel.com ([10.253.24.26])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 26 Apr 2023 23:38:19 -0700",
            "from dpdk-qiming3.sh.intel.com ([10.67.111.4])\n by fmsmga002.fm.intel.com with ESMTP; 26 Apr 2023 23:38:16 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1682577499; x=1714113499;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=qo+HCzZdJd/9Rb2tgiqXwCZheu0EHzp0h6sVwkR0lnQ=;\n b=el053WIRnC/ftzeIu9Cjpz1J3JFKqOBxBEAx1RKYJdKppNDElA6CK8e/\n JsMQzVekow+sMQX4c6iFxiECxcNKKC58jXa+PQXjipDLFDxVamv0DARBC\n WsuZCsUOS4SexZpzIotfHpAkSmQRd7uCgkaxKySBUdhuFh+ueiNPIMH4o\n pHzqC4PqQuKmIp17kR/GIfQPXVWIBddoH/wWtTjMOPHS5ul1zIf3FPMe+\n Y7X9ctUO0wR/KFSk9UT2SNirHkFKjiD82REYg8+hq5pwr7FuxIRxXYh0q\n 7coUAPOqeuTYZDNO3pBDlpRrrPMcZsNc1J5BoPB9OgWqIxtm+kFqLWkGW w==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6600,9927,10692\"; a=\"375324361\"",
            "E=Sophos;i=\"5.99,230,1677571200\"; d=\"scan'208\";a=\"375324361\"",
            "E=McAfee;i=\"6600,9927,10692\"; a=\"805845841\"",
            "E=Sophos;i=\"5.99,230,1677571200\"; d=\"scan'208\";a=\"805845841\""
        ],
        "X-ExtLoop1": "1",
        "From": "Qiming Yang <qiming.yang@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "qi.z.zhang@intel.com, Qiming Yang <qiming.yang@intel.com>,\n Jacob Keller <jacob.e.keller@intel.com>",
        "Subject": "[PATCH 19/30] net/ice/base: reduce time to read Option ROM CIVD",
        "Date": "Thu, 27 Apr 2023 06:19:50 +0000",
        "Message-Id": "<20230427062001.478032-20-qiming.yang@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20230427062001.478032-1-qiming.yang@intel.com>",
        "References": "<20230427062001.478032-1-qiming.yang@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Re-write ice_get_orom_civd_data to allocate memory to store the\nOption ROM data. Copy the entire OptionROM contents at once using\nice_read_flash_module. Finally, use this memory copy to scan for the\n'$CIV' section.\n\nThis change significantly reduces the time to read the Option ROM CIVD\nsection from ~10 seconds down to ~1 second. This has a significant\nimpact on the total time to complete a driver rebuild or probe.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_nvm.c | 54 +++++++++++++++++++++++++---------\n 1 file changed, 40 insertions(+), 14 deletions(-)",
    "diff": "diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c\nindex 6ab359af33..ba855533ec 100644\n--- a/drivers/net/ice/base/ice_nvm.c\n+++ b/drivers/net/ice/base/ice_nvm.c\n@@ -190,12 +190,14 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)\n enum ice_status\n ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)\n {\n+\tu32 timeout = ICE_NVM_TIMEOUT;\n+\n \tice_debug(hw, ICE_DBG_TRACE, \"%s\\n\", __func__);\n \n \tif (hw->flash.blank_nvm_mode)\n \t\treturn ICE_SUCCESS;\n \n-\treturn ice_acquire_res(hw, ICE_NVM_RES_ID, access, ICE_NVM_TIMEOUT);\n+\treturn ice_acquire_res(hw, ICE_NVM_RES_ID, access, timeout);\n }\n \n /**\n@@ -724,43 +726,67 @@ static enum ice_status\n ice_get_orom_civd_data(struct ice_hw *hw, enum ice_bank_select bank,\n \t\t       struct ice_orom_civd_info *civd)\n {\n-\tstruct ice_orom_civd_info tmp;\n+\tu8 *orom_data;\n+\tenum ice_status status;\n \tu32 offset;\n \n \t/* The CIVD section is located in the Option ROM aligned to 512 bytes.\n \t * The first 4 bytes must contain the ASCII characters \"$CIV\".\n \t * A simple modulo 256 sum of all of the bytes of the structure must\n \t * equal 0.\n+\t *\n+\t * The exact location is unknown and varies between images but is\n+\t * usually somewhere in the middle of the bank. We need to scan the\n+\t * Option ROM bank to locate it.\n+\t *\n+\t * It's significantly faster to read the entire Option ROM up front\n+\t * using the maximum page size, than to read each possible location\n+\t * with a separate firmware command.\n \t */\n+\torom_data = (u8 *)ice_calloc(hw, hw->flash.banks.orom_size, sizeof(u8));\n+\tif (!orom_data)\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\n+\tstatus = ice_read_flash_module(hw, bank, ICE_SR_1ST_OROM_BANK_PTR, 0,\n+\t\t\t\t       orom_data, hw->flash.banks.orom_size);\n+\tif (status) {\n+\t\tice_debug(hw, ICE_DBG_NVM, \"Unable to read Option ROM data\\n\");\n+\t\treturn status;\n+\t}\n+\n+\t/* Scan the memory buffer to locate the CIVD data section */\n \tfor (offset = 0; (offset + 512) <= hw->flash.banks.orom_size; offset += 512) {\n-\t\tenum ice_status status;\n+\t\tstruct ice_orom_civd_info *tmp;\n \t\tu8 sum = 0, i;\n \n-\t\tstatus = ice_read_flash_module(hw, bank, ICE_SR_1ST_OROM_BANK_PTR,\n-\t\t\t\t\t       offset, (u8 *)&tmp, sizeof(tmp));\n-\t\tif (status) {\n-\t\t\tice_debug(hw, ICE_DBG_NVM, \"Unable to read Option ROM CIVD data\\n\");\n-\t\t\treturn status;\n-\t\t}\n+\t\ttmp = (struct ice_orom_civd_info *)&orom_data[offset];\n \n \t\t/* Skip forward until we find a matching signature */\n-\t\tif (memcmp(\"$CIV\", tmp.signature, sizeof(tmp.signature)) != 0)\n+\t\tif (memcmp(\"$CIV\", tmp->signature, sizeof(tmp->signature)) != 0)\n \t\t\tcontinue;\n \n+\t\tice_debug(hw, ICE_DBG_NVM, \"Found CIVD section at offset %u\\n\",\n+\t\t\t  offset);\n+\n \t\t/* Verify that the simple checksum is zero */\n-\t\tfor (i = 0; i < sizeof(tmp); i++)\n-\t\t\tsum += ((u8 *)&tmp)[i];\n+\t\tfor (i = 0; i < sizeof(*tmp); i++)\n+\t\t\tsum += ((u8 *)tmp)[i];\n \n \t\tif (sum) {\n \t\t\tice_debug(hw, ICE_DBG_NVM, \"Found CIVD data with invalid checksum of %u\\n\",\n \t\t\t\t  sum);\n-\t\t\treturn ICE_ERR_NVM;\n+\t\t\tgoto err_invalid_checksum;\n \t\t}\n \n-\t\t*civd = tmp;\n+\t\t*civd = *tmp;\n+\t\tice_free(hw, orom_data);\n \t\treturn ICE_SUCCESS;\n \t}\n \n+\tice_debug(hw, ICE_DBG_NVM, \"Unable to locate CIVD data within the Option ROM\\n\");\n+\n+err_invalid_checksum:\n+\tice_free(hw, orom_data);\n \treturn ICE_ERR_NVM;\n }\n \n",
    "prefixes": [
        "19/30"
    ]
}