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GET /api/patches/127012/?format=api
{ "id": 127012, "url": "http://patchwork.dpdk.org/api/patches/127012/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230518151638.1207021-19-qiming.yang@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230518151638.1207021-19-qiming.yang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230518151638.1207021-19-qiming.yang@intel.com", "date": "2023-05-18T15:16:36", "name": "[v2,18/20] net/ice/base: fix static analyzer bug", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "4c8ed3a9f7f47f31cc877bcfd667ad540b4b1ac1", "submitter": { "id": 522, "url": "http://patchwork.dpdk.org/api/people/522/?format=api", "name": "Qiming Yang", "email": "qiming.yang@intel.com" }, "delegate": { "id": 1540, "url": "http://patchwork.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230518151638.1207021-19-qiming.yang@intel.com/mbox/", "series": [ { "id": 28063, "url": "http://patchwork.dpdk.org/api/series/28063/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=28063", "date": "2023-05-18T15:16:18", "name": "net/ice/base: code update", "version": 2, "mbox": "http://patchwork.dpdk.org/series/28063/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/127012/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/127012/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7765342AF1;\n\tThu, 18 May 2023 17:36:34 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A280342DB9;\n\tThu, 18 May 2023 17:34:49 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by mails.dpdk.org (Postfix) with ESMTP id 4DE5D42DAD\n for <dev@dpdk.org>; Thu, 18 May 2023 17:34:47 +0200 (CEST)", "from fmsmga007.fm.intel.com ([10.253.24.52])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 May 2023 08:34:46 -0700", "from dpdk-qiming3.sh.intel.com ([10.67.111.4])\n by fmsmga007.fm.intel.com with ESMTP; 18 May 2023 08:34:45 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1684424088; x=1715960088;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=HghU0ET1o7wgN6VtGDNkwkZAz19S08X2oOFz4NSDY5w=;\n b=Ndqz5ef3ip5VABfUmoCTjQKuAOGSwSg72RsOPdx2yze+mEnJH+n+BH1/\n CgxUaPck/z4Il2ahBU5PGPsu7mADNVFZjOSzQ60cuOVTbhY2FNIMtAXii\n NTFghqMNH9d2zuLEr+3coZsZFWrkNdwf6B5IoC/E2Ko/VzFUR0EACt9Za\n 2KrTzw3OusKJ5NhCEcbbtGseXNWML/iCPnHZML2YEs2tHiOoOMI5DTBGs\n H5DtgoCwuyUqx5/2b+SMXN/SlTGKkxkz0+4IODIbHRoYjZ/Hlncgxuhlv\n 0m6FSLiMbzrmDcYzCcL6Txm7JGRUOJBsjTRPvyif+fYjRia3ke3R/4qSu w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10714\"; a=\"341527799\"", "E=Sophos;i=\"5.99,285,1677571200\"; d=\"scan'208\";a=\"341527799\"", "E=McAfee;i=\"6600,9927,10714\"; a=\"705235257\"", "E=Sophos;i=\"5.99,285,1677571200\"; d=\"scan'208\";a=\"705235257\"" ], "X-ExtLoop1": "1", "From": "Qiming Yang <qiming.yang@intel.com>", "To": "dev@dpdk.org", "Cc": "qi.z.zhang@intel.com, Qiming Yang <qiming.yang@intel.com>,\n Vignesh Sridhar <vignesh.sridhar@intel.com>", "Subject": "[PATCH v2 18/20] net/ice/base: fix static analyzer bug", "Date": "Thu, 18 May 2023 15:16:36 +0000", "Message-Id": "<20230518151638.1207021-19-qiming.yang@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230518151638.1207021-1-qiming.yang@intel.com>", "References": "<20230427062001.478032-1-qiming.yang@intel.com>\n <20230518151638.1207021-1-qiming.yang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The default condition in the switch statement in\nice_sched_get_psm_clk_freq() is an unreachable code. The variable\nclk_src is restricted to values 0 to 3 with the bit mask and shift\nvalues set.\n\nFixes: 76ac9d771c97 (\"net/ice/base: read PSM clock frequency from register\")\nSigned-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>\nSigned-off-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_sched.c | 16 ++++++----------\n drivers/net/ice/base/ice_sched.h | 5 +++++\n 2 files changed, 11 insertions(+), 10 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c\nindex 83cd152388..f558eccb93 100644\n--- a/drivers/net/ice/base/ice_sched.c\n+++ b/drivers/net/ice/base/ice_sched.c\n@@ -1417,11 +1417,6 @@ void ice_sched_get_psm_clk_freq(struct ice_hw *hw)\n \tclk_src = (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >>\n \t\tGLGEN_CLKSTAT_SRC_PSM_CLK_SRC_S;\n \n-#define PSM_CLK_SRC_367_MHZ 0x0\n-#define PSM_CLK_SRC_416_MHZ 0x1\n-#define PSM_CLK_SRC_446_MHZ 0x2\n-#define PSM_CLK_SRC_390_MHZ 0x3\n-\n \tswitch (clk_src) {\n \tcase PSM_CLK_SRC_367_MHZ:\n \t\thw->psm_clk_freq = ICE_PSM_CLK_367MHZ_IN_HZ;\n@@ -1435,11 +1430,12 @@ void ice_sched_get_psm_clk_freq(struct ice_hw *hw)\n \tcase PSM_CLK_SRC_390_MHZ:\n \t\thw->psm_clk_freq = ICE_PSM_CLK_390MHZ_IN_HZ;\n \t\tbreak;\n-\tdefault:\n-\t\tice_debug(hw, ICE_DBG_SCHED, \"PSM clk_src unexpected %u\\n\",\n-\t\t\t clk_src);\n-\t\t/* fall back to a safe default */\n-\t\thw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;\n+\n+\t/* default condition is not required as clk_src is restricted\n+\t * to a 2-bit value from GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M mask.\n+\t * The above switch statements cover the possible values of\n+\t * this variable.\n+\t */\n \t}\n }\n \ndiff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h\nindex a71619ebf0..c54f5ca9a0 100644\n--- a/drivers/net/ice/base/ice_sched.h\n+++ b/drivers/net/ice/base/ice_sched.h\n@@ -38,6 +38,11 @@\n #define ICE_PSM_CLK_446MHZ_IN_HZ 446428571\n #define ICE_PSM_CLK_390MHZ_IN_HZ 390625000\n \n+#define PSM_CLK_SRC_367_MHZ 0x0\n+#define PSM_CLK_SRC_416_MHZ 0x1\n+#define PSM_CLK_SRC_446_MHZ 0x2\n+#define PSM_CLK_SRC_390_MHZ 0x3\n+\n struct rl_profile_params {\n \tu32 bw;\t\t\t/* in Kbps */\n \tu16 rl_multiplier;\n", "prefixes": [ "v2", "18/20" ] }