Patch Detail

HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 128115,
    "url": "http://patchwork.dpdk.org/api/patches/128115/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230605090641.36525-14-beilei.xing@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230605090641.36525-14-beilei.xing@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230605090641.36525-14-beilei.xing@intel.com",
    "date": "2023-06-05T09:06:40",
    "name": "[v9,13/14] net/cpfl: support hairpin bind/unbind",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "69e17ad58da8f24c22e2d1ce7aa86131351db191",
    "submitter": {
        "id": 410,
        "url": "http://patchwork.dpdk.org/api/people/410/?format=api",
        "name": "Xing, Beilei",
        "email": "beilei.xing@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patchwork.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230605090641.36525-14-beilei.xing@intel.com/mbox/",
    "series": [
        {
            "id": 28351,
            "url": "http://patchwork.dpdk.org/api/series/28351/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=28351",
            "date": "2023-06-05T09:06:27",
            "name": "net/cpfl: add hairpin queue support",
            "version": 9,
            "mbox": "http://patchwork.dpdk.org/series/28351/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/128115/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/128115/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 762F642C34;\n\tMon,  5 Jun 2023 11:33:29 +0200 (CEST)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5530842D8E;\n\tMon,  5 Jun 2023 11:32:20 +0200 (CEST)",
            "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by mails.dpdk.org (Postfix) with ESMTP id 0036A42D8E\n for <dev@dpdk.org>; Mon,  5 Jun 2023 11:32:17 +0200 (CEST)",
            "from orsmga001.jf.intel.com ([10.7.209.18])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 05 Jun 2023 02:32:17 -0700",
            "from dpdk-beileix-3.sh.intel.com ([10.67.110.253])\n by orsmga001.jf.intel.com with ESMTP; 05 Jun 2023 02:32:15 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1685957538; x=1717493538;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=tbPX5QCUAVQICW3yjcC1/fAv5MT9l0vyp+O49Ypm800=;\n b=CfnSu+YIQ9eT6qphfxWgJxcAwX5RHETTUHDG33kosz/FRZ3nHLd+YZZ7\n hw+qMFsyLgIKC6TGarJWFQR/cOz4gM2Uqz55IhBsqVWInx3FO7IDfDOey\n lCV+FH8y6ppjcXLGcflp3MjRo5MkPYqbUJsC0WMMamZi9CHPbwFVhgajo\n nWd9s1Y7DCcNDTTQVTqmdN/3Wqi+iIC2BcymNS9ps/01wk7XTtzpW9OHj\n 7rDoRhYMuWDKk7rX/OIozs+8SeqfDwMh82BAA1xujgB4UaW1oVi0rrKKW\n rbonnIgF0v2hDNOgcg34bw1yBqmOz/pcWl8whfYwLaNrqp4j/r2iujn+I A==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6600,9927,10731\"; a=\"355181134\"",
            "E=Sophos;i=\"6.00,217,1681196400\"; d=\"scan'208\";a=\"355181134\"",
            "E=McAfee;i=\"6600,9927,10731\"; a=\"741652214\"",
            "E=Sophos;i=\"6.00,217,1681196400\"; d=\"scan'208\";a=\"741652214\""
        ],
        "X-ExtLoop1": "1",
        "From": "beilei.xing@intel.com",
        "To": "jingjing.wu@intel.com",
        "Cc": "dev@dpdk.org, mingxia.liu@intel.com, Beilei Xing <beilei.xing@intel.com>,\n Xiao Wang <xiao.w.wang@intel.com>",
        "Subject": "[PATCH v9 13/14] net/cpfl: support hairpin bind/unbind",
        "Date": "Mon,  5 Jun 2023 09:06:40 +0000",
        "Message-Id": "<20230605090641.36525-14-beilei.xing@intel.com>",
        "X-Mailer": "git-send-email 2.26.2",
        "In-Reply-To": "<20230605090641.36525-1-beilei.xing@intel.com>",
        "References": "<20230605061724.88130-1-beilei.xing@intel.com>\n <20230605090641.36525-1-beilei.xing@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Beilei Xing <beilei.xing@intel.com>\n\nThis patch supports hairpin_bind/unbind ops.\n\nSigned-off-by: Xiao Wang <xiao.w.wang@intel.com>\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\n---\n drivers/net/cpfl/cpfl_ethdev.c | 137 +++++++++++++++++++++++++++++++++\n 1 file changed, 137 insertions(+)",
    "diff": "diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c\nindex 49d1b8b58b..ac97622a15 100644\n--- a/drivers/net/cpfl/cpfl_ethdev.c\n+++ b/drivers/net/cpfl/cpfl_ethdev.c\n@@ -1120,6 +1120,141 @@ cpfl_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,\n \treturn j;\n }\n \n+static int\n+cpfl_hairpin_bind(struct rte_eth_dev *dev, uint16_t rx_port)\n+{\n+\tstruct cpfl_vport *cpfl_tx_vport = dev->data->dev_private;\n+\tstruct idpf_vport *tx_vport = &cpfl_tx_vport->base;\n+\tstruct cpfl_vport *cpfl_rx_vport;\n+\tstruct cpfl_tx_queue *cpfl_txq;\n+\tstruct cpfl_rx_queue *cpfl_rxq;\n+\tstruct rte_eth_dev *peer_dev;\n+\tstruct idpf_vport *rx_vport;\n+\tint err = 0;\n+\tint i;\n+\n+\terr = cpfl_txq_hairpin_info_update(dev, rx_port);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Fail to update Tx hairpin queue info.\");\n+\t\treturn err;\n+\t}\n+\n+\t/* configure hairpin queues */\n+\tfor (i = cpfl_tx_vport->nb_data_txq; i < dev->data->nb_tx_queues; i++) {\n+\t\tcpfl_txq = dev->data->tx_queues[i];\n+\t\terr = cpfl_hairpin_txq_config(tx_vport, cpfl_txq);\n+\t\tif (err != 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Fail to configure hairpin Tx queue %u\", i);\n+\t\t\treturn err;\n+\t\t}\n+\t}\n+\n+\terr = cpfl_hairpin_tx_complq_config(cpfl_tx_vport);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Fail to config Tx completion queue\");\n+\t\treturn err;\n+\t}\n+\n+\tpeer_dev = &rte_eth_devices[rx_port];\n+\tcpfl_rx_vport = (struct cpfl_vport *)peer_dev->data->dev_private;\n+\trx_vport = &cpfl_rx_vport->base;\n+\tcpfl_rxq_hairpin_mz_bind(peer_dev);\n+\n+\terr = cpfl_hairpin_rx_bufq_config(cpfl_rx_vport);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Fail to config Rx buffer queue\");\n+\t\treturn err;\n+\t}\n+\n+\tfor (i = cpfl_rx_vport->nb_data_rxq; i < peer_dev->data->nb_rx_queues; i++) {\n+\t\tcpfl_rxq = peer_dev->data->rx_queues[i];\n+\t\terr = cpfl_hairpin_rxq_config(rx_vport, cpfl_rxq);\n+\t\tif (err != 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Fail to configure hairpin Rx queue %u\", i);\n+\t\t\treturn err;\n+\t\t}\n+\t\terr = cpfl_rx_queue_init(peer_dev, i);\n+\t\tif (err != 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Fail to init hairpin Rx queue %u\", i);\n+\t\t\treturn err;\n+\t\t}\n+\t}\n+\n+\t/* enable hairpin queues */\n+\tfor (i = cpfl_tx_vport->nb_data_txq; i < dev->data->nb_tx_queues; i++) {\n+\t\tcpfl_txq = dev->data->tx_queues[i];\n+\t\terr = cpfl_switch_hairpin_rxtx_queue(cpfl_tx_vport,\n+\t\t\t\t\t\t     i - cpfl_tx_vport->nb_data_txq,\n+\t\t\t\t\t\t     false, true);\n+\t\tif (err != 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Failed to switch hairpin TX queue %u on\",\n+\t\t\t\t    i);\n+\t\t\treturn err;\n+\t\t}\n+\t\tcpfl_txq->base.q_started = true;\n+\t}\n+\n+\terr = cpfl_switch_hairpin_complq(cpfl_tx_vport, true);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to switch hairpin Tx complq\");\n+\t\treturn err;\n+\t}\n+\n+\tfor (i = cpfl_rx_vport->nb_data_rxq; i < peer_dev->data->nb_rx_queues; i++) {\n+\t\tcpfl_rxq = peer_dev->data->rx_queues[i];\n+\t\terr = cpfl_switch_hairpin_rxtx_queue(cpfl_rx_vport,\n+\t\t\t\t\t\t     i - cpfl_rx_vport->nb_data_rxq,\n+\t\t\t\t\t\t     true, true);\n+\t\tif (err != 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Failed to switch hairpin RX queue %u on\",\n+\t\t\t\t    i);\n+\t\t}\n+\t\tcpfl_rxq->base.q_started = true;\n+\t}\n+\n+\terr = cpfl_switch_hairpin_bufq(cpfl_rx_vport, true);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to switch hairpin Rx buffer queue\");\n+\t\treturn err;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+cpfl_hairpin_unbind(struct rte_eth_dev *dev, uint16_t rx_port)\n+{\n+\tstruct cpfl_vport *cpfl_tx_vport = dev->data->dev_private;\n+\tstruct rte_eth_dev *peer_dev = &rte_eth_devices[rx_port];\n+\tstruct cpfl_vport *cpfl_rx_vport = peer_dev->data->dev_private;\n+\tstruct cpfl_tx_queue *cpfl_txq;\n+\tstruct cpfl_rx_queue *cpfl_rxq;\n+\tint i;\n+\n+\t/* disable hairpin queues */\n+\tfor (i = cpfl_tx_vport->nb_data_txq; i < dev->data->nb_tx_queues; i++) {\n+\t\tcpfl_txq = dev->data->tx_queues[i];\n+\t\tcpfl_switch_hairpin_rxtx_queue(cpfl_tx_vport,\n+\t\t\t\t\t       i - cpfl_tx_vport->nb_data_txq,\n+\t\t\t\t\t       false, false);\n+\t\tcpfl_txq->base.q_started = false;\n+\t}\n+\n+\tcpfl_switch_hairpin_complq(cpfl_tx_vport, false);\n+\n+\tfor (i = cpfl_rx_vport->nb_data_rxq; i < peer_dev->data->nb_rx_queues; i++) {\n+\t\tcpfl_rxq = peer_dev->data->rx_queues[i];\n+\t\tcpfl_switch_hairpin_rxtx_queue(cpfl_rx_vport,\n+\t\t\t\t\t       i - cpfl_rx_vport->nb_data_rxq,\n+\t\t\t\t\t       true, false);\n+\t\tcpfl_rxq->base.q_started = false;\n+\t}\n+\n+\tcpfl_switch_hairpin_bufq(cpfl_rx_vport, false);\n+\n+\treturn 0;\n+}\n+\n static const struct eth_dev_ops cpfl_eth_dev_ops = {\n \t.dev_configure\t\t\t= cpfl_dev_configure,\n \t.dev_close\t\t\t= cpfl_dev_close,\n@@ -1150,6 +1285,8 @@ static const struct eth_dev_ops cpfl_eth_dev_ops = {\n \t.rx_hairpin_queue_setup\t\t= cpfl_rx_hairpin_queue_setup,\n \t.tx_hairpin_queue_setup\t\t= cpfl_tx_hairpin_queue_setup,\n \t.hairpin_get_peer_ports         = cpfl_hairpin_get_peer_ports,\n+\t.hairpin_bind                   = cpfl_hairpin_bind,\n+\t.hairpin_unbind                 = cpfl_hairpin_unbind,\n };\n \n static int\n",
    "prefixes": [
        "v9",
        "13/14"
    ]
}