Patch Detail

HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 128290,
    "url": "http://patchwork.dpdk.org/api/patches/128290/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230607130245.8048-2-ivan.malov@arknetworks.am/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230607130245.8048-2-ivan.malov@arknetworks.am>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230607130245.8048-2-ivan.malov@arknetworks.am",
    "date": "2023-06-07T13:02:12",
    "name": "[v4,01/34] common/sfc_efx/base: update MCDI headers",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "2f18e13d52a4f5a4f7f6cc03030dc23da54f40a4",
    "submitter": {
        "id": 2962,
        "url": "http://patchwork.dpdk.org/api/people/2962/?format=api",
        "name": "Ivan Malov",
        "email": "ivan.malov@arknetworks.am"
    },
    "delegate": {
        "id": 319,
        "url": "http://patchwork.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230607130245.8048-2-ivan.malov@arknetworks.am/mbox/",
    "series": [
        {
            "id": 28390,
            "url": "http://patchwork.dpdk.org/api/series/28390/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=28390",
            "date": "2023-06-07T13:02:11",
            "name": "net/sfc: support HW conntrack assistance",
            "version": 4,
            "mbox": "http://patchwork.dpdk.org/series/28390/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/128290/comments/",
    "check": "warning",
    "checks": "http://patchwork.dpdk.org/api/patches/128290/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4221A42C4D;\n\tWed,  7 Jun 2023 15:02:53 +0200 (CEST)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D55CB410F9;\n\tWed,  7 Jun 2023 15:02:48 +0200 (CEST)",
            "from agw.arknetworks.am (agw.arknetworks.am [79.141.165.80])\n by mails.dpdk.org (Postfix) with ESMTP id F3B62410D7\n for <dev@dpdk.org>; Wed,  7 Jun 2023 15:02:46 +0200 (CEST)",
            "from localhost.localdomain (unknown [78.109.69.83])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest\n SHA256)\n (No client certificate requested)\n by agw.arknetworks.am (Postfix) with ESMTPSA id DF77FE1251;\n Wed,  7 Jun 2023 17:02:45 +0400 (+04)"
        ],
        "From": "Ivan Malov <ivan.malov@arknetworks.am>",
        "To": "dev@dpdk.org",
        "Cc": "Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Ferruh Yigit <ferruh.yigit@amd.com>,\n Denis Pryazhennikov <denis.pryazhennikov@arknetworks.am>,\n Andy Moreton <amoreton@xilinx.com>",
        "Subject": "[PATCH v4 01/34] common/sfc_efx/base: update MCDI headers",
        "Date": "Wed,  7 Jun 2023 17:02:12 +0400",
        "Message-Id": "<20230607130245.8048-2-ivan.malov@arknetworks.am>",
        "X-Mailer": "git-send-email 2.30.2",
        "In-Reply-To": "<20230607130245.8048-1-ivan.malov@arknetworks.am>",
        "References": "<20230601195538.8265-1-ivan.malov@arknetworks.am>\n <20230607130245.8048-1-ivan.malov@arknetworks.am>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Denis Pryazhennikov <denis.pryazhennikov@arknetworks.am>\n\nPickup new FW interface definitions.\n\nSigned-off-by: Denis Pryazhennikov <denis.pryazhennikov@arknetworks.am>\nReviewed-by: Ivan Malov <ivan.malov@arknetworks.am>\nReviewed-by: Andy Moreton <amoreton@xilinx.com>\n---\n drivers/common/sfc_efx/base/efx_regs_mcdi.h | 2557 ++++++++++++++++++-\n 1 file changed, 2467 insertions(+), 90 deletions(-)",
    "diff": "diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi.h b/drivers/common/sfc_efx/base/efx_regs_mcdi.h\nindex d1d8093601..76bd1bf4d9 100644\n--- a/drivers/common/sfc_efx/base/efx_regs_mcdi.h\n+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi.h\n@@ -5,7 +5,10 @@\n  */\n \n /*\n- * This file is automatically generated. DO NOT EDIT IT.\n+ * This file is automatically generated, but contains manual changes.\n+ * - replaced the autogenerated license header with BSD-3-Clause;\n+ * - used tabs for the indentation of MC_CMD_ERR_*.\n+ *\n  * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and\n  * rebuild this file with \"make mcdi_headers_v5\".\n  */\n@@ -81,19 +84,19 @@\n  *               |                      \\------- Error\n  *               \\------------------------------ Resync (always set)\n  *\n- * The client writes it's request into MC shared memory, and rings the\n- * doorbell. Each request is completed by either by the MC writting\n- * back into shared memory, or by writting out an event.\n+ * The client writes its request into MC shared memory, and rings the\n+ * doorbell. Each request is completed either by the MC writing\n+ * back into shared memory, or by writing out an event.\n  *\n  * All MCDI commands support completion by shared memory response. Each\n  * request may also contain additional data (accounted for by HEADER.LEN),\n- * and some response's may also contain additional data (again, accounted\n+ * and some responses may also contain additional data (again, accounted\n  * for by HEADER.LEN).\n  *\n  * Some MCDI commands support completion by event, in which any associated\n  * response data is included in the event.\n  *\n- * The protocol requires one response to be delivered for every request, a\n+ * The protocol requires one response to be delivered for every request; a\n  * request should not be sent unless the response for the previous request\n  * has been received (either by polling shared memory, or by receiving\n  * an event).\n@@ -339,7 +342,7 @@\n /* enum: The requesting client is not a function */\n #define\tMC_CMD_ERR_CLIENT_NOT_FN 0x100c\n /* enum: The requested operation might require the command to be passed between\n- * MCs, and thetransport doesn't support that. Should only ever been seen over\n+ * MCs, and the transport doesn't support that. Should only ever been seen over\n  * the UART.\n  */\n #define\tMC_CMD_ERR_TRANSPORT_NOPROXY 0x100d\n@@ -376,7 +379,7 @@\n  * sub-variant switching.\n  */\n #define\tMC_CMD_ERR_FILTERS_PRESENT 0x1014\n-/* enum: The clock whose frequency you've attempted to set set doesn't exist on\n+/* enum: The clock whose frequency you've attempted to set doesn't exist on\n  * this NIC\n  */\n #define\tMC_CMD_ERR_NO_CLOCK 0x1015\n@@ -658,12 +661,624 @@\n  * be allocated by different counter blocks, so e.g. AR counter 42 is different\n  * from CT counter 42. Generation counts are also type-specific. This value is\n  * also present in the header of streaming counter packets, in the IDENTIFIER\n- * field (see packetiser packet format definitions).\n+ * field (see packetiser packet format definitions). Also note that LACP\n+ * counter IDs are not allocated individually, instead the counter IDs are\n+ * directly tied to the LACP balance table indices. These in turn are allocated\n+ * in large contiguous blocks as a LAG config. Calling MAE_COUNTER_ALLOC/FREE\n+ * with an LACP counter type will return EPERM.\n  */\n /* enum: Action Rule counters - can be referenced in AR response. */\n #define\tMAE_COUNTER_TYPE_AR 0x0\n /* enum: Conntrack counters - can be referenced in CT response. */\n #define\tMAE_COUNTER_TYPE_CT 0x1\n+/* enum: Outer Rule counters - can be referenced in OR response. */\n+#define\tMAE_COUNTER_TYPE_OR 0x2\n+/* enum: LACP counters - linked to LACP balance table entries. */\n+#define\tMAE_COUNTER_TYPE_LACP 0x3\n+\n+/* MAE_COUNTER_ID enum: ID of allocated counter or counter list. */\n+/* enum: A counter ID that is guaranteed never to represent a real counter or\n+ * counter list.\n+ */\n+#define\tMAE_COUNTER_ID_NULL 0xffffffff\n+\n+/* TABLE_ID enum: Unique IDs for tables. The 32-bit ID values have been\n+ * structured with bits [31:24] reserved (0), [23:16] indicating which major\n+ * block the tables belongs to (0=VNIC TX, none currently; 1=MAE; 2=VNIC RX),\n+ * [15:8] a unique ID within the block, and [7:0] reserved for future\n+ * variations of the same table. (All of the tables currently defined within\n+ * the streaming engines are listed here, but this does not imply that they are\n+ * all supported - MC_CMD_TABLE_LIST returns the list of actually supported\n+ * tables.) The DPU offload engines' enumerators follow a deliberate pattern:\n+ * 0x01010000 + is_dpu_net * 0x10000 + is_wr_or_tx * 0x8000 + is_lite_pipe *\n+ * 0x1000 + oe_engine_type * 0x100 + oe_instance_within_pipe * 0x10\n+ */\n+/* enum: Outer_Rule_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_OUTER_RULE_TABLE 0x10000\n+/* enum: Outer_Rule_No_CT_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_OUTER_RULE_NO_CT_TABLE 0x10100\n+/* enum: Mgmt_Filter_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_MGMT_FILTER_TABLE 0x10200\n+/* enum: Conntrack_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_CONNTRACK_TABLE 0x10300\n+/* enum: Action_Rule_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_ACTION_RULE_TABLE 0x10400\n+/* enum: Mgroup_Default_Action_Set_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_MGROUP_DEFAULT_ACTION_SET_TABLE 0x10500\n+/* enum: Encap_Hdr_Part1_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_ENCAP_HDR_PART1_TABLE 0x10600\n+/* enum: Encap_Hdr_Part2_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_ENCAP_HDR_PART2_TABLE 0x10700\n+/* enum: Replace_Src_MAC_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_REPLACE_SRC_MAC_TABLE 0x10800\n+/* enum: Replace_Dst_MAC_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_REPLACE_DST_MAC_TABLE 0x10900\n+/* enum: Dst_Mport_VC_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_DST_MPORT_VC_TABLE 0x10a00\n+/* enum: LACP_LAG_Config_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_LACP_LAG_CONFIG_TABLE 0x10b00\n+/* enum: LACP_Balance_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_LACP_BALANCE_TABLE 0x10c00\n+/* enum: Dst_Mport_Host_Chan_Table in the MAE - refer to SF-123102-TC. */\n+#define\tTABLE_ID_DST_MPORT_HOST_CHAN_TABLE 0x10d00\n+/* enum: VNIC_Rx_Encap_Table in VNIC Rx - refer to SF-123102-TC. */\n+#define\tTABLE_ID_VNIC_RX_ENCAP_TABLE 0x20000\n+/* enum: Steering_Table in VNIC Rx - refer to SF-123102-TC. */\n+#define\tTABLE_ID_STEERING_TABLE 0x20100\n+/* enum: RSS_Context_Table in VNIC Rx - refer to SF-123102-TC. */\n+#define\tTABLE_ID_RSS_CONTEXT_TABLE 0x20200\n+/* enum: Indirection_Table in VNIC Rx - refer to SF-123102-TC. */\n+#define\tTABLE_ID_INDIRECTION_TABLE 0x20300\n+/* enum: DPU.host read pipe first CRC offload engine profiles - refer to\n+ * XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_HOST_RD_CRC0_OE_PROFILE 0x1010000\n+/* enum: DPU.host read pipe second CRC offload engine profiles - refer to\n+ * XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_HOST_RD_CRC1_OE_PROFILE 0x1010010\n+/* enum: DPU.host write pipe first CRC offload engine profiles - refer to\n+ * XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_HOST_WR_CRC0_OE_PROFILE 0x1018000\n+/* enum: DPU.host write pipe second CRC offload engine profiles - refer to\n+ * XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_HOST_WR_CRC1_OE_PROFILE 0x1018010\n+/* enum: DPU.net 'full' receive pipe CRC offload engine profiles - refer to\n+ * XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_RX_CRC0_OE_PROFILE 0x1020000\n+/* enum: DPU.net 'full' receive pipe first checksum offload engine profiles -\n+ * refer to XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_RX_CSUM0_OE_PROFILE 0x1020100\n+/* enum: DPU.net 'full' receive pipe second checksum offload engine profiles -\n+ * refer to XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_RX_CSUM1_OE_PROFILE 0x1020110\n+/* enum: DPU.net 'full' receive pipe AES-GCM offload engine profiles - refer to\n+ * XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_RX_AES_GCM0_OE_PROFILE 0x1020200\n+/* enum: DPU.net 'lite' receive pipe CRC offload engine profiles - refer to\n+ * XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_RXLITE_CRC0_OE_PROFILE 0x1021000\n+/* enum: DPU.net 'lite' receive pipe checksum offload engine profiles - refer\n+ * to XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_RXLITE_CSUM0_OE_PROFILE 0x1021100\n+/* enum: DPU.net 'full' transmit pipe CRC offload engine profiles - refer to\n+ * XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_TX_CRC0_OE_PROFILE 0x1028000\n+/* enum: DPU.net 'full' transmit pipe first checksum offload engine profiles -\n+ * refer to XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_TX_CSUM0_OE_PROFILE 0x1028100\n+/* enum: DPU.net 'full' transmit pipe second checksum offload engine profiles -\n+ * refer to XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_TX_CSUM1_OE_PROFILE 0x1028110\n+/* enum: DPU.net 'full' transmit pipe AES-GCM offload engine profiles - refer\n+ * to XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_TX_AES_GCM0_OE_PROFILE 0x1028200\n+/* enum: DPU.net 'lite' transmit pipe CRC offload engine profiles - refer to\n+ * XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_TXLITE_CRC0_OE_PROFILE 0x1029000\n+/* enum: DPU.net 'lite' transmit pipe checksum offload engine profiles - refer\n+ * to XN-200147-AN.\n+ */\n+#define\tTABLE_ID_DPU_NET_TXLITE_CSUM0_OE_PROFILE 0x1029100\n+\n+/* TABLE_COMPRESSED_VLAN enum: Compressed VLAN TPID as used by some field\n+ * types; can be calculated by (((ether_type_msb >> 2) & 0x4) ^ 0x4) |\n+ * (ether_type_msb & 0x3);\n+ */\n+#define\tTABLE_COMPRESSED_VLAN_TPID_8100 0x5 /* enum */\n+#define\tTABLE_COMPRESSED_VLAN_TPID_88A8 0x4 /* enum */\n+#define\tTABLE_COMPRESSED_VLAN_TPID_9100 0x1 /* enum */\n+#define\tTABLE_COMPRESSED_VLAN_TPID_9200 0x2 /* enum */\n+#define\tTABLE_COMPRESSED_VLAN_TPID_9300 0x3 /* enum */\n+\n+/* TABLE_NAT_DIR enum: NAT direction. */\n+#define\tTABLE_NAT_DIR_SOURCE 0x0 /* enum */\n+#define\tTABLE_NAT_DIR_DEST 0x1 /* enum */\n+\n+/* TABLE_RSS_KEY_MODE enum: Defines how the value for Toeplitz hashing for RSS\n+ * is constructed as a concatenation (indicated here by \"++\") of packet header\n+ * fields.\n+ */\n+/* enum: IP src addr ++ IP dst addr */\n+#define\tTABLE_RSS_KEY_MODE_SA_DA 0x0\n+/* enum: IP src addr ++ IP dst addr ++ TCP/UDP src port ++ TCP/UDP dst port */\n+#define\tTABLE_RSS_KEY_MODE_SA_DA_SP_DP 0x1\n+/* enum: IP src addr */\n+#define\tTABLE_RSS_KEY_MODE_SA 0x2\n+/* enum: IP dst addr */\n+#define\tTABLE_RSS_KEY_MODE_DA 0x3\n+/* enum: IP src addr ++ TCP/UDP src port */\n+#define\tTABLE_RSS_KEY_MODE_SA_SP 0x4\n+/* enum: IP dest addr ++ TCP dest port */\n+#define\tTABLE_RSS_KEY_MODE_DA_DP 0x5\n+/* enum: Nothing (produces input of 0, resulting in output hash of 0) */\n+#define\tTABLE_RSS_KEY_MODE_NONE 0x7\n+\n+/* TABLE_RSS_SPREAD_MODE enum: RSS spreading mode. */\n+/* enum: RSS uses Indirection_Table lookup. */\n+#define\tTABLE_RSS_SPREAD_MODE_INDIRECTION 0x0\n+/* enum: RSS uses even spreading calculation. */\n+#define\tTABLE_RSS_SPREAD_MODE_EVEN 0x1\n+\n+/* CRC_VARIANT enum: Operation for the DPU CRC engine to perform. */\n+/* enum: Calculate a 32-bit CRC. */\n+#define\tCRC_VARIANT_CRC32 0x1\n+/* enum: Calculate a 64-bit CRC. */\n+#define\tCRC_VARIANT_CRC64 0x2\n+\n+/* DPU_CSUM_OP enum: Operation for the DPU checksum engine to perform. */\n+/* enum: Calculate the checksum for a TCP payload, output result on OPR bus. */\n+#define\tDPU_CSUM_OP_CALC_TCP 0x0\n+/* enum: Calculate the checksum for a UDP payload, output result on OPR bus. */\n+#define\tDPU_CSUM_OP_CALC_UDP 0x1\n+/* enum: Calculate the checksum for a TCP payload, output match/not match value\n+ * on OPR bus.\n+ */\n+#define\tDPU_CSUM_OP_VALIDATE_TCP 0x2\n+/* enum: Calculate the checksum for a UDP payload, output match/not match value\n+ * on OPR bus.\n+ */\n+#define\tDPU_CSUM_OP_VALIDATE_UDP 0x3\n+\n+/* GCM_OP_CODE enum: Operation for the DPU AES-GCM engine to perform. */\n+/* enum: Encrypt/decrypt a stream of data. */\n+#define\tGCM_OP_CODE_BULK_CRYPT 0x0\n+/* enum: Calculate the authentication tag for a stream of data. */\n+#define\tGCM_OP_CODE_BULK_AUTH 0x1\n+/* enum: Encrypt/decrypt an IPsec packet. */\n+#define\tGCM_OP_CODE_IPSEC_CRYPT 0x2\n+/* enum: Calculate the authentication tag of an IPsec packet. */\n+#define\tGCM_OP_CODE_IPSEC_AUTH 0x3\n+\n+/* AES_KEY_LEN enum: Key size for AES crypto operations */\n+/* enum: 128 bit key size. */\n+#define\tAES_KEY_LEN_AES_KEY_128 0x0\n+/* enum: 256 bit key size. */\n+#define\tAES_KEY_LEN_AES_KEY_256 0x1\n+\n+/* TABLE_FIELD_ID enum: Unique IDs for fields. Related concepts have been\n+ * loosely grouped together into blocks with gaps for expansion, but the values\n+ * are arbitrary. Field IDs are not specific to particular tables, and in some\n+ * cases this sharing means that they are not used with the exact names of the\n+ * corresponding table definitions in SF-123102-TC; however, the mapping should\n+ * still be clear. The intent is that a list of fields, with their associated\n+ * bit widths and semantics version code, unambiguously defines the semantics\n+ * of the fields in a key or response. (Again, this list includes all of the\n+ * fields currently defined within the streaming engines, but only a subset may\n+ * actually be used by the supported list of tables.)\n+ */\n+/* enum: May appear multiple times within a key or response, and indicates that\n+ * the field is unused and should be set to 0 (or masked out if permitted by\n+ * the MASK_VALUE for this field).\n+ */\n+#define\tTABLE_FIELD_ID_UNUSED 0x0\n+/* enum: Source m-port (a full m-port label). */\n+#define\tTABLE_FIELD_ID_SRC_MPORT 0x1\n+/* enum: Destination m-port (a full m-port label). */\n+#define\tTABLE_FIELD_ID_DST_MPORT 0x2\n+/* enum: Source m-group ID. */\n+#define\tTABLE_FIELD_ID_SRC_MGROUP_ID 0x3\n+/* enum: Physical network port ID (or m-port ID; same thing, for physical\n+ * network ports).\n+ */\n+#define\tTABLE_FIELD_ID_NETWORK_PORT_ID 0x4\n+/* enum: True if packet arrived via network port, false if it arrived via host.\n+ */\n+#define\tTABLE_FIELD_ID_IS_FROM_NETWORK 0x5\n+/* enum: Full virtual channel from capsule header. */\n+#define\tTABLE_FIELD_ID_CH_VC 0x6\n+/* enum: Low bits of virtual channel from capsule header. */\n+#define\tTABLE_FIELD_ID_CH_VC_LOW 0x7\n+/* enum: User mark value in metadata and packet prefix. */\n+#define\tTABLE_FIELD_ID_USER_MARK 0x8\n+/* enum: User flag value in metadata and packet prefix. */\n+#define\tTABLE_FIELD_ID_USER_FLAG 0x9\n+/* enum: Counter ID associated with a response. All-bits-1 is a null value to\n+ * suppress counting.\n+ */\n+#define\tTABLE_FIELD_ID_COUNTER_ID 0xa\n+/* enum: Discriminator which may be set by plugins in some lookup keys; this\n+ * allows plugins to make a reinterpretation of packet fields in these keys\n+ * without clashing with the normal interpretation.\n+ */\n+#define\tTABLE_FIELD_ID_DISCRIM 0xb\n+/* enum: Destination MAC address. The mapping from bytes in a frame to the\n+ * 48-bit value for this field is in network order, i.e. a MAC address of\n+ * AA:BB:CC:DD:EE:FF becomes a 48-bit value of 0xAABBCCDDEEFF.\n+ */\n+#define\tTABLE_FIELD_ID_DST_MAC 0x14\n+/* enum: Source MAC address (see notes for DST_MAC). */\n+#define\tTABLE_FIELD_ID_SRC_MAC 0x15\n+/* enum: Outer VLAN tag TPID, compressed to an enumeration. */\n+#define\tTABLE_FIELD_ID_OVLAN_TPID_COMPRESSED 0x16\n+/* enum: Full outer VLAN tag TCI (16 bits). */\n+#define\tTABLE_FIELD_ID_OVLAN 0x17\n+/* enum: Outer VLAN ID (least significant 12 bits of full 16-bit TCI) only. */\n+#define\tTABLE_FIELD_ID_OVLAN_VID 0x18\n+/* enum: Inner VLAN tag TPID, compressed to an enumeration. */\n+#define\tTABLE_FIELD_ID_IVLAN_TPID_COMPRESSED 0x19\n+/* enum: Full inner VLAN tag TCI (16 bits). */\n+#define\tTABLE_FIELD_ID_IVLAN 0x1a\n+/* enum: Inner VLAN ID (least significant 12 bits of full 16-bit TCI) only. */\n+#define\tTABLE_FIELD_ID_IVLAN_VID 0x1b\n+/* enum: Ethertype. */\n+#define\tTABLE_FIELD_ID_ETHER_TYPE 0x1c\n+/* enum: Source IP address, either IPv4 or IPv6. The mapping from bytes in a\n+ * frame to the 128-bit value for this field is in network order, with IPv4\n+ * addresses assumed to have 12 bytes of trailing zeroes. i.e. the IPv6 address\n+ * [2345::6789:ABCD] is 0x2345000000000000000000006789ABCD; the IPv4 address\n+ * 192.168.1.2 is 0xC0A80102000000000000000000000000.\n+ */\n+#define\tTABLE_FIELD_ID_SRC_IP 0x1d\n+/* enum: Destination IP address (see notes for SRC_IP). */\n+#define\tTABLE_FIELD_ID_DST_IP 0x1e\n+/* enum: IPv4 Type-of-Service or IPv6 Traffic Class field. */\n+#define\tTABLE_FIELD_ID_IP_TOS 0x1f\n+/* enum: IP Protocol. */\n+#define\tTABLE_FIELD_ID_IP_PROTO 0x20\n+/* enum: Layer 4 source port. */\n+#define\tTABLE_FIELD_ID_SRC_PORT 0x21\n+/* enum: Layer 4 destination port. */\n+#define\tTABLE_FIELD_ID_DST_PORT 0x22\n+/* enum: TCP flags. */\n+#define\tTABLE_FIELD_ID_TCP_FLAGS 0x23\n+/* enum: Virtual Network Identifier (VXLAN) or Virtual Session ID (NVGRE). */\n+#define\tTABLE_FIELD_ID_VNI 0x24\n+/* enum: True if packet has any tunnel encapsulation header. */\n+#define\tTABLE_FIELD_ID_HAS_ENCAP 0x32\n+/* enum: True if encap header has an outer VLAN tag. */\n+#define\tTABLE_FIELD_ID_HAS_ENC_OVLAN 0x33\n+/* enum: True if encap header has an inner VLAN tag. */\n+#define\tTABLE_FIELD_ID_HAS_ENC_IVLAN 0x34\n+/* enum: True if encap header is some sort of IP. */\n+#define\tTABLE_FIELD_ID_HAS_ENC_IP 0x35\n+/* enum: True if encap header is specifically IPv4. */\n+#define\tTABLE_FIELD_ID_HAS_ENC_IP4 0x36\n+/* enum: True if encap header is UDP. */\n+#define\tTABLE_FIELD_ID_HAS_ENC_UDP 0x37\n+/* enum: True if only/inner frame has an outer VLAN tag. */\n+#define\tTABLE_FIELD_ID_HAS_OVLAN 0x38\n+/* enum: True if only/inner frame has an inner VLAN tag. */\n+#define\tTABLE_FIELD_ID_HAS_IVLAN 0x39\n+/* enum: True if only/inner frame is some sort of IP. */\n+#define\tTABLE_FIELD_ID_HAS_IP 0x3a\n+/* enum: True if only/inner frame has a recognised L4 IP protocol (TCP or UDP).\n+ */\n+#define\tTABLE_FIELD_ID_HAS_L4 0x3b\n+/* enum: True if only/inner frame is an IP fragment. */\n+#define\tTABLE_FIELD_ID_IP_FRAG 0x3c\n+/* enum: True if only/inner frame is the first IP fragment (fragment offset 0).\n+ */\n+#define\tTABLE_FIELD_ID_IP_FIRST_FRAG 0x3d\n+/* enum: True if only/inner frame has an IP Time-To-Live of <= 1. (Note: the\n+ * implementation calls this \"ip_ttl_is_one\" but does in fact match packets\n+ * with TTL=0 - which we shouldn't be seeing! - as well.)\n+ */\n+#define\tTABLE_FIELD_ID_IP_TTL_LE_ONE 0x3e\n+/* enum: True if only/inner frame has any of TCP SYN, FIN or RST flags set. */\n+#define\tTABLE_FIELD_ID_TCP_INTERESTING_FLAGS 0x3f\n+/* enum: Plugin channel selection. */\n+#define\tTABLE_FIELD_ID_RDP_PL_CHAN 0x50\n+/* enum: Enable update of CH_ROUTE_RDP_C_PL route bit. */\n+#define\tTABLE_FIELD_ID_RDP_C_PL_EN 0x51\n+/* enum: New value of CH_ROUTE_RDP_C_PL route bit. */\n+#define\tTABLE_FIELD_ID_RDP_C_PL 0x52\n+/* enum: Enable update of CH_ROUTE_RDP_D_PL route bit. */\n+#define\tTABLE_FIELD_ID_RDP_D_PL_EN 0x53\n+/* enum: New value of CH_ROUTE_RDP_D_PL route bit. */\n+#define\tTABLE_FIELD_ID_RDP_D_PL 0x54\n+/* enum: Enable update of CH_ROUTE_RDP_OUT_HOST_CHAN route bit. */\n+#define\tTABLE_FIELD_ID_RDP_OUT_HOST_CHAN_EN 0x55\n+/* enum: New value of CH_ROUTE_RDP_OUT_HOST_CHAN route bit. */\n+#define\tTABLE_FIELD_ID_RDP_OUT_HOST_CHAN 0x56\n+/* enum: Recirculation ID for lookup sequences with two action rule lookups. */\n+#define\tTABLE_FIELD_ID_RECIRC_ID 0x64\n+/* enum: Domain ID passed to conntrack and action rule lookups. */\n+#define\tTABLE_FIELD_ID_DOMAIN 0x65\n+/* enum: Construction mode for encap_tunnel_id - see MAE_CT_VNI_MODE enum. */\n+#define\tTABLE_FIELD_ID_CT_VNI_MODE 0x66\n+/* enum: True to inhibit conntrack lookup if TCP SYN, FIN or RST flag is set.\n+ */\n+#define\tTABLE_FIELD_ID_CT_TCP_FLAGS_INHIBIT 0x67\n+/* enum: True to do conntrack lookups for IPv4 TCP packets. */\n+#define\tTABLE_FIELD_ID_DO_CT_IP4_TCP 0x68\n+/* enum: True to do conntrack lookups for IPv4 UDP packets. */\n+#define\tTABLE_FIELD_ID_DO_CT_IP4_UDP 0x69\n+/* enum: True to do conntrack lookups for IPv6 TCP packets. */\n+#define\tTABLE_FIELD_ID_DO_CT_IP6_TCP 0x6a\n+/* enum: True to do conntrack lookups for IPv6 UDP packets. */\n+#define\tTABLE_FIELD_ID_DO_CT_IP6_UDP 0x6b\n+/* enum: Outer rule identifier. */\n+#define\tTABLE_FIELD_ID_OUTER_RULE_ID 0x6c\n+/* enum: Encapsulation type - see MAE_MCDI_ENCAP_TYPE enum. */\n+#define\tTABLE_FIELD_ID_ENCAP_TYPE 0x6d\n+/* enum: Encap tunnel ID for conntrack lookups from VNI, VLAN tag(s), or 0,\n+ * depending on CT_VNI_MODE.\n+ */\n+#define\tTABLE_FIELD_ID_ENCAP_TUNNEL_ID 0x78\n+/* enum: A conntrack entry identifier, passed to plugins. */\n+#define\tTABLE_FIELD_ID_CT_ENTRY_ID 0x79\n+/* enum: Either source or destination NAT replacement port. */\n+#define\tTABLE_FIELD_ID_NAT_PORT 0x7a\n+/* enum: Either source or destination NAT replacement IPv4 address. Note that\n+ * this is specifically an IPv4 address (IPv6 is not supported for NAT), with\n+ * byte mapped to a 32-bit value in network order, i.e. the IPv4 address\n+ * 192.168.1.2 is the value 0xC0A80102.\n+ */\n+#define\tTABLE_FIELD_ID_NAT_IP 0x7b\n+/* enum: NAT direction: 0=>source, 1=>destination. */\n+#define\tTABLE_FIELD_ID_NAT_DIR 0x7c\n+/* enum: Conntrack mark value, passed to action rule lookup. Note that this is\n+ * not related to the \"user mark\" in the metadata / packet prefix.\n+ */\n+#define\tTABLE_FIELD_ID_CT_MARK 0x7d\n+/* enum: Private flags for conntrack, passed to action rule lookup. */\n+#define\tTABLE_FIELD_ID_CT_PRIV_FLAGS 0x7e\n+/* enum: True if the conntrack lookup resulted in a hit. */\n+#define\tTABLE_FIELD_ID_CT_HIT 0x7f\n+/* enum: True to suppress delivery when source and destination m-ports match.\n+ */\n+#define\tTABLE_FIELD_ID_SUPPRESS_SELF_DELIVERY 0x8c\n+/* enum: True to perform tunnel decapsulation. */\n+#define\tTABLE_FIELD_ID_DO_DECAP 0x8d\n+/* enum: True to copy outer frame DSCP to inner on decap. */\n+#define\tTABLE_FIELD_ID_DECAP_DSCP_COPY 0x8e\n+/* enum: True to map outer frame ECN to inner on decap, by RFC 6040 rules. */\n+#define\tTABLE_FIELD_ID_DECAP_ECN_RFC6040 0x8f\n+/* enum: True to replace DSCP field. */\n+#define\tTABLE_FIELD_ID_DO_REPLACE_DSCP 0x90\n+/* enum: True to replace ECN field. */\n+#define\tTABLE_FIELD_ID_DO_REPLACE_ECN 0x91\n+/* enum: True to decrement IP Time-To-Live. */\n+#define\tTABLE_FIELD_ID_DO_DECR_IP_TTL 0x92\n+/* enum: True to replace source MAC address. */\n+#define\tTABLE_FIELD_ID_DO_SRC_MAC 0x93\n+/* enum: True to replace destination MAC address. */\n+#define\tTABLE_FIELD_ID_DO_DST_MAC 0x94\n+/* enum: Number of VLAN tags to pop. Valid values are 0, 1, or 2. */\n+#define\tTABLE_FIELD_ID_DO_VLAN_POP 0x95\n+/* enum: Number of VLANs tags to push. Valid values are 0, 1, or 2. */\n+#define\tTABLE_FIELD_ID_DO_VLAN_PUSH 0x96\n+/* enum: True to count this packet. */\n+#define\tTABLE_FIELD_ID_DO_COUNT 0x97\n+/* enum: True to perform tunnel encapsulation. */\n+#define\tTABLE_FIELD_ID_DO_ENCAP 0x98\n+/* enum: True to copy inner frame DSCP to outer on encap. */\n+#define\tTABLE_FIELD_ID_ENCAP_DSCP_COPY 0x99\n+/* enum: True to copy inner frame ECN to outer on encap. */\n+#define\tTABLE_FIELD_ID_ENCAP_ECN_COPY 0x9a\n+/* enum: True to deliver the packet (otherwise it is dropped). */\n+#define\tTABLE_FIELD_ID_DO_DELIVER 0x9b\n+/* enum: True to set the user flag in the metadata. */\n+#define\tTABLE_FIELD_ID_DO_FLAG 0x9c\n+/* enum: True to update the user mark in the metadata. */\n+#define\tTABLE_FIELD_ID_DO_MARK 0x9d\n+/* enum: True to override the capsule virtual channel for network deliveries.\n+ */\n+#define\tTABLE_FIELD_ID_DO_SET_NET_CHAN 0x9e\n+/* enum: True to override the reported source m-port for host deliveries. */\n+#define\tTABLE_FIELD_ID_DO_SET_SRC_MPORT 0x9f\n+/* enum: Encap header ID for DO_ENCAP, indexing Encap_Hdr_Part1/2_Table. */\n+#define\tTABLE_FIELD_ID_ENCAP_HDR_ID 0xaa\n+/* enum: New DSCP value for DO_REPLACE_DSCP. */\n+#define\tTABLE_FIELD_ID_DSCP_VALUE 0xab\n+/* enum: If DO_REPLACE_ECN is set, the new value for the ECN field. If\n+ * DO_REPLACE_ECN is not set, ECN_CONTROL[0] and ECN_CONTROL[1] are set to\n+ * request remapping of ECT0 and ECT1 ECN codepoints respectively to CE.\n+ */\n+#define\tTABLE_FIELD_ID_ECN_CONTROL 0xac\n+/* enum: Source MAC ID for DO_SRC_MAC, indexing Replace_Src_MAC_Table. */\n+#define\tTABLE_FIELD_ID_SRC_MAC_ID 0xad\n+/* enum: Destination MAC ID for DO_DST_MAC, indexing Replace_Dst_MAC_Table. */\n+#define\tTABLE_FIELD_ID_DST_MAC_ID 0xae\n+/* enum: Parameter for either DO_SET_NET_CHAN (only bottom 6 bits used in this\n+ * case) or DO_SET_SRC_MPORT.\n+ */\n+#define\tTABLE_FIELD_ID_REPORTED_SRC_MPORT_OR_NET_CHAN 0xaf\n+/* enum: 64-byte chunk of added encapsulation header. */\n+#define\tTABLE_FIELD_ID_CHUNK64 0xb4\n+/* enum: 32-byte chunk of added encapsulation header. */\n+#define\tTABLE_FIELD_ID_CHUNK32 0xb5\n+/* enum: 16-byte chunk of added encapsulation header. */\n+#define\tTABLE_FIELD_ID_CHUNK16 0xb6\n+/* enum: 8-byte chunk of added encapsulation header. */\n+#define\tTABLE_FIELD_ID_CHUNK8 0xb7\n+/* enum: 4-byte chunk of added encapsulation header. */\n+#define\tTABLE_FIELD_ID_CHUNK4 0xb8\n+/* enum: 2-byte chunk of added encapsulation header. */\n+#define\tTABLE_FIELD_ID_CHUNK2 0xb9\n+/* enum: Added encapsulation header length in words. */\n+#define\tTABLE_FIELD_ID_HDR_LEN_W 0xba\n+/* enum: Static value for layer 2/3 LACP hash of the encapsulation header. */\n+#define\tTABLE_FIELD_ID_ENC_LACP_HASH_L23 0xbb\n+/* enum: Static value for layer 4 LACP hash of the encapsulation header. */\n+#define\tTABLE_FIELD_ID_ENC_LACP_HASH_L4 0xbc\n+/* enum: True to use the static ENC_LACP_HASH values for the encap header\n+ * instead of the calculated values for the inner frame when delivering a newly\n+ * encapsulated packet to a LAG m-port.\n+ */\n+#define\tTABLE_FIELD_ID_USE_ENC_LACP_HASHES 0xbd\n+/* enum: True to trigger conntrack from first action rule lookup (AR=>CT=>AR\n+ * sequence).\n+ */\n+#define\tTABLE_FIELD_ID_DO_CT 0xc8\n+/* enum: True to perform NAT using parameters from conntrack lookup response.\n+ */\n+#define\tTABLE_FIELD_ID_DO_NAT 0xc9\n+/* enum: True to trigger recirculated action rule lookup (AR=>AR sequence). */\n+#define\tTABLE_FIELD_ID_DO_RECIRC 0xca\n+/* enum: Next action set payload ID for replay. The null value is all-1-bits.\n+ */\n+#define\tTABLE_FIELD_ID_NEXT_ACTION_SET_PAYLOAD 0xcb\n+/* enum: Next action set row ID for replay. The null value is all-1-bits. */\n+#define\tTABLE_FIELD_ID_NEXT_ACTION_SET_ROW 0xcc\n+/* enum: Action set payload ID for additional delivery to management CPU. The\n+ * null value is all-1-bits.\n+ */\n+#define\tTABLE_FIELD_ID_MC_ACTION_SET_PAYLOAD 0xcd\n+/* enum: Action set row ID for additional delivery to management CPU. The null\n+ * value is all-1-bits.\n+ */\n+#define\tTABLE_FIELD_ID_MC_ACTION_SET_ROW 0xce\n+/* enum: True to include layer 4 in LACP hash on delivery to a LAG m-port. */\n+#define\tTABLE_FIELD_ID_LACP_INC_L4 0xdc\n+/* enum: True to request that LACP is performed by a plugin. */\n+#define\tTABLE_FIELD_ID_LACP_PLUGIN 0xdd\n+/* enum: LACP_Balance_Table base address divided by 64. */\n+#define\tTABLE_FIELD_ID_BAL_TBL_BASE_DIV64 0xde\n+/* enum: Length of balance table region: 0=>64, 1=>128, 2=>256. */\n+#define\tTABLE_FIELD_ID_BAL_TBL_LEN_ID 0xdf\n+/* enum: LACP LAG ID (i.e. the low 3 bits of LACP LAG mport ID), indexing\n+ * LACP_LAG_Config_Table. Refer to SF-123102-TC.\n+ */\n+#define\tTABLE_FIELD_ID_LACP_LAG_ID 0xe0\n+/* enum: Address in LACP_Balance_Table. The balance table is partitioned\n+ * between LAGs according to the settings in LACP_LAG_Config_Table and then\n+ * indexed by the LACP hash, providing the mapping to destination mports. Refer\n+ * to SF-123102-TC.\n+ */\n+#define\tTABLE_FIELD_ID_BAL_TBL_ADDR 0xe1\n+/* enum: UDP port to match for UDP-based encapsulations; required to be 0 for\n+ * other encapsulation types.\n+ */\n+#define\tTABLE_FIELD_ID_UDP_PORT 0xe6\n+/* enum: True to perform RSS based on outer fields rather than inner fields. */\n+#define\tTABLE_FIELD_ID_RSS_ON_OUTER 0xe7\n+/* enum: True to perform steering table lookup on outer fields rather than\n+ * inner fields.\n+ */\n+#define\tTABLE_FIELD_ID_STEER_ON_OUTER 0xe8\n+/* enum: Destination queue ID for host delivery. */\n+#define\tTABLE_FIELD_ID_DST_QID 0xf0\n+/* enum: True to drop this packet. */\n+#define\tTABLE_FIELD_ID_DROP 0xf1\n+/* enum: True to strip outer VLAN tag from this packet. */\n+#define\tTABLE_FIELD_ID_VLAN_STRIP 0xf2\n+/* enum: True to override the user mark field with the supplied USER_MARK, or\n+ * false to bitwise-OR the USER_MARK into it.\n+ */\n+#define\tTABLE_FIELD_ID_MARK_OVERRIDE 0xf3\n+/* enum: True to override the user flag field with the supplied USER_FLAG, or\n+ * false to bitwise-OR the USER_FLAG into it.\n+ */\n+#define\tTABLE_FIELD_ID_FLAG_OVERRIDE 0xf4\n+/* enum: RSS context ID, indexing the RSS_Context_Table. */\n+#define\tTABLE_FIELD_ID_RSS_CTX_ID 0xfa\n+/* enum: True to enable RSS. */\n+#define\tTABLE_FIELD_ID_RSS_EN 0xfb\n+/* enum: Toeplitz hash key. */\n+#define\tTABLE_FIELD_ID_KEY 0xfc\n+/* enum: Key mode for IPv4 TCP packets - see TABLE_RSS_KEY_MODE enum. */\n+#define\tTABLE_FIELD_ID_TCP_V4_KEY_MODE 0xfd\n+/* enum: Key mode for IPv6 TCP packets - see TABLE_RSS_KEY_MODE enum. */\n+#define\tTABLE_FIELD_ID_TCP_V6_KEY_MODE 0xfe\n+/* enum: Key mode for IPv4 UDP packets - see TABLE_RSS_KEY_MODE enum. */\n+#define\tTABLE_FIELD_ID_UDP_V4_KEY_MODE 0xff\n+/* enum: Key mode for IPv6 UDP packets - see TABLE_RSS_KEY_MODE enum. */\n+#define\tTABLE_FIELD_ID_UDP_V6_KEY_MODE 0x100\n+/* enum: Key mode for other IPv4 packets - see TABLE_RSS_KEY_MODE enum. */\n+#define\tTABLE_FIELD_ID_OTHER_V4_KEY_MODE 0x101\n+/* enum: Key mode for other IPv6 packets - see TABLE_RSS_KEY_MODE enum. */\n+#define\tTABLE_FIELD_ID_OTHER_V6_KEY_MODE 0x102\n+/* enum: Spreading mode - 0=>indirection; 1=>even. */\n+#define\tTABLE_FIELD_ID_SPREAD_MODE 0x103\n+/* enum: For indirection spreading mode, the base address of a region within\n+ * the Indirection_Table. For even spreading mode, the number of queues to\n+ * spread across (only values 1-255 are valid for this mode).\n+ */\n+#define\tTABLE_FIELD_ID_INDIR_TBL_BASE 0x104\n+/* enum: For indirection spreading mode, identifies the length of a region\n+ * within the Indirection_Table, where length = 32 << len_id. Must be set to 0\n+ * for even spreading mode.\n+ */\n+#define\tTABLE_FIELD_ID_INDIR_TBL_LEN_ID 0x105\n+/* enum: An offset to be applied to the base destination queue ID. */\n+#define\tTABLE_FIELD_ID_INDIR_OFFSET 0x106\n+/* enum: DPU offload engine profile ID to address. */\n+#define\tTABLE_FIELD_ID_OE_PROFILE 0x3e8\n+/* enum: Width of the CRC to calculate - see CRC_VARIANT enum. */\n+#define\tTABLE_FIELD_ID_CRC_VARIANT 0x3f2\n+/* enum: If set, reflect the bits of each input byte, bit 7 is LSB, bit 0 is\n+ * MSB. If clear, bit 7 is MSB, bit 0 is LSB.\n+ */\n+#define\tTABLE_FIELD_ID_CRC_REFIN 0x3f3\n+/* enum: If set, reflect the bits of each output byte, bit 7 is LSB, bit 0 is\n+ * MSB. If clear, bit 7 is MSB, bit 0 is LSB.\n+ */\n+#define\tTABLE_FIELD_ID_CRC_REFOUT 0x3f4\n+/* enum: If set, invert every bit of the output value. */\n+#define\tTABLE_FIELD_ID_CRC_INVOUT 0x3f5\n+/* enum: The CRC polynomial to use for checksumming, in normal form. See\n+ * https://en.wikipedia.org/wiki/Cyclic_redundancy_check#Specification for a\n+ * description of normal form.\n+ */\n+#define\tTABLE_FIELD_ID_CRC_POLY 0x3f6\n+/* enum: Operation for the checksum engine to perform - see DPU_CSUM_OP enum.\n+ */\n+#define\tTABLE_FIELD_ID_CSUM_OP 0x410\n+/* enum: Byte offset of checksum relative to region_start (for VALIDATE_*\n+ * operations only).\n+ */\n+#define\tTABLE_FIELD_ID_CSUM_OFFSET 0x411\n+/* enum: Indicates there is additional data on OPR bus that needs to be\n+ * incorporated into the payload checksum.\n+ */\n+#define\tTABLE_FIELD_ID_CSUM_OPR_ADDITIONAL_DATA 0x412\n+/* enum: Log2 data size of additional data on OPR bus. */\n+#define\tTABLE_FIELD_ID_CSUM_OPR_DATA_SIZE_LOG2 0x413\n+/* enum: 4 byte offset of where to find the additional data on the OPR bus. */\n+#define\tTABLE_FIELD_ID_CSUM_OPR_4B_OFF 0x414\n+/* enum: Operation type for the AES-GCM core - see GCM_OP_CODE enum. */\n+#define\tTABLE_FIELD_ID_GCM_OP_CODE 0x41a\n+/* enum: Key length - AES_KEY_LEN enum. */\n+#define\tTABLE_FIELD_ID_GCM_KEY_LEN 0x41b\n+/* enum: OPR 4 byte offset for ICV or GHASH output (only in BULK_* mode) or\n+ * IPSEC descrypt output.\n+ */\n+#define\tTABLE_FIELD_ID_GCM_OPR_4B_OFFSET 0x41c\n+/* enum: If OP_CODE is BULK_*, indicates Emit GHASH (Fragment mode). Else,\n+ * indicates IPSEC-ESN mode.\n+ */\n+#define\tTABLE_FIELD_ID_GCM_EMIT_GHASH_ISESN 0x41d\n+/* enum: Replay Protection Enable. */\n+#define\tTABLE_FIELD_ID_GCM_REPLAY_PROTECT_EN 0x41e\n+/* enum: IPSEC Encrypt ESP trailer NEXT_HEADER byte. */\n+#define\tTABLE_FIELD_ID_GCM_NEXT_HDR 0x41f\n+/* enum: Replay Window Size. */\n+#define\tTABLE_FIELD_ID_GCM_REPLAY_WIN_SIZE 0x420\n \n /* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10/EF100\n  * platforms\n@@ -819,7 +1434,7 @@\n #define\tMCDI_EVENT_AOE_FPGA_LOAD_FAILED 0xe\n /* enum: Notify that invalid flash type detected */\n #define\tMCDI_EVENT_AOE_INVALID_FPGA_FLASH_TYPE 0xf\n-/* enum: Notify that the attempt to run FPGA Controller firmware timedout */\n+/* enum: Notify that the attempt to run FPGA Controller firmware timed out */\n #define\tMCDI_EVENT_AOE_FC_RUN_TIMEDOUT 0x10\n /* enum: Failure to probe one or more FPGA boot flash chips */\n #define\tMCDI_EVENT_AOE_FPGA_BOOT_FLASH_INVALID 0x11\n@@ -837,7 +1452,7 @@\n #define\tMCDI_EVENT_AOE_ERR_FC_ASSERT_INFO_WIDTH 8\n /* enum: FC Assert happened, but the register information is not available */\n #define\tMCDI_EVENT_AOE_ERR_FC_ASSERT_SEEN 0x0\n-/* enum: The register information for FC Assert is ready for readinng by driver\n+/* enum: The register information for FC Assert is ready for reading by driver\n  */\n #define\tMCDI_EVENT_AOE_ERR_FC_ASSERT_DATA_READY 0x1\n #define\tMCDI_EVENT_AOE_ERR_CODE_FPGA_HEADER_VERIFY_FAILED_OFST 0\n@@ -946,6 +1561,12 @@\n #define\tMCDI_EVENT_MODULECHANGE_SEQ_OFST 0\n #define\tMCDI_EVENT_MODULECHANGE_SEQ_LBN 30\n #define\tMCDI_EVENT_MODULECHANGE_SEQ_WIDTH 2\n+#define\tMCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_OFST 0\n+#define\tMCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_LBN 0\n+#define\tMCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_WIDTH 16\n+#define\tMCDI_EVENT_DESC_PROXY_VIRTQ_ID_OFST 0\n+#define\tMCDI_EVENT_DESC_PROXY_VIRTQ_ID_LBN 16\n+#define\tMCDI_EVENT_DESC_PROXY_VIRTQ_ID_WIDTH 16\n #define\tMCDI_EVENT_DATA_LBN 0\n #define\tMCDI_EVENT_DATA_WIDTH 32\n /* Alias for PTP_DATA. */\n@@ -1076,6 +1697,18 @@\n  * SF-122927-TC for details.\n  */\n #define\tMCDI_EVENT_CODE_DESC_PROXY_FUNC_DRIVER_ATTACH 0x26\n+/* enum: Notification that the mport journal has changed since it was last read\n+ * and updates can be read using the MC_CMD_MAE_MPORT_READ_JOURNAL command. The\n+ * firmware may moderate the events so that an event is not sent for every\n+ * change to the journal.\n+ */\n+#define\tMCDI_EVENT_CODE_MPORT_JOURNAL_CHANGE 0x27\n+/* enum: Notification that a source queue is enabled and attached to its proxy\n+ * sink queue. SRC field contains the handle of the affected descriptor proxy\n+ * function. DATA field contains the relative source queue number and absolute\n+ * VI ID.\n+ */\n+#define\tMCDI_EVENT_CODE_DESC_PROXY_FUNC_QUEUE_START 0x28\n /* enum: Artificial event generated by host and posted via MC for test\n  * purposes.\n  */\n@@ -1842,6 +2475,7 @@\n /* Log destination */\n #define\tMC_CMD_LOG_CTRL_IN_LOG_DEST_OFST 0\n #define\tMC_CMD_LOG_CTRL_IN_LOG_DEST_LEN 4\n+/* enum property: bitmask */\n /* enum: UART. */\n #define\tMC_CMD_LOG_CTRL_IN_LOG_DEST_UART 0x1\n /* enum: Event queue. */\n@@ -1888,6 +2522,9 @@\n \n /* MC_CMD_GET_VERSION_OUT msgresponse */\n #define\tMC_CMD_GET_VERSION_OUT_LEN 32\n+/* This is normally the UTC build time in seconds since epoch or one of the\n+ * special values listed\n+ */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */\n /*            Enum values, see field(s): */\n@@ -1910,6 +2547,9 @@\n \n /* MC_CMD_GET_VERSION_EXT_OUT msgresponse */\n #define\tMC_CMD_GET_VERSION_EXT_OUT_LEN 48\n+/* This is normally the UTC build time in seconds since epoch or one of the\n+ * special values listed\n+ */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */\n /*            Enum values, see field(s): */\n@@ -1940,6 +2580,9 @@\n  * (depending on which components exist on a particular adapter)\n  */\n #define\tMC_CMD_GET_VERSION_V2_OUT_LEN 304\n+/* This is normally the UTC build time in seconds since epoch or one of the\n+ * special values listed\n+ */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */\n /*            Enum values, see field(s): */\n@@ -2079,6 +2722,9 @@\n  * (depending on which components exist on a particular adapter)\n  */\n #define\tMC_CMD_GET_VERSION_V3_OUT_LEN 328\n+/* This is normally the UTC build time in seconds since epoch or one of the\n+ * special values listed\n+ */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */\n /*            Enum values, see field(s): */\n@@ -2225,6 +2871,9 @@\n  * version information\n  */\n #define\tMC_CMD_GET_VERSION_V4_OUT_LEN 392\n+/* This is normally the UTC build time in seconds since epoch or one of the\n+ * special values listed\n+ */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */\n /*            Enum values, see field(s): */\n@@ -2387,6 +3036,9 @@\n  * and board version information\n  */\n #define\tMC_CMD_GET_VERSION_V5_OUT_LEN 424\n+/* This is normally the UTC build time in seconds since epoch or one of the\n+ * special values listed\n+ */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */\n /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */\n /*            Enum values, see field(s): */\n@@ -2659,7 +3311,9 @@\n #define\tMC_CMD_PTP_IN_CMD_LEN 4\n #define\tMC_CMD_PTP_IN_PERIPH_ID_OFST 4\n #define\tMC_CMD_PTP_IN_PERIPH_ID_LEN 4\n-/* Not used. Events are always sent to function relative queue 0. */\n+/* Not used, initialize to 0. Events are always sent to function relative queue\n+ * 0.\n+ */\n #define\tMC_CMD_PTP_IN_ENABLE_QUEUE_OFST 8\n #define\tMC_CMD_PTP_IN_ENABLE_QUEUE_LEN 4\n /* PTP timestamping mode. Not used from Huntington onwards. */\n@@ -3030,7 +3684,9 @@\n #define\tMC_CMD_PTP_ENABLE_PPS 0x0\n /* enum: Disable */\n #define\tMC_CMD_PTP_DISABLE_PPS 0x1\n-/* Not used. Events are always sent to function relative queue 0. */\n+/* Not used, initialize to 0. Events are always sent to function relative queue\n+ * 0.\n+ */\n #define\tMC_CMD_PTP_IN_PPS_ENABLE_QUEUE_ID_OFST 8\n #define\tMC_CMD_PTP_IN_PPS_ENABLE_QUEUE_ID_LEN 4\n \n@@ -3392,6 +4048,87 @@\n #define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED2_OFST 20\n #define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED2_LEN 4\n \n+/* MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2 msgresponse */\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_LEN 40\n+/* Time format required/used by for this NIC. Applies to all PTP MCDI\n+ * operations that pass times between the host and firmware. If this operation\n+ * is not supported (older firmware) a format of seconds and nanoseconds should\n+ * be assumed.\n+ */\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_TIME_FORMAT_OFST 0\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_TIME_FORMAT_LEN 4\n+/* enum: Times are in seconds and nanoseconds */\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_SECONDS_NANOSECONDS 0x0\n+/* enum: Major register has units of 16 second per tick, minor 8 ns per tick */\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_16SECONDS_8NANOSECONDS 0x1\n+/* enum: Major register has units of seconds, minor 2^-27s per tick */\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_SECONDS_27FRACTION 0x2\n+/* enum: Major register units are seconds, minor units are quarter nanoseconds\n+ */\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_SECONDS_QTR_NANOSECONDS 0x3\n+/* Minimum acceptable value for a corrected synchronization timeset. When\n+ * comparing host and NIC clock times, the MC returns a set of samples that\n+ * contain the host start and end time, the MC time when the host start was\n+ * detected and the time the MC waited between reading the time and detecting\n+ * the host end. The corrected sync window is the difference between the host\n+ * end and start times minus the time that the MC waited for host end.\n+ */\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_SYNC_WINDOW_MIN_OFST 4\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_SYNC_WINDOW_MIN_LEN 4\n+/* Various PTP capabilities */\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_CAPABILITIES_OFST 8\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_CAPABILITIES_LEN 4\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_REPORT_SYNC_STATUS_OFST 8\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_REPORT_SYNC_STATUS_LBN 0\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_REPORT_SYNC_STATUS_WIDTH 1\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RX_TSTAMP_OOB_OFST 8\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RX_TSTAMP_OOB_LBN 1\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RX_TSTAMP_OOB_WIDTH 1\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_64BIT_SECONDS_OFST 8\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_64BIT_SECONDS_LBN 2\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_64BIT_SECONDS_WIDTH 1\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FP44_FREQ_ADJ_OFST 8\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FP44_FREQ_ADJ_LBN 3\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FP44_FREQ_ADJ_WIDTH 1\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED0_OFST 12\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED0_LEN 4\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED1_OFST 16\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED1_LEN 4\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED2_OFST 20\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED2_LEN 4\n+/* Minimum supported value for the FREQ field in\n+ * MC_CMD_PTP/MC_CMD_PTP_IN_ADJUST and\n+ * MC_CMD_PTP/MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST message requests. If this message\n+ * response is not supported a value of -0.1 ns should be assumed, which is\n+ * equivalent to a -10% adjustment.\n+ */\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_OFST 24\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_LEN 8\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_LO_OFST 24\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_LO_LEN 4\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_LO_LBN 192\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_LO_WIDTH 32\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_HI_OFST 28\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_HI_LEN 4\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_HI_LBN 224\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_HI_WIDTH 32\n+/* Maximum supported value for the FREQ field in\n+ * MC_CMD_PTP/MC_CMD_PTP_IN_ADJUST and\n+ * MC_CMD_PTP/MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST message requests. If this message\n+ * response is not supported a value of 0.1 ns should be assumed, which is\n+ * equivalent to a +10% adjustment.\n+ */\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_OFST 32\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_LEN 8\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_LO_OFST 32\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_LO_LEN 4\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_LO_LBN 256\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_LO_WIDTH 32\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_HI_OFST 36\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_HI_LEN 4\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_HI_LBN 288\n+#define\tMC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_HI_WIDTH 32\n+\n /* MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS msgresponse */\n #define\tMC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_LEN 16\n /* Uncorrected error on PTP transmit timestamps in NIC clock format */\n@@ -3443,12 +4180,16 @@\n /***********************************/\n /* MC_CMD_CSR_READ32\n  * Read 32bit words from the indirect memory map.\n+ *\n+ * Note - this command originally belonged to INSECURE category. But access is\n+ * required to specific registers for customer diagnostics. The command handler\n+ * has additional checks to reject insecure calls.\n  */\n #define\tMC_CMD_CSR_READ32 0xc\n #define\tMC_CMD_CSR_READ32_MSGSET 0xc\n #undef\tMC_CMD_0xc_PRIVILEGE_CTG\n \n-#define\tMC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_INSECURE\n+#define\tMC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_ADMIN\n \n /* MC_CMD_CSR_READ32_IN msgrequest */\n #define\tMC_CMD_CSR_READ32_IN_LEN 12\n@@ -4221,6 +4962,7 @@\n /* Flags associated with this function */\n #define\tMC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_OFST 4\n #define\tMC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_LEN 4\n+/* enum property: bitshift */\n /* enum: Labels the lowest-numbered function visible to the OS */\n #define\tMC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY 0x0\n /* enum: The function can control the link state of the physical port it is\n@@ -4454,6 +5196,54 @@\n /* MC_CMD_GET_PHY_CFG_IN msgrequest */\n #define\tMC_CMD_GET_PHY_CFG_IN_LEN 0\n \n+/* MC_CMD_GET_PHY_CFG_IN_V2 msgrequest */\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_LEN 8\n+/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which\n+ * identifies a real or virtual network port by MAE port and link end. See the\n+ * structure definition for more details\n+ */\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_OFST 0\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_LEN 8\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_OFST 0\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_LEN 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_LBN 0\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_WIDTH 32\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_OFST 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_LEN 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_LBN 32\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_WIDTH 32\n+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_OFST 0\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_LEN 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_LINK_END_OFST 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_LINK_END_LEN 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_OFST 0\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LEN 8\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_OFST 0\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_LEN 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_LBN 0\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_WIDTH 32\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_OFST 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_LEN 4\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_LBN 32\n+#define\tMC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_WIDTH 32\n+\n /* MC_CMD_GET_PHY_CFG_OUT msgresponse */\n #define\tMC_CMD_GET_PHY_CFG_OUT_LEN 72\n /* flags */\n@@ -4549,6 +5339,9 @@\n #define\tMC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_OFST 8\n #define\tMC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN 21\n #define\tMC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_WIDTH 1\n+#define\tMC_CMD_PHY_CAP_200000FDX_OFST 8\n+#define\tMC_CMD_PHY_CAP_200000FDX_LBN 22\n+#define\tMC_CMD_PHY_CAP_200000FDX_WIDTH 1\n /* ?? */\n #define\tMC_CMD_GET_PHY_CFG_OUT_CHANNEL_OFST 12\n #define\tMC_CMD_GET_PHY_CFG_OUT_CHANNEL_LEN 4\n@@ -4582,6 +5375,7 @@\n #define\tMC_CMD_MEDIA_DSFP 0x8\n #define\tMC_CMD_GET_PHY_CFG_OUT_MMD_MASK_OFST 48\n #define\tMC_CMD_GET_PHY_CFG_OUT_MMD_MASK_LEN 4\n+/* enum property: bitshift */\n /* enum: Native clause 22 */\n #define\tMC_CMD_MMD_CLAUSE22 0x0\n #define\tMC_CMD_MMD_CLAUSE45_PMAPMD 0x1 /* enum */\n@@ -4847,6 +5641,54 @@\n /* MC_CMD_GET_LOOPBACK_MODES_IN msgrequest */\n #define\tMC_CMD_GET_LOOPBACK_MODES_IN_LEN 0\n \n+/* MC_CMD_GET_LOOPBACK_MODES_IN_V2 msgrequest */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_LEN 8\n+/* Target port to request loopback modes for. Uses MAE_LINK_ENDPOINT_SELECTOR\n+ * which identifies a real or virtual network port by MAE port and link end.\n+ * See the structure definition for more details\n+ */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_OFST 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LEN 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_OFST 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_LBN 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_WIDTH 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_OFST 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_LBN 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_WIDTH 32\n+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_OFST 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LINK_END_OFST 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LINK_END_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_OFST 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LEN 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_OFST 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_LBN 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_WIDTH 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_OFST 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_LBN 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_WIDTH 32\n+\n /* MC_CMD_GET_LOOPBACK_MODES_OUT msgresponse */\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_LEN 40\n /* Supported loopbacks. */\n@@ -4860,6 +5702,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LBN 32\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_WIDTH 32\n+/* enum property: bitshift */\n /* enum: None. */\n #define\tMC_CMD_LOOPBACK_NONE 0x0\n /* enum: Data. */\n@@ -4949,6 +5792,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LBN 96\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_WIDTH 32\n+/* enum property: bitshift */\n /*            Enum values, see field(s): */\n /*               100M */\n /* Supported loopbacks. */\n@@ -4962,6 +5806,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LBN 160\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_WIDTH 32\n+/* enum property: bitshift */\n /*            Enum values, see field(s): */\n /*               100M */\n /* Supported loopbacks. */\n@@ -4975,6 +5820,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LBN 224\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_WIDTH 32\n+/* enum property: bitshift */\n /*            Enum values, see field(s): */\n /*               100M */\n /* Supported loopbacks. */\n@@ -4988,6 +5834,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LBN 288\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_WIDTH 32\n+/* enum property: bitshift */\n /*            Enum values, see field(s): */\n /*               100M */\n \n@@ -5006,6 +5853,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LBN 32\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_WIDTH 32\n+/* enum property: bitshift */\n /* enum: None. */\n /*               MC_CMD_LOOPBACK_NONE 0x0 */\n /* enum: Data. */\n@@ -5095,6 +5943,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LBN 96\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_WIDTH 32\n+/* enum property: bitshift */\n /*            Enum values, see field(s): */\n /*               100M */\n /* Supported loopbacks. */\n@@ -5108,6 +5957,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LBN 160\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_WIDTH 32\n+/* enum property: bitshift */\n /*            Enum values, see field(s): */\n /*               100M */\n /* Supported loopbacks. */\n@@ -5121,6 +5971,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LBN 224\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_WIDTH 32\n+/* enum property: bitshift */\n /*            Enum values, see field(s): */\n /*               100M */\n /* Supported loopbacks. */\n@@ -5134,6 +5985,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LBN 288\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_WIDTH 32\n+/* enum property: bitshift */\n /*            Enum values, see field(s): */\n /*               100M */\n /* Supported 25G loopbacks. */\n@@ -5147,6 +5999,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LBN 352\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_WIDTH 32\n+/* enum property: bitshift */\n /*            Enum values, see field(s): */\n /*               100M */\n /* Supported 50 loopbacks. */\n@@ -5160,6 +6013,7 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LBN 416\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_WIDTH 32\n+/* enum property: bitshift */\n /*            Enum values, see field(s): */\n /*               100M */\n /* Supported 100G loopbacks. */\n@@ -5173,6 +6027,214 @@\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LEN 4\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LBN 480\n #define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_WIDTH 32\n+/* enum property: bitshift */\n+/*            Enum values, see field(s): */\n+/*               100M */\n+\n+/* MC_CMD_GET_LOOPBACK_MODES_OUT_V3 msgresponse: Supported loopback modes for\n+ * newer NICs with 200G support\n+ */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_LEN 72\n+/* Supported loopbacks. */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_OFST 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LEN 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_OFST 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_LBN 0\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_WIDTH 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_OFST 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_LBN 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_WIDTH 32\n+/* enum property: bitshift */\n+/* enum: None. */\n+/*               MC_CMD_LOOPBACK_NONE 0x0 */\n+/* enum: Data. */\n+/*               MC_CMD_LOOPBACK_DATA 0x1 */\n+/* enum: GMAC. */\n+/*               MC_CMD_LOOPBACK_GMAC 0x2 */\n+/* enum: XGMII. */\n+/*               MC_CMD_LOOPBACK_XGMII 0x3 */\n+/* enum: XGXS. */\n+/*               MC_CMD_LOOPBACK_XGXS 0x4 */\n+/* enum: XAUI. */\n+/*               MC_CMD_LOOPBACK_XAUI 0x5 */\n+/* enum: GMII. */\n+/*               MC_CMD_LOOPBACK_GMII 0x6 */\n+/* enum: SGMII. */\n+/*               MC_CMD_LOOPBACK_SGMII 0x7 */\n+/* enum: XGBR. */\n+/*               MC_CMD_LOOPBACK_XGBR 0x8 */\n+/* enum: XFI. */\n+/*               MC_CMD_LOOPBACK_XFI 0x9 */\n+/* enum: XAUI Far. */\n+/*               MC_CMD_LOOPBACK_XAUI_FAR 0xa */\n+/* enum: GMII Far. */\n+/*               MC_CMD_LOOPBACK_GMII_FAR 0xb */\n+/* enum: SGMII Far. */\n+/*               MC_CMD_LOOPBACK_SGMII_FAR 0xc */\n+/* enum: XFI Far. */\n+/*               MC_CMD_LOOPBACK_XFI_FAR 0xd */\n+/* enum: GPhy. */\n+/*               MC_CMD_LOOPBACK_GPHY 0xe */\n+/* enum: PhyXS. */\n+/*               MC_CMD_LOOPBACK_PHYXS 0xf */\n+/* enum: PCS. */\n+/*               MC_CMD_LOOPBACK_PCS 0x10 */\n+/* enum: PMA-PMD. */\n+/*               MC_CMD_LOOPBACK_PMAPMD 0x11 */\n+/* enum: Cross-Port. */\n+/*               MC_CMD_LOOPBACK_XPORT 0x12 */\n+/* enum: XGMII-Wireside. */\n+/*               MC_CMD_LOOPBACK_XGMII_WS 0x13 */\n+/* enum: XAUI Wireside. */\n+/*               MC_CMD_LOOPBACK_XAUI_WS 0x14 */\n+/* enum: XAUI Wireside Far. */\n+/*               MC_CMD_LOOPBACK_XAUI_WS_FAR 0x15 */\n+/* enum: XAUI Wireside near. */\n+/*               MC_CMD_LOOPBACK_XAUI_WS_NEAR 0x16 */\n+/* enum: GMII Wireside. */\n+/*               MC_CMD_LOOPBACK_GMII_WS 0x17 */\n+/* enum: XFI Wireside. */\n+/*               MC_CMD_LOOPBACK_XFI_WS 0x18 */\n+/* enum: XFI Wireside Far. */\n+/*               MC_CMD_LOOPBACK_XFI_WS_FAR 0x19 */\n+/* enum: PhyXS Wireside. */\n+/*               MC_CMD_LOOPBACK_PHYXS_WS 0x1a */\n+/* enum: PMA lanes MAC-Serdes. */\n+/*               MC_CMD_LOOPBACK_PMA_INT 0x1b */\n+/* enum: KR Serdes Parallel (Encoder). */\n+/*               MC_CMD_LOOPBACK_SD_NEAR 0x1c */\n+/* enum: KR Serdes Serial. */\n+/*               MC_CMD_LOOPBACK_SD_FAR 0x1d */\n+/* enum: PMA lanes MAC-Serdes Wireside. */\n+/*               MC_CMD_LOOPBACK_PMA_INT_WS 0x1e */\n+/* enum: KR Serdes Parallel Wireside (Full PCS). */\n+/*               MC_CMD_LOOPBACK_SD_FEP2_WS 0x1f */\n+/* enum: KR Serdes Parallel Wireside (Sym Aligner to TX). */\n+/*               MC_CMD_LOOPBACK_SD_FEP1_5_WS 0x20 */\n+/* enum: KR Serdes Parallel Wireside (Deserializer to Serializer). */\n+/*               MC_CMD_LOOPBACK_SD_FEP_WS 0x21 */\n+/* enum: KR Serdes Serial Wireside. */\n+/*               MC_CMD_LOOPBACK_SD_FES_WS 0x22 */\n+/* enum: Near side of AOE Siena side port */\n+/*               MC_CMD_LOOPBACK_AOE_INT_NEAR 0x23 */\n+/* enum: Medford Wireside datapath loopback */\n+/*               MC_CMD_LOOPBACK_DATA_WS 0x24 */\n+/* enum: Force link up without setting up any physical loopback (snapper use\n+ * only)\n+ */\n+/*               MC_CMD_LOOPBACK_FORCE_EXT_LINK 0x25 */\n+/* Supported loopbacks. */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_OFST 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LEN 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_OFST 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_LBN 64\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_WIDTH 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_OFST 12\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_LBN 96\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_WIDTH 32\n+/* enum property: bitshift */\n+/*            Enum values, see field(s): */\n+/*               100M */\n+/* Supported loopbacks. */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_OFST 16\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LEN 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_OFST 16\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_LBN 128\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_WIDTH 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_OFST 20\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_LBN 160\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_WIDTH 32\n+/* enum property: bitshift */\n+/*            Enum values, see field(s): */\n+/*               100M */\n+/* Supported loopbacks. */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_OFST 24\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LEN 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_OFST 24\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_LBN 192\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_WIDTH 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_OFST 28\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_LBN 224\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_WIDTH 32\n+/* enum property: bitshift */\n+/*            Enum values, see field(s): */\n+/*               100M */\n+/* Supported loopbacks. */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_OFST 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LEN 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_OFST 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_LBN 256\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_WIDTH 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_OFST 36\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_LBN 288\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_WIDTH 32\n+/* enum property: bitshift */\n+/*            Enum values, see field(s): */\n+/*               100M */\n+/* Supported 25G loopbacks. */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_OFST 40\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LEN 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_OFST 40\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_LBN 320\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_WIDTH 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_OFST 44\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_LBN 352\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_WIDTH 32\n+/* enum property: bitshift */\n+/*            Enum values, see field(s): */\n+/*               100M */\n+/* Supported 50 loopbacks. */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_OFST 48\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LEN 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_OFST 48\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_LBN 384\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_WIDTH 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_OFST 52\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_LBN 416\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_WIDTH 32\n+/* enum property: bitshift */\n+/*            Enum values, see field(s): */\n+/*               100M */\n+/* Supported 100G loopbacks. */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_OFST 56\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LEN 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_OFST 56\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_LBN 448\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_WIDTH 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_OFST 60\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_LBN 480\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_WIDTH 32\n+/* enum property: bitshift */\n+/*            Enum values, see field(s): */\n+/*               100M */\n+/* Supported 200G loopbacks. */\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_OFST 64\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LEN 8\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_OFST 64\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_LBN 512\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_WIDTH 32\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_OFST 68\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_LEN 4\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_LBN 544\n+#define\tMC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_WIDTH 32\n+/* enum property: bitshift */\n /*            Enum values, see field(s): */\n /*               100M */\n \n@@ -5222,6 +6284,54 @@\n /* MC_CMD_GET_LINK_IN msgrequest */\n #define\tMC_CMD_GET_LINK_IN_LEN 0\n \n+/* MC_CMD_GET_LINK_IN_V2 msgrequest */\n+#define\tMC_CMD_GET_LINK_IN_V2_LEN 8\n+/* Target port to request link state for. Uses MAE_LINK_ENDPOINT_SELECTOR which\n+ * identifies a real or virtual network port by MAE port and link end. See the\n+ * structure definition for more details.\n+ */\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_OFST 0\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_LEN 8\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_LO_OFST 0\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_LO_LEN 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_LO_LBN 0\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_LO_WIDTH 32\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_HI_OFST 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_HI_LEN 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_HI_LBN 32\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_HI_WIDTH 32\n+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_OFST 0\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_LEN 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_LINK_END_OFST 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_LINK_END_LEN 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_FLAT_OFST 0\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LEN 8\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_OFST 0\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_LEN 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_LBN 0\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_WIDTH 32\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_OFST 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_LEN 4\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_LBN 32\n+#define\tMC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_WIDTH 32\n+\n /* MC_CMD_GET_LINK_OUT msgresponse */\n #define\tMC_CMD_GET_LINK_OUT_LEN 28\n /* Near-side advertised capabilities. Refer to\n@@ -5498,6 +6608,95 @@\n #define\tMC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_LBN 7\n #define\tMC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_WIDTH 1\n \n+/* MC_CMD_SET_LINK_IN_V3 msgrequest */\n+#define\tMC_CMD_SET_LINK_IN_V3_LEN 28\n+/* Near-side advertised capabilities. Refer to\n+ * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions.\n+ */\n+#define\tMC_CMD_SET_LINK_IN_V3_CAP_OFST 0\n+#define\tMC_CMD_SET_LINK_IN_V3_CAP_LEN 4\n+/* Flags */\n+#define\tMC_CMD_SET_LINK_IN_V3_FLAGS_OFST 4\n+#define\tMC_CMD_SET_LINK_IN_V3_FLAGS_LEN 4\n+#define\tMC_CMD_SET_LINK_IN_V3_LOWPOWER_OFST 4\n+#define\tMC_CMD_SET_LINK_IN_V3_LOWPOWER_LBN 0\n+#define\tMC_CMD_SET_LINK_IN_V3_LOWPOWER_WIDTH 1\n+#define\tMC_CMD_SET_LINK_IN_V3_POWEROFF_OFST 4\n+#define\tMC_CMD_SET_LINK_IN_V3_POWEROFF_LBN 1\n+#define\tMC_CMD_SET_LINK_IN_V3_POWEROFF_WIDTH 1\n+#define\tMC_CMD_SET_LINK_IN_V3_TXDIS_OFST 4\n+#define\tMC_CMD_SET_LINK_IN_V3_TXDIS_LBN 2\n+#define\tMC_CMD_SET_LINK_IN_V3_TXDIS_WIDTH 1\n+#define\tMC_CMD_SET_LINK_IN_V3_LINKDOWN_OFST 4\n+#define\tMC_CMD_SET_LINK_IN_V3_LINKDOWN_LBN 3\n+#define\tMC_CMD_SET_LINK_IN_V3_LINKDOWN_WIDTH 1\n+/* Loopback mode. */\n+#define\tMC_CMD_SET_LINK_IN_V3_LOOPBACK_MODE_OFST 8\n+#define\tMC_CMD_SET_LINK_IN_V3_LOOPBACK_MODE_LEN 4\n+/*            Enum values, see field(s): */\n+/*               MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */\n+/* A loopback speed of \"0\" is supported, and means (choose any available\n+ * speed).\n+ */\n+#define\tMC_CMD_SET_LINK_IN_V3_LOOPBACK_SPEED_OFST 12\n+#define\tMC_CMD_SET_LINK_IN_V3_LOOPBACK_SPEED_LEN 4\n+#define\tMC_CMD_SET_LINK_IN_V3_MODULE_SEQ_OFST 16\n+#define\tMC_CMD_SET_LINK_IN_V3_MODULE_SEQ_LEN 1\n+#define\tMC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_OFST 16\n+#define\tMC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_LBN 0\n+#define\tMC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_WIDTH 7\n+#define\tMC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_OFST 16\n+#define\tMC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_LBN 7\n+#define\tMC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_WIDTH 1\n+/* Padding */\n+#define\tMC_CMD_SET_LINK_IN_V3_RESERVED_OFST 17\n+#define\tMC_CMD_SET_LINK_IN_V3_RESERVED_LEN 3\n+/* Target port to set link state for. Uses MAE_LINK_ENDPOINT_SELECTOR which\n+ * identifies a real or virtual network port by MAE port and link end. See the\n+ * structure definition for more details\n+ */\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_OFST 20\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_LEN 8\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_LO_OFST 20\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_LO_LEN 4\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_LO_LBN 160\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_LO_WIDTH 32\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_HI_OFST 24\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_HI_LEN 4\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_HI_LBN 192\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_HI_WIDTH 32\n+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_OFST 20\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_LEN 4\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FLAT_OFST 20\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FLAT_LEN 4\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_TYPE_OFST 23\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_TYPE_LEN 1\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 20\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 160\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 180\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 176\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 22\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 20\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_LINK_END_OFST 24\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_LINK_END_LEN 4\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_FLAT_OFST 20\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LEN 8\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_OFST 20\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_LEN 4\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_LBN 160\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_WIDTH 32\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_OFST 24\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_LEN 4\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_LBN 192\n+#define\tMC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_WIDTH 32\n+\n /* MC_CMD_SET_LINK_OUT msgresponse */\n #define\tMC_CMD_SET_LINK_OUT_LEN 0\n \n@@ -5719,19 +6918,9 @@\n #define\tMC_CMD_SET_MAC_V3_IN_CFG_FCS_OFST 28\n #define\tMC_CMD_SET_MAC_V3_IN_CFG_FCS_LBN 4\n #define\tMC_CMD_SET_MAC_V3_IN_CFG_FCS_WIDTH 1\n-/* Identifies the MAC to update by the specifying the end of a logical MAE\n- * link. Setting TARGET to MAE_LINK_ENDPOINT_COMPAT is equivalent to using the\n- * previous version of the command (MC_CMD_SET_MAC_EXT). Not all possible\n- * combinations of MPORT_END and MPORT_SELECTOR in TARGET will work in all\n- * circumstances. 1. Some will always work (e.g. a VF can always address its\n- * logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), 2. Some are not\n- * meaningful and will always fail with EINVAL (e.g. attempting to address the\n- * VNIC end of a link to a physical port), 3. Some are meaningful but require\n- * the MCDI client to have the required permission and fail with EPERM\n- * otherwise (e.g. trying to set the MAC on a VF the caller cannot administer),\n- * and 4. Some could be implementation-specific and fail with ENOTSUP if not\n- * available (no examples exist right now). See SF-123581-TC section 4.3 for\n- * more details.\n+/* Target port to set mac state for. Uses MAE_LINK_ENDPOINT_SELECTOR which\n+ * identifies a real or virtual network port by MAE port and link end. See the\n+ * structure definition for more details\n  */\n #define\tMC_CMD_SET_MAC_V3_IN_TARGET_OFST 32\n #define\tMC_CMD_SET_MAC_V3_IN_TARGET_LEN 8\n@@ -5743,6 +6932,7 @@\n #define\tMC_CMD_SET_MAC_V3_IN_TARGET_HI_LEN 4\n #define\tMC_CMD_SET_MAC_V3_IN_TARGET_HI_LBN 288\n #define\tMC_CMD_SET_MAC_V3_IN_TARGET_HI_WIDTH 32\n+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */\n #define\tMC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_OFST 32\n #define\tMC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_LEN 4\n #define\tMC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 32\n@@ -5938,6 +7128,98 @@\n #define\tMC_CMD_MAC_STATS_IN_PORT_ID_OFST 16\n #define\tMC_CMD_MAC_STATS_IN_PORT_ID_LEN 4\n \n+/* MC_CMD_MAC_STATS_V2_IN msgrequest */\n+#define\tMC_CMD_MAC_STATS_V2_IN_LEN 28\n+/* ??? */\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_ADDR_OFST 0\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LEN 8\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_OFST 0\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_LEN 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_LBN 0\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_WIDTH 32\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_OFST 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_LEN 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_LBN 32\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_WIDTH 32\n+#define\tMC_CMD_MAC_STATS_V2_IN_CMD_OFST 8\n+#define\tMC_CMD_MAC_STATS_V2_IN_CMD_LEN 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_OFST 8\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_LBN 0\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_WIDTH 1\n+#define\tMC_CMD_MAC_STATS_V2_IN_CLEAR_OFST 8\n+#define\tMC_CMD_MAC_STATS_V2_IN_CLEAR_LBN 1\n+#define\tMC_CMD_MAC_STATS_V2_IN_CLEAR_WIDTH 1\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_OFST 8\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_LBN 2\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_WIDTH 1\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_OFST 8\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_LBN 3\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_WIDTH 1\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_OFST 8\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_LBN 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_WIDTH 1\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_OFST 8\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_LBN 5\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_WIDTH 1\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIOD_MS_OFST 8\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIOD_MS_LBN 16\n+#define\tMC_CMD_MAC_STATS_V2_IN_PERIOD_MS_WIDTH 16\n+/* DMA length. Should be set to MAC_STATS_NUM_STATS * sizeof(uint64_t), as\n+ * returned by MC_CMD_GET_CAPABILITIES_V4_OUT. For legacy firmware not\n+ * supporting MC_CMD_GET_CAPABILITIES_V4_OUT, DMA_LEN should be set to\n+ * MC_CMD_MAC_NSTATS * sizeof(uint64_t)\n+ */\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_LEN_OFST 12\n+#define\tMC_CMD_MAC_STATS_V2_IN_DMA_LEN_LEN 4\n+/* port id so vadapter stats can be provided */\n+#define\tMC_CMD_MAC_STATS_V2_IN_PORT_ID_OFST 16\n+#define\tMC_CMD_MAC_STATS_V2_IN_PORT_ID_LEN 4\n+/* Target port to request statistics for. Uses MAE_LINK_ENDPOINT_SELECTOR which\n+ * identifies a real or virtual network port by MAE port and link end. See the\n+ * structure definition for more details\n+ */\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_OFST 20\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_LEN 8\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_LO_OFST 20\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_LO_LEN 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_LO_LBN 160\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_LO_WIDTH 32\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_HI_OFST 24\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_HI_LEN 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_HI_LBN 192\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_HI_WIDTH 32\n+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_OFST 20\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_LEN 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 20\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FLAT_LEN 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_TYPE_OFST 23\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_TYPE_LEN 1\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 20\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 160\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 180\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 176\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 22\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 20\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_LINK_END_OFST 24\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_LINK_END_LEN 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_OFST 20\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LEN 8\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_OFST 20\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_LEN 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_LBN 160\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_WIDTH 32\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_OFST 24\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_LEN 4\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_LBN 192\n+#define\tMC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_WIDTH 32\n+\n /* MC_CMD_MAC_STATS_OUT_DMA msgresponse */\n #define\tMC_CMD_MAC_STATS_OUT_DMA_LEN 0\n \n@@ -5954,6 +7236,7 @@\n #define\tMC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LBN 32\n #define\tMC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_WIDTH 32\n #define\tMC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS\n+/* enum property: index */\n #define\tMC_CMD_MAC_GENERATION_START 0x0 /* enum */\n #define\tMC_CMD_MAC_DMABUF_START 0x1 /* enum */\n #define\tMC_CMD_MAC_TX_PKTS 0x1 /* enum */\n@@ -6116,6 +7399,7 @@\n #define\tMC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LBN 32\n #define\tMC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_WIDTH 32\n #define\tMC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V2\n+/* enum property: index */\n /* enum: Start of FEC stats buffer space, Medford2 and up */\n #define\tMC_CMD_MAC_FEC_DMABUF_START 0x61\n /* enum: Number of uncorrected FEC codewords on link (RS-FEC only for Medford2)\n@@ -6155,6 +7439,7 @@\n #define\tMC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LBN 32\n #define\tMC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_WIDTH 32\n #define\tMC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3\n+/* enum property: index */\n /* enum: Start of CTPIO stats buffer space, Medford2 and up */\n #define\tMC_CMD_MAC_CTPIO_DMABUF_START 0x68\n /* enum: Number of CTPIO fallbacks because a DMA packet was in progress on the\n@@ -6235,6 +7520,7 @@\n #define\tMC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LBN 32\n #define\tMC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_WIDTH 32\n #define\tMC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V4\n+/* enum property: index */\n /* enum: Start of V4 stats buffer space */\n #define\tMC_CMD_MAC_V4_DMABUF_START 0x79\n /* enum: RXDP counter: Number of packets truncated because scattering was\n@@ -6522,6 +7808,7 @@\n #define\tMC_CMD_WOL_FILTER_RESET_IN_LEN 4\n #define\tMC_CMD_WOL_FILTER_RESET_IN_MASK_OFST 0\n #define\tMC_CMD_WOL_FILTER_RESET_IN_MASK_LEN 4\n+/* enum property: bitmask */\n #define\tMC_CMD_WOL_FILTER_RESET_IN_WAKE_FILTERS 0x1 /* enum */\n #define\tMC_CMD_WOL_FILTER_RESET_IN_LIGHTSOUT_OFFLOADS 0x2 /* enum */\n \n@@ -6566,6 +7853,7 @@\n /* Bit mask of supported types. */\n #define\tMC_CMD_NVRAM_TYPES_OUT_TYPES_OFST 0\n #define\tMC_CMD_NVRAM_TYPES_OUT_TYPES_LEN 4\n+/* enum property: bitshift */\n /* enum: Disabled callisto. */\n #define\tMC_CMD_NVRAM_TYPE_DISABLED_CALLISTO 0x0\n /* enum: MC firmware. */\n@@ -7613,6 +8901,54 @@\n /* MC_CMD_GET_PHY_STATE_IN msgrequest */\n #define\tMC_CMD_GET_PHY_STATE_IN_LEN 0\n \n+/* MC_CMD_GET_PHY_STATE_IN_V2 msgrequest */\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_LEN 8\n+/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which\n+ * identifies a real or virtual network port by MAE port and link end. See the\n+ * structure definition for more details.\n+ */\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_OFST 0\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_LEN 8\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_OFST 0\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_LEN 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_LBN 0\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_WIDTH 32\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_OFST 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_LEN 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_LBN 32\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_WIDTH 32\n+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_OFST 0\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_LEN 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_LINK_END_OFST 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_LINK_END_LEN 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_OFST 0\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LEN 8\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_OFST 0\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_LEN 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_LBN 0\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_WIDTH 32\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_OFST 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_LEN 4\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_LBN 32\n+#define\tMC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_WIDTH 32\n+\n /* MC_CMD_GET_PHY_STATE_OUT msgresponse */\n #define\tMC_CMD_GET_PHY_STATE_OUT_LEN 4\n #define\tMC_CMD_GET_PHY_STATE_OUT_STATE_OFST 0\n@@ -7884,6 +9220,62 @@\n #define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_DSFP_BANK_LBN 16\n #define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_DSFP_BANK_WIDTH 16\n \n+/* MC_CMD_GET_PHY_MEDIA_INFO_IN_V2 msgrequest */\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_LEN 12\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_PAGE_OFST 0\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_PAGE_LEN 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_OFST 0\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_LBN 0\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_WIDTH 16\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_OFST 0\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_LBN 16\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_WIDTH 16\n+/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which\n+ * identifies a real or virtual network port by MAE port and link end. See the\n+ * structure definition for more details\n+ */\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_OFST 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LEN 8\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_OFST 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_LEN 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_LBN 32\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_WIDTH 32\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_OFST 8\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_LEN 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_LBN 64\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_WIDTH 32\n+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_OFST 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_LEN 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 7\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 32\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 52\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 48\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 6\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LINK_END_OFST 8\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LINK_END_LEN 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_OFST 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LEN 8\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_OFST 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_LEN 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_LBN 32\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_WIDTH 32\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_OFST 8\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_LEN 4\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_LBN 64\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_WIDTH 32\n+\n /* MC_CMD_GET_PHY_MEDIA_INFO_OUT msgresponse */\n #define\tMC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMIN 5\n #define\tMC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX 252\n@@ -9069,27 +10461,22 @@\n  * and a generation count for this version of the sensor table. On systems\n  * advertising the DYNAMIC_SENSORS capability bit, this replaces the\n  * MC_CMD_READ_SENSORS command. On multi-MC systems this may include sensors\n- * added by the NMC.\n- *\n- * Sensor handles are persistent for the lifetime of the sensor and are used to\n- * identify sensors in MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and\n- * MC_CMD_DYNAMIC_SENSORS_GET_VALUES.\n- *\n- * The generation count is maintained by the MC, is persistent across reboots\n- * and will be incremented each time the sensor table is modified. When the\n- * table is modified, a CODE_DYNAMIC_SENSORS_CHANGE event will be generated\n- * containing the new generation count. The driver should compare this against\n- * the current generation count, and if it is different, call\n- * MC_CMD_DYNAMIC_SENSORS_LIST again to update it's copy of the sensor table.\n- *\n- * The sensor count is provided to allow a future path to supporting more than\n+ * added by the NMC. Sensor handles are persistent for the lifetime of the\n+ * sensor and are used to identify sensors in\n+ * MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and\n+ * MC_CMD_DYNAMIC_SENSORS_GET_VALUES. The generation count is maintained by the\n+ * MC, is persistent across reboots and will be incremented each time the\n+ * sensor table is modified. When the table is modified, a\n+ * CODE_DYNAMIC_SENSORS_CHANGE event will be generated containing the new\n+ * generation count. The driver should compare this against the current\n+ * generation count, and if it is different, call MC_CMD_DYNAMIC_SENSORS_LIST\n+ * again to update it's copy of the sensor table. The sensor count is provided\n+ * to allow a future path to supporting more than\n  * MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MAXNUM_MCDI2 sensors, i.e.\n  * the maximum number that will fit in a single response. As this is a fairly\n  * large number (253) it is not anticipated that this will be needed in the\n- * near future, so can currently be ignored.\n- *\n- * On Riverhead this command is implemented as a a wrapper for `list` in the\n- * sensor_query SPHINX service.\n+ * near future, so can currently be ignored. On Riverhead this command is\n+ * implemented as a wrapper for `list` in the sensor_query SPHINX service.\n  */\n #define\tMC_CMD_DYNAMIC_SENSORS_LIST 0x66\n #define\tMC_CMD_DYNAMIC_SENSORS_LIST_MSGSET 0x66\n@@ -9127,15 +10514,13 @@\n /***********************************/\n /* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS\n  * Get descriptions for a set of sensors, specified as an array of sensor\n- * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST\n- *\n- * Any handles which do not correspond to a sensor currently managed by the MC\n- * will be dropped from from the response. This may happen when a sensor table\n- * update is in progress, and effectively means the set of usable sensors is\n- * the intersection between the sets of sensors known to the driver and the MC.\n- *\n- * On Riverhead this command is implemented as a a wrapper for\n- * `get_descriptions` in the sensor_query SPHINX service.\n+ * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. Any handles which do not\n+ * correspond to a sensor currently managed by the MC will be dropped from from\n+ * the response. This may happen when a sensor table update is in progress, and\n+ * effectively means the set of usable sensors is the intersection between the\n+ * sets of sensors known to the driver and the MC. On Riverhead this command is\n+ * implemented as a wrapper for `get_descriptions` in the sensor_query SPHINX\n+ * service.\n  */\n #define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67\n #define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_MSGSET 0x67\n@@ -9173,19 +10558,15 @@\n /***********************************/\n /* MC_CMD_DYNAMIC_SENSORS_GET_READINGS\n  * Read the state and value for a set of sensors, specified as an array of\n- * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST.\n- *\n- * In the case of a broken sensor, then the state of the response's\n- * MC_CMD_DYNAMIC_SENSORS_VALUE entry will be set to BROKEN, and any value\n- * provided should be treated as erroneous.\n- *\n- * Any handles which do not correspond to a sensor currently managed by the MC\n- * will be dropped from from the response. This may happen when a sensor table\n- * update is in progress, and effectively means the set of usable sensors is\n- * the intersection between the sets of sensors known to the driver and the MC.\n- *\n- * On Riverhead this command is implemented as a a wrapper for `get_readings`\n- * in the sensor_query SPHINX service.\n+ * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. In the case of a\n+ * broken sensor, then the state of the response's MC_CMD_DYNAMIC_SENSORS_VALUE\n+ * entry will be set to BROKEN, and any value provided should be treated as\n+ * erroneous. Any handles which do not correspond to a sensor currently managed\n+ * by the MC will be dropped from from the response. This may happen when a\n+ * sensor table update is in progress, and effectively means the set of usable\n+ * sensors is the intersection between the sets of sensors known to the driver\n+ * and the MC. On Riverhead this command is implemented as a wrapper for\n+ * `get_readings` in the sensor_query SPHINX service.\n  */\n #define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68\n #define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_MSGSET 0x68\n@@ -11629,6 +13010,9 @@\n #define\tMC_CMD_FILTER_OP_IN_MATCH_FWDEF1_OFST 16\n #define\tMC_CMD_FILTER_OP_IN_MATCH_FWDEF1_LBN 11\n #define\tMC_CMD_FILTER_OP_IN_MATCH_FWDEF1_WIDTH 1\n+#define\tMC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_OFST 16\n+#define\tMC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_LBN 29\n+#define\tMC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_WIDTH 1\n #define\tMC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_OFST 16\n #define\tMC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_LBN 30\n #define\tMC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1\n@@ -11833,6 +13217,9 @@\n #define\tMC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_OFST 16\n #define\tMC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_LBN 25\n #define\tMC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_WIDTH 1\n+#define\tMC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_OFST 16\n+#define\tMC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_LBN 29\n+#define\tMC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_WIDTH 1\n #define\tMC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_OFST 16\n #define\tMC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_LBN 30\n #define\tMC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1\n@@ -12118,6 +13505,9 @@\n #define\tMC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_OFST 16\n #define\tMC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_LBN 25\n #define\tMC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_WIDTH 1\n+#define\tMC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_OFST 16\n+#define\tMC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_LBN 29\n+#define\tMC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_WIDTH 1\n #define\tMC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_MCAST_DST_OFST 16\n #define\tMC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_MCAST_DST_LBN 30\n #define\tMC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1\n@@ -12663,6 +14053,7 @@\n #define\tMC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_OFST 0\n #define\tMC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_LEN 4\n #define\tMC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_NUM 4\n+/* enum property: bitmask */\n #define\tMC_CMD_PARSER_DISP_RW_OUT_DP0 0x1 /* enum */\n #define\tMC_CMD_PARSER_DISP_RW_OUT_DP1 0x2 /* enum */\n \n@@ -13511,10 +14902,9 @@\n \n /***********************************/\n /* MC_CMD_GET_CAPABILITIES\n- * Get device capabilities.\n- *\n- * This is supplementary to the MC_CMD_GET_BOARD_CFG command, and intended to\n- * reference inherent device capabilities as opposed to current NVRAM config.\n+ * Get device capabilities. This is supplementary to the MC_CMD_GET_BOARD_CFG\n+ * command, and intended to reference inherent device capabilities as opposed\n+ * to current NVRAM config.\n  */\n #define\tMC_CMD_GET_CAPABILITIES 0xbe\n #define\tMC_CMD_GET_CAPABILITIES_MSGSET 0xbe\n@@ -16473,6 +17863,15 @@\n #define\tMC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148\n #define\tMC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12\n #define\tMC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13\n+#define\tMC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14\n+#define\tMC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_LBN 15\n+#define\tMC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1\n \n /* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */\n #define\tMC_CMD_GET_CAPABILITIES_V8_OUT_LEN 160\n@@ -16974,6 +18373,15 @@\n #define\tMC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148\n #define\tMC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12\n #define\tMC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13\n+#define\tMC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14\n+#define\tMC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_LBN 15\n+#define\tMC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1\n /* These bits are reserved for communicating test-specific capabilities to\n  * host-side test software. All production drivers should treat this field as\n  * opaque.\n@@ -17489,6 +18897,15 @@\n #define\tMC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148\n #define\tMC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12\n #define\tMC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13\n+#define\tMC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14\n+#define\tMC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_LBN 15\n+#define\tMC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1\n /* These bits are reserved for communicating test-specific capabilities to\n  * host-side test software. All production drivers should treat this field as\n  * opaque.\n@@ -18039,6 +19456,15 @@\n #define\tMC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148\n #define\tMC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12\n #define\tMC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13\n+#define\tMC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14\n+#define\tMC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_OFST 148\n+#define\tMC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_LBN 15\n+#define\tMC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1\n /* These bits are reserved for communicating test-specific capabilities to\n  * host-side test software. All production drivers should treat this field as\n  * opaque.\n@@ -18134,6 +19560,13 @@\n  * are not defined.\n  */\n #define\tMC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_TSA 0x1\n+/* enum: MCDI command used for platform management. Typically, these commands\n+ * are used for low-level operations directed at the platform as a whole (e.g.\n+ * MMIO device enumeration) rather than individual functions and use a\n+ * dedicated comms channel (e.g. RPmsg/IPI). May be handled by the same or\n+ * different CPU as MCDI_MESSAGE_TYPE_MC.\n+ */\n+#define\tMC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_PLATFORM 0x2\n \n \n /***********************************/\n@@ -22051,8 +23484,8 @@\n  * TLV_PORT_MODE_*). A superset of MC_CMD_GET_PORT_MODES_OUT/MODES that\n  * contains all modes implemented in firmware for a particular board. Modes\n  * listed in MODES are considered production modes and should be exposed in\n- * userland tools. Modes listed in in ENGINEERING_MODES, but not in MODES\n- * should be considered hidden (not to be exposed in userland tools) and for\n+ * userland tools. Modes listed in ENGINEERING_MODES, but not in MODES should\n+ * be considered hidden (not to be exposed in userland tools) and for\n  * engineering use only. There are no other semantic differences and any mode\n  * listed in either MODES or ENGINEERING_MODES can be set on the board.\n  */\n@@ -26509,6 +27942,7 @@\n #define\tMC_CMD_FPGA_OP_GET_MAC_STATS_OUT_STATISTICS_MINNUM 0\n #define\tMC_CMD_FPGA_OP_GET_MAC_STATS_OUT_STATISTICS_MAXNUM 31\n #define\tMC_CMD_FPGA_OP_GET_MAC_STATS_OUT_STATISTICS_MAXNUM_MCDI2 127\n+/* enum property: index */\n #define\tMC_CMD_FPGA_MAC_TX_TOTAL_PACKETS 0x0 /* enum */\n #define\tMC_CMD_FPGA_MAC_TX_TOTAL_BYTES 0x1 /* enum */\n #define\tMC_CMD_FPGA_MAC_TX_TOTAL_GOOD_PACKETS 0x2 /* enum */\n@@ -26617,6 +28051,65 @@\n /* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT msgresponse */\n #define\tMC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT_LEN 0\n \n+\n+/***********************************/\n+/* MC_CMD_GET_BUFTBL_STATS\n+ * Currently EF10 only. Read usage and limits for Buffer Table\n+ */\n+#define\tMC_CMD_GET_BUFTBL_STATS 0x6a\n+#define\tMC_CMD_GET_BUFTBL_STATS_MSGSET 0x6a\n+#undef\tMC_CMD_0x6a_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x6a_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_GET_BUFTBL_STATS_IN msgrequest */\n+#define\tMC_CMD_GET_BUFTBL_STATS_IN_LEN 0\n+\n+/* MC_CMD_GET_BUFTBL_STATS_OUT msgresponse */\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_LEN 40\n+/* number of buffer table entries per set */\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_ENTRIES_PER_SET_OFST 0\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_ENTRIES_PER_SET_LEN 4\n+/* number of buffer table entries per cluster */\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_ENTRIES_PER_CLUSTER_OFST 4\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_ENTRIES_PER_CLUSTER_LEN 4\n+/* Maximum size buffer table can grow to, in clusters. On EF10, this can\n+ * potentially vary depending on the size of the Descriptor Cache.\n+ */\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MAX_CLUSTERS_OFST 8\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MAX_CLUSTERS_LEN 4\n+/* High water mark for number of buffer table clusters which have been\n+ * allocated.\n+ */\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_HIGH_WATER_CLUSTERS_OFST 12\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_HIGH_WATER_CLUSTERS_LEN 4\n+/* Number of free buffer table clusters on the free cluster list. */\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_FREE_CLUSTERS_OFST 16\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_FREE_CLUSTERS_LEN 4\n+/* Number of free buffer table sets on the free set list. */\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_FREE_SETS_OFST 20\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_FREE_SETS_LEN 4\n+/* Number of chunks of fully-used clusters allocated to the MC for EVQ, RXQ and\n+ * TXQs.\n+ */\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MC_FULL_CLUSTERS_OFST 24\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MC_FULL_CLUSTERS_LEN 4\n+/* Number of chunks in partially-used clusters allocated to the MC for EVQ, RXQ\n+ * and TXQs.\n+ */\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MC_PART_CLUSTERS_OFST 28\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MC_PART_CLUSTERS_LEN 4\n+/* Number of buffer table sets (chunks) allocated to the host via\n+ * MC_CMD_ALLOC_BUFTBL_CHUNK.\n+ */\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_HOST_SETS_OFST 32\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_HOST_SETS_LEN 4\n+/* Maximum number of VIs per NIC. On EF10 this is the current value as used to\n+ * size the Descriptor Cache in hardware.\n+ */\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_VI_MAX_OFST 36\n+#define\tMC_CMD_GET_BUFTBL_STATS_OUT_VI_MAX_LEN 4\n+\n /* CLIENT_HANDLE structuredef: A client is an abstract entity that can make\n  * requests of the device and that can own resources managed by the device.\n  * Examples of clients include PCIe functions and dynamic clients. A client\n@@ -26684,8 +28177,8 @@\n \n /* SCHED_CREDIT_CHECK_RESULT structuredef */\n #define\tSCHED_CREDIT_CHECK_RESULT_LEN 16\n-/* The instance of the scheduler. Refer to XN-200389-AW for the location of\n- * these schedulers in the hardware.\n+/* The instance of the scheduler. Refer to XN-200389-AW (snic/hnic) and\n+ * XN-200425-TC (cdx) for the location of these schedulers in the hardware.\n  */\n #define\tSCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_OFST 0\n #define\tSCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LEN 1\n@@ -26697,6 +28190,18 @@\n #define\tSCHED_CREDIT_CHECK_RESULT_HUB_HOST_D 0x5 /* enum */\n #define\tSCHED_CREDIT_CHECK_RESULT_HUB_REPLAY 0x6 /* enum */\n #define\tSCHED_CREDIT_CHECK_RESULT_DMAC_H2C 0x7 /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_HUB_NET_B 0x8 /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_HUB_NET_REPLAY 0x9 /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_ADAPTER_C2H_C 0xa /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_A2_H2C_C 0xb /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_A3_SOFT_ADAPTOR_C 0xc /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_A4_DPU_WRITE_C 0xd /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_JRC_RRU 0xe /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_CDM_SINK 0xf /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_PCIE_SINK 0x10 /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_UPORT_SINK 0x11 /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_PSX_SINK 0x12 /* enum */\n+#define\tSCHED_CREDIT_CHECK_RESULT_A5_DPU_READ_C 0x13 /* enum */\n #define\tSCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LBN 0\n #define\tSCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_WIDTH 8\n /* The type of node that this result refers to. */\n@@ -26706,6 +28211,10 @@\n #define\tSCHED_CREDIT_CHECK_RESULT_DEST 0x0\n /* enum: Source node */\n #define\tSCHED_CREDIT_CHECK_RESULT_SOURCE 0x1\n+/* enum: Destination node credit type 1 (new to the Keystone schedulers, see\n+ * SF-120268-TC)\n+ */\n+#define\tSCHED_CREDIT_CHECK_RESULT_DEST_CREDIT1 0x2\n #define\tSCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LBN 8\n #define\tSCHED_CREDIT_CHECK_RESULT_NODE_TYPE_WIDTH 8\n /* Level of node in scheduler hierarchy (level 0 is the bottom of the\n@@ -27813,6 +29322,51 @@\n #define\tMC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM 14\n #define\tMC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM_MCDI2 62\n \n+\n+/***********************************/\n+/* MC_CMD_TXQ_STATS\n+ * Query per-TXQ statistics.\n+ */\n+#define\tMC_CMD_TXQ_STATS 0x1d5\n+#define\tMC_CMD_TXQ_STATS_MSGSET 0x1d5\n+#undef\tMC_CMD_0x1d5_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x1d5_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_TXQ_STATS_IN msgrequest */\n+#define\tMC_CMD_TXQ_STATS_IN_LEN 8\n+/* Instance of TXQ to retrieve statistics for */\n+#define\tMC_CMD_TXQ_STATS_IN_INSTANCE_OFST 0\n+#define\tMC_CMD_TXQ_STATS_IN_INSTANCE_LEN 4\n+/* Flags for the request */\n+#define\tMC_CMD_TXQ_STATS_IN_FLAGS_OFST 4\n+#define\tMC_CMD_TXQ_STATS_IN_FLAGS_LEN 4\n+#define\tMC_CMD_TXQ_STATS_IN_CLEAR_OFST 4\n+#define\tMC_CMD_TXQ_STATS_IN_CLEAR_LBN 0\n+#define\tMC_CMD_TXQ_STATS_IN_CLEAR_WIDTH 1\n+\n+/* MC_CMD_TXQ_STATS_OUT msgresponse */\n+#define\tMC_CMD_TXQ_STATS_OUT_LENMIN 0\n+#define\tMC_CMD_TXQ_STATS_OUT_LENMAX 248\n+#define\tMC_CMD_TXQ_STATS_OUT_LENMAX_MCDI2 1016\n+#define\tMC_CMD_TXQ_STATS_OUT_LEN(num) (0+8*(num))\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_NUM(len) (((len)-0)/8)\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_OFST 0\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_LEN 8\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_LO_OFST 0\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_LO_LEN 4\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_LO_LBN 0\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_LO_WIDTH 32\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_HI_OFST 4\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_HI_LEN 4\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_HI_LBN 32\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_HI_WIDTH 32\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_MINNUM 0\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_MAXNUM 31\n+#define\tMC_CMD_TXQ_STATS_OUT_STATISTICS_MAXNUM_MCDI2 127\n+/* enum property: index */\n+#define\tMC_CMD_TXQ_STATS_CTPIO_MAX_FILL 0x0 /* enum */\n+\n /* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are\n  * defined in SF-120734-TC with more information in SF-122717-TC.\n  */\n@@ -28296,6 +29850,7 @@\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LEN 4\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LBN 32\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_WIDTH 32\n+/* See structuredef: PCIE_FUNCTION */\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_OFST 0\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_LEN 2\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_OFST 2\n@@ -28332,6 +29887,7 @@\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LEN 4\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LBN 64\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_WIDTH 32\n+/* See structuredef: PCIE_FUNCTION */\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_OFST 4\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_LEN 2\n #define\tMC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_OFST 6\n@@ -28709,6 +30265,7 @@\n #define\tMC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LEN 4\n #define\tMC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LBN 64\n #define\tMC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_WIDTH 32\n+/* See structuredef: PCIE_FUNCTION */\n #define\tMC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_OFST 4\n #define\tMC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_LEN 2\n #define\tMC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_OFST 6\n@@ -28788,6 +30345,7 @@\n #define\tDESC_PROXY_FUNC_MAP_FUNC_HI_WIDTH 32\n #define\tDESC_PROXY_FUNC_MAP_FUNC_LBN 0\n #define\tDESC_PROXY_FUNC_MAP_FUNC_WIDTH 64\n+/* See structuredef: PCIE_FUNCTION */\n #define\tDESC_PROXY_FUNC_MAP_FUNC_PF_OFST 0\n #define\tDESC_PROXY_FUNC_MAP_FUNC_PF_LEN 2\n #define\tDESC_PROXY_FUNC_MAP_FUNC_PF_LBN 0\n@@ -28851,6 +30409,27 @@\n #define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MINNUM 0\n #define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MAXNUM 4\n #define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MAXNUM_MCDI2 19\n+/* See structuredef: DESC_PROXY_FUNC_MAP */\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_OFST 4\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_LEN 8\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_LO_OFST 4\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_LO_LEN 4\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_LO_LBN 32\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_LO_WIDTH 32\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_HI_OFST 8\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_HI_LEN 4\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_HI_LBN 64\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_HI_WIDTH 32\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_PF_OFST 4\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_PF_LEN 2\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_VF_OFST 6\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_VF_LEN 2\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_INTF_OFST 8\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_INTF_LEN 4\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_PERSONALITY_OFST 12\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_PERSONALITY_LEN 4\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_LABEL_OFST 16\n+#define\tMC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_LABEL_LEN 40\n \n \n /***********************************/\n@@ -29015,6 +30594,7 @@\n #define\tMC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MINNUM 0\n #define\tMC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MAXNUM 63\n #define\tMC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MAXNUM_MCDI2 255\n+/* See structuredef: QUEUE_ID */\n #define\tMC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_ABS_VI_OFST 0\n #define\tMC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_ABS_VI_LEN 2\n #define\tMC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_REL_QUEUE_LBN 16\n@@ -29082,6 +30662,7 @@\n #define\tMC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LEN 4\n #define\tMC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LBN 64\n #define\tMC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_WIDTH 32\n+/* See structuredef: PCIE_FUNCTION */\n #define\tMC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_OFST 4\n #define\tMC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_LEN 2\n #define\tMC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_OFST 6\n@@ -29162,6 +30743,7 @@\n  * backwards compatibility only, callers should use PCIE_INTERFACE_CALLER.\n  */\n #define\tMC_CMD_GET_CLIENT_HANDLE_IN_PCIE_FUNCTION_INTF_NULL 0xffffffff\n+/* See structuredef: PCIE_FUNCTION */\n #define\tMC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_OFST 4\n #define\tMC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_LEN 2\n #define\tMC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_OFST 6\n@@ -29320,6 +30902,7 @@\n #define\tMAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LEN 1\n #define\tMAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LBN 1096\n #define\tMAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_WIDTH 8\n+/* Deprecated in favour of ENC_FLAGS alias. */\n #define\tMAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_OFST 138\n #define\tMAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LEN 1\n #define\tMAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_OFST 138\n@@ -29333,10 +30916,12 @@\n #define\tMAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_WIDTH 1\n #define\tMAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LBN 1104\n #define\tMAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_WIDTH 8\n+/* More generic alias for ENC_VLAN_FLAGS. */\n #define\tMAE_ENC_FIELD_PAIRS_ENC_FLAGS_OFST 138\n #define\tMAE_ENC_FIELD_PAIRS_ENC_FLAGS_LEN 1\n #define\tMAE_ENC_FIELD_PAIRS_ENC_FLAGS_LBN 1104\n #define\tMAE_ENC_FIELD_PAIRS_ENC_FLAGS_WIDTH 8\n+/* Deprecated in favour of ENC_FLAGS_MASK alias. */\n #define\tMAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_OFST 139\n #define\tMAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LEN 1\n #define\tMAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_OFST 139\n@@ -29350,6 +30935,7 @@\n #define\tMAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_WIDTH 1\n #define\tMAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LBN 1112\n #define\tMAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_WIDTH 8\n+/* More generic alias for ENC_FLAGS_MASK. */\n #define\tMAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_OFST 139\n #define\tMAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LEN 1\n #define\tMAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LBN 1112\n@@ -29503,6 +31089,10 @@\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_IP_TOS_MASK_LEN 1\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_IP_TOS_MASK_LBN 1144\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_IP_TOS_MASK_WIDTH 8\n+/* Due to hardware limitations, firmware may return\n+ * MC_CMD_ERR_EINVAL(BAD_IP_TTL) when attempting to match on an IP_TTL value\n+ * other than 1.\n+ */\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_IP_TTL_OFST 144\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_IP_TTL_LEN 1\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_IP_TTL_LBN 1152\n@@ -29826,6 +31416,10 @@\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TOS_MASK_LEN 1\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TOS_MASK_LBN 1144\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TOS_MASK_WIDTH 8\n+/* Due to hardware limitations, firmware may return\n+ * MC_CMD_ERR_EINVAL(BAD_IP_TTL) when attempting to match on an IP_TTL value\n+ * other than 1.\n+ */\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TTL_OFST 144\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TTL_LEN 1\n #define\tMAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TTL_LBN 1152\n@@ -30120,7 +31714,7 @@\n /* MAE_MPORT_SELECTOR structuredef: MPORTS are identified by an opaque unsigned\n  * integer value (mport_id) that is guaranteed to be representable within\n  * 32-bits or within any NIC interface field that needs store the value\n- * (whichever is narrowers). This selector structure provides a stable way to\n+ * (whichever is narrower). This selector structure provides a stable way to\n  * refer to m-ports.\n  */\n #define\tMAE_MPORT_SELECTOR_LEN 4\n@@ -30195,10 +31789,22 @@\n #define\tMAE_MPORT_SELECTOR_FLAT_WIDTH 32\n \n /* MAE_LINK_ENDPOINT_SELECTOR structuredef: Structure that identifies a real or\n- * virtual network port by MAE port and link end\n+ * virtual network port by MAE port and link end. Intended to be used by\n+ * network port MCDI commands. Setting FLAT to MAE_LINK_ENDPOINT_COMPAT is\n+ * equivalent to using the previous version of the command. Not all possible\n+ * combinations of MPORT_END and MPORT_SELECTOR in MAE_LINK_ENDPOINT_SELECTOR\n+ * will work in all circumstances. 1. Some will always work (e.g. a VF can\n+ * always address its logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC),\n+ * 2. Some are not meaningful and will always fail with EINVAL (e.g. attempting\n+ * to address the VNIC end of a link to a physical port), 3. Some are\n+ * meaningful but require the MCDI client to have the required permission and\n+ * fail with EPERM otherwise (e.g. trying to set the MAC on a VF the caller\n+ * cannot administer), and 4. Some could be implementation-specific and fail\n+ * with ENOTSUP if not available (no examples exist right now). See\n+ * SF-123581-TC section 4.3 for more details.\n  */\n #define\tMAE_LINK_ENDPOINT_SELECTOR_LEN 8\n-/* The MAE MPORT of interest */\n+/* Identifier for the MAE MPORT of interest */\n #define\tMAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_OFST 0\n #define\tMAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LEN 4\n #define\tMAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LBN 0\n@@ -30395,6 +32001,90 @@\n #define\tMC_CMD_MAE_GET_CAPS_V2_OUT_CT_COUNTERS_OFST 56\n #define\tMC_CMD_MAE_GET_CAPS_V2_OUT_CT_COUNTERS_LEN 4\n \n+/* MC_CMD_MAE_GET_CAPS_V3_OUT msgresponse */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_LEN 64\n+/* The number of field IDs that the NIC supports. Any field with a ID greater\n+ * than or equal to the value returned in this field must be treated as having\n+ * a support level of MAE_FIELD_UNSUPPORTED in all requests.\n+ */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_MATCH_FIELD_COUNT_OFST 0\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_MATCH_FIELD_COUNT_LEN 4\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPES_SUPPORTED_OFST 4\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPES_SUPPORTED_LEN 4\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_VXLAN_OFST 4\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_VXLAN_LBN 0\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_VXLAN_WIDTH 1\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_NVGRE_OFST 4\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_NVGRE_LBN 1\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_NVGRE_WIDTH 1\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_GENEVE_OFST 4\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_GENEVE_LBN 2\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_GENEVE_WIDTH 1\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_L2GRE_OFST 4\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_L2GRE_LBN 3\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_L2GRE_WIDTH 1\n+/* Deprecated alias for AR_COUNTERS. */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_COUNTERS_OFST 8\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_COUNTERS_LEN 4\n+/* The total number of AR counters available to allocate. */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_AR_COUNTERS_OFST 8\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_AR_COUNTERS_LEN 4\n+/* The total number of counters lists available to allocate. A value of zero\n+ * indicates that counter lists are not supported by the NIC. (But single\n+ * counters may still be.)\n+ */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_COUNTER_LISTS_OFST 12\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_COUNTER_LISTS_LEN 4\n+/* The total number of encap header structures available to allocate. */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_HEADER_LIMIT_OFST 16\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_HEADER_LIMIT_LEN 4\n+/* Reserved. Should be zero. */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_RSVD_OFST 20\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_RSVD_LEN 4\n+/* The total number of action sets available to allocate. */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_SETS_OFST 24\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_SETS_LEN 4\n+/* The total number of action set lists available to allocate. */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_SET_LISTS_OFST 28\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_SET_LISTS_LEN 4\n+/* The total number of outer rules available to allocate. */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_OUTER_RULES_OFST 32\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_OUTER_RULES_LEN 4\n+/* The total number of action rules available to allocate. */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_RULES_OFST 36\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_RULES_LEN 4\n+/* The number of priorities available for ACTION_RULE filters. It is invalid to\n+ * install a MATCH_ACTION filter with a priority number >= ACTION_PRIOS.\n+ */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_PRIOS_OFST 40\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_PRIOS_LEN 4\n+/* The number of priorities available for OUTER_RULE filters. It is invalid to\n+ * install an OUTER_RULE filter with a priority number >= OUTER_PRIOS.\n+ */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_OUTER_PRIOS_OFST 44\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_OUTER_PRIOS_LEN 4\n+/* MAE API major version. Currently 1. If this field is not present in the\n+ * response (i.e. response shorter than 384 bits), then its value is zero. If\n+ * the value does not match the client's expectations, the client should raise\n+ * a fatal error.\n+ */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_API_VER_OFST 48\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_API_VER_LEN 4\n+/* Mask of supported counter types. Each bit position corresponds to a value of\n+ * the MAE_COUNTER_TYPE enum. If this field is missing (i.e. V1 response),\n+ * clients must assume that only AR counters are supported (i.e.\n+ * COUNTER_TYPES_SUPPORTED==0x1). See also\n+ * MC_CMD_MAE_COUNTERS_STREAM_START/COUNTER_TYPES_MASK.\n+ */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_COUNTER_TYPES_SUPPORTED_OFST 52\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_COUNTER_TYPES_SUPPORTED_LEN 4\n+/* The total number of conntrack counters available to allocate. */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_CT_COUNTERS_OFST 56\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_CT_COUNTERS_LEN 4\n+/* The total number of Outer Rule counters available to allocate. */\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_OR_COUNTERS_OFST 60\n+#define\tMC_CMD_MAE_GET_CAPS_V3_OUT_OR_COUNTERS_LEN 4\n+\n \n /***********************************/\n /* MC_CMD_MAE_GET_AR_CAPS\n@@ -30498,10 +32188,13 @@\n /* Generation count. Packets with generation count >= GENERATION_COUNT will\n  * contain valid counter values for counter IDs allocated in this call, unless\n  * the counter values are zero and zero squash is enabled. Note that there is\n- * an independent GENERATION_COUNT object per counter type.\n+ * an independent GENERATION_COUNT object per counter type, and that generation\n+ * counts wrap from 0xffffffff to 1.\n  */\n #define\tMC_CMD_MAE_COUNTER_ALLOC_OUT_GENERATION_COUNT_OFST 0\n #define\tMC_CMD_MAE_COUNTER_ALLOC_OUT_GENERATION_COUNT_LEN 4\n+/* enum: Generation counter 0 is reserved and unused. */\n+#define\tMC_CMD_MAE_COUNTER_ALLOC_OUT_GENERATION_COUNT_INVALID 0x0\n /* The number of counter IDs that the NIC allocated. It is never less than 1;\n  * failure to allocate a single counter will cause an error to be returned. It\n  * is never greater than REQUESTED_COUNT, but may be less.\n@@ -30516,6 +32209,8 @@\n #define\tMC_CMD_MAE_COUNTER_ALLOC_OUT_COUNTER_ID_MAXNUM_MCDI2 253\n /* enum: A counter ID that is guaranteed never to represent a real counter */\n #define\tMC_CMD_MAE_COUNTER_ALLOC_OUT_COUNTER_ID_NULL 0xffffffff\n+/*            Other enum values, see field(s): */\n+/*               MAE_COUNTER_ID */\n \n \n /***********************************/\n@@ -30577,7 +32272,8 @@\n  * values will be written for these counters. If values for these counter IDs\n  * are present, the counter ID has been reallocated. A counter ID will not be\n  * reallocated within a single read cycle as this would merge increments from\n- * the 'old' and 'new' counters.\n+ * the 'old' and 'new' counters. GENERATION_COUNT_INVALID is reserved and\n+ * unused.\n  */\n #define\tMC_CMD_MAE_COUNTER_FREE_OUT_GENERATION_COUNT_OFST 0\n #define\tMC_CMD_MAE_COUNTER_FREE_OUT_GENERATION_COUNT_LEN 4\n@@ -30696,7 +32392,8 @@\n /* Generation count for AR counters. The final set of AR counter values will be\n  * written out in packets with count == GENERATION_COUNT. An empty packet with\n  * count > GENERATION_COUNT indicates that no more counter values of this type\n- * will be written to this stream.\n+ * will be written to this stream. GENERATION_COUNT_INVALID is reserved and\n+ * unused.\n  */\n #define\tMC_CMD_MAE_COUNTERS_STREAM_STOP_OUT_GENERATION_COUNT_OFST 0\n #define\tMC_CMD_MAE_COUNTERS_STREAM_STOP_OUT_GENERATION_COUNT_LEN 4\n@@ -30712,6 +32409,7 @@\n  * final set of counter values will be written out in packets with count ==\n  * GENERATION_COUNT. An empty packet with count > GENERATION_COUNT indicates\n  * that no more counter values of this type will be written to this stream.\n+ * GENERATION_COUNT_INVALID is reserved and unused.\n  */\n #define\tMC_CMD_MAE_COUNTERS_STREAM_STOP_V2_OUT_GENERATION_COUNT_OFST 0\n #define\tMC_CMD_MAE_COUNTERS_STREAM_STOP_V2_OUT_GENERATION_COUNT_LEN 4\n@@ -30960,6 +32658,24 @@\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_OFST 0\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_LBN 14\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_LBN 15\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_LBN 16\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_LBN 18\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_LBN 19\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_LBN 20\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_WIDTH 1\n /* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_OFST 4\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_LEN 2\n@@ -30985,19 +32701,23 @@\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DELIVER_OFST 20\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_DELIVER_LEN 4\n /* Allows an action set to trigger several counter updates. Set to\n- * COUNTER_LIST_ID_NULL to request no counter action.\n+ * MAE_COUNTER_ID_NULL to request no counter action.\n  */\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_LIST_ID_OFST 24\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_LIST_ID_LEN 4\n+/*            Enum values, see field(s): */\n+/*               MAE_COUNTER_ID */\n /* If a driver only wished to update one counter within this action set, then\n  * it can supply a COUNTER_ID instead of allocating a single-element counter\n  * list. The ID must have been allocated with COUNTER_TYPE=AR. This field\n- * should be set to COUNTER_ID_NULL if this behaviour is not required. It is\n- * not valid to supply a non-NULL value for both COUNTER_LIST_ID and\n+ * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It\n+ * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and\n  * COUNTER_ID.\n  */\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_ID_OFST 28\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_ID_LEN 4\n+/*            Enum values, see field(s): */\n+/*               MAE_COUNTER_ID */\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_MARK_VALUE_OFST 32\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_IN_MARK_VALUE_LEN 4\n /* Set to MAC_ID_NULL to request no source MAC replacement. */\n@@ -31041,6 +32761,24 @@\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_OFST 0\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_LBN 14\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_LBN 15\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_LBN 16\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_LBN 18\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_LBN 19\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_LBN 20\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_WIDTH 1\n /* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_OFST 4\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_LEN 2\n@@ -31066,19 +32804,23 @@\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_OFST 20\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_LEN 4\n /* Allows an action set to trigger several counter updates. Set to\n- * COUNTER_LIST_ID_NULL to request no counter action.\n+ * MAE_COUNTER_ID_NULL to request no counter action.\n  */\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_OFST 24\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_LEN 4\n+/*            Enum values, see field(s): */\n+/*               MAE_COUNTER_ID */\n /* If a driver only wished to update one counter within this action set, then\n  * it can supply a COUNTER_ID instead of allocating a single-element counter\n  * list. The ID must have been allocated with COUNTER_TYPE=AR. This field\n- * should be set to COUNTER_ID_NULL if this behaviour is not required. It is\n- * not valid to supply a non-NULL value for both COUNTER_LIST_ID and\n+ * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It\n+ * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and\n  * COUNTER_ID.\n  */\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_OFST 28\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_LEN 4\n+/*            Enum values, see field(s): */\n+/*               MAE_COUNTER_ID */\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_OFST 32\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_LEN 4\n /* Set to MAC_ID_NULL to request no source MAC replacement. */\n@@ -31131,6 +32873,172 @@\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_LBN 6\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_WIDTH 1\n \n+/* MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN msgrequest: Only supported if\n+ * MAE_ACTION_SET_ALLOC_V3_SUPPORTED is advertised in\n+ * MC_CMD_GET_CAPABILITIES_V10_OUT.\n+ */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LEN 53\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAGS_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAGS_LEN 4\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_LBN 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_WIDTH 2\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_LBN 4\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_WIDTH 2\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_LBN 8\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_LBN 9\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_LBN 10\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_LBN 11\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_LBN 12\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_LBN 13\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_LBN 14\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_LBN 15\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_LBN 16\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_LBN 18\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_LBN 19\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_OFST 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_LBN 20\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_WIDTH 1\n+/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_TCI_BE_OFST 4\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_TCI_BE_LEN 2\n+/* If VLAN_PUSH >= 1, TPID value to be inserted as outermost VLAN. */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_PROTO_BE_OFST 6\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_PROTO_BE_LEN 2\n+/* If VLAN_PUSH == 2, inner TCI value to be inserted. */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_TCI_BE_OFST 8\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_TCI_BE_LEN 2\n+/* If VLAN_PUSH == 2, inner TPID value to be inserted. */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_PROTO_BE_OFST 10\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_PROTO_BE_LEN 2\n+/* Reserved. Ignored by firmware. Should be set to zero or 0xffffffff. */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RSVD_OFST 12\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RSVD_LEN 4\n+/* Set to ENCAP_HEADER_ID_NULL to request no encap action */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ENCAP_HEADER_ID_OFST 16\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ENCAP_HEADER_ID_LEN 4\n+/* An m-port selector identifying the m-port that the modified packet should be\n+ * delivered to. Set to MPORT_SELECTOR_NULL to request no delivery of the\n+ * packet.\n+ */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DELIVER_OFST 20\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DELIVER_LEN 4\n+/* Allows an action set to trigger several counter updates. Set to\n+ * MAE_COUNTER_ID_NULL to request no counter action.\n+ */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_LIST_ID_OFST 24\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_LIST_ID_LEN 4\n+/*            Enum values, see field(s): */\n+/*               MAE_COUNTER_ID */\n+/* If a driver only wished to update one counter within this action set, then\n+ * it can supply a COUNTER_ID instead of allocating a single-element counter\n+ * list. The ID must have been allocated with COUNTER_TYPE=AR. This field\n+ * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It\n+ * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and\n+ * COUNTER_ID.\n+ */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_ID_OFST 28\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_ID_LEN 4\n+/*            Enum values, see field(s): */\n+/*               MAE_COUNTER_ID */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_VALUE_OFST 32\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_VALUE_LEN 4\n+/* Set to MAC_ID_NULL to request no source MAC replacement. */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SRC_MAC_ID_OFST 36\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SRC_MAC_ID_LEN 4\n+/* Set to MAC_ID_NULL to request no destination MAC replacement. */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DST_MAC_ID_OFST 40\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DST_MAC_ID_LEN 4\n+/* Source m-port ID to be reported for DO_SET_SRC_MPORT action. */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_REPORTED_SRC_MPORT_OFST 44\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_REPORTED_SRC_MPORT_LEN 4\n+/* Actions for modifying the Differentiated Services Code-Point (DSCP) bits\n+ * within IPv4 and IPv6 headers.\n+ */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_CONTROL_OFST 48\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_CONTROL_LEN 2\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_OFST 48\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_LBN 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_OFST 48\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_LBN 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_OFST 48\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_LBN 2\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_OFST 48\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_LBN 3\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_WIDTH 6\n+/* Actions for modifying the Explicit Congestion Notification (ECN) bits within\n+ * IPv4 and IPv6 headers.\n+ */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_CONTROL_OFST 50\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_CONTROL_LEN 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_OFST 50\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_LBN 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_OFST 50\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_LBN 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_OFST 50\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_LBN 2\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_OFST 50\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_LBN 3\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_WIDTH 2\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_OFST 50\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_LBN 5\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_OFST 50\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_LBN 6\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_WIDTH 1\n+/* Actions for overwriting CH_ROUTE subfields. */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OVERWRITE_OFST 51\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OVERWRITE_LEN 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_OFST 51\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_LBN 0\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_OFST 51\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_LBN 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_OFST 51\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_LBN 2\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_WIDTH 1\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_OFST 51\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_LBN 3\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_WIDTH 1\n+/* Override outgoing CH_VC to network port for DO_SET_NET_CHAN action. Cannot\n+ * be used in conjunction with DO_SET_SRC_MPORT action.\n+ */\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_NET_CHAN_OFST 52\n+#define\tMC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_NET_CHAN_LEN 1\n+\n /* MC_CMD_MAE_ACTION_SET_ALLOC_OUT msgresponse */\n #define\tMC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN 4\n /* The MSB of the AS_ID is guaranteed to be clear if the ID is not\n@@ -31297,6 +33205,7 @@\n  */\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_PRIO_OFST 4\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_PRIO_LEN 4\n+/* Deprecated alias for ACTION_CONTROL. */\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_LOOKUP_CONTROL_OFST 8\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_LOOKUP_CONTROL_LEN 4\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_DO_CT_OFST 8\n@@ -31307,15 +33216,26 @@\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_VNI_MODE_WIDTH 2\n /*             Enum values, see field(s): */\n /*                MAE_CT_VNI_MODE */\n+#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_DO_COUNT_OFST 8\n+#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_DO_COUNT_LBN 3\n+#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_DO_COUNT_WIDTH 1\n+#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_TCP_FLAGS_INHIBIT_OFST 8\n+#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_TCP_FLAGS_INHIBIT_LBN 4\n+#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_TCP_FLAGS_INHIBIT_WIDTH 1\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_RECIRC_ID_OFST 8\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_RECIRC_ID_LBN 8\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_RECIRC_ID_WIDTH 8\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_DOMAIN_OFST 8\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_DOMAIN_LBN 16\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_DOMAIN_WIDTH 16\n-/* Reserved for future use. Must be set to zero. */\n-#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_RSVD_OFST 12\n-#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_RSVD_LEN 4\n+/* This field controls the actions that are performed when a rule is hit. */\n+#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_ACTION_CONTROL_OFST 8\n+#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_ACTION_CONTROL_LEN 4\n+/* ID of counter to increment when the rule is hit. Only used if the DO_COUNT\n+ * flag is set. The ID must have been allocated with COUNTER_TYPE=OR.\n+ */\n+#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_COUNTER_ID_OFST 12\n+#define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_COUNTER_ID_LEN 4\n /* Structure of the format MAE_ENC_FIELD_PAIRS. */\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_FIELD_MATCH_CRITERIA_OFST 16\n #define\tMC_CMD_MAE_OUTER_RULE_INSERT_IN_FIELD_MATCH_CRITERIA_LEN 1\n@@ -31367,6 +33287,59 @@\n #define\tMC_CMD_MAE_OUTER_RULE_REMOVE_OUT_REMOVED_OR_ID_MAXNUM 32\n #define\tMC_CMD_MAE_OUTER_RULE_REMOVE_OUT_REMOVED_OR_ID_MAXNUM_MCDI2 32\n \n+\n+/***********************************/\n+/* MC_CMD_MAE_OUTER_RULE_UPDATE\n+ * Atomically change the response of an Outer Rule.\n+ */\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE 0x17d\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_MSGSET 0x17d\n+#undef\tMC_CMD_0x17d_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x17d_PRIVILEGE_CTG SRIOV_CTG_MAE\n+\n+/* MC_CMD_MAE_OUTER_RULE_UPDATE_IN msgrequest */\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_LEN 16\n+/* ID of outer rule to update */\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_OR_ID_OFST 0\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_OR_ID_LEN 4\n+/* Packets matching the rule will be parsed with this encapsulation. */\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_ENCAP_TYPE_OFST 4\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_ENCAP_TYPE_LEN 4\n+/*            Enum values, see field(s): */\n+/*               MAE_MCDI_ENCAP_TYPE */\n+/* This field controls the actions that are performed when a rule is hit. */\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_ACTION_CONTROL_OFST 8\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_ACTION_CONTROL_LEN 4\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_OFST 8\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_LBN 0\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_WIDTH 1\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_OFST 8\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_LBN 1\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_WIDTH 2\n+/*             Enum values, see field(s): */\n+/*                MAE_CT_VNI_MODE */\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_OFST 8\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_LBN 3\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_WIDTH 1\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_OFST 8\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_LBN 4\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_WIDTH 1\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_OFST 8\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_LBN 8\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_WIDTH 8\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_OFST 8\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_LBN 16\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_WIDTH 16\n+/* ID of counter to increment when the rule is hit. Only used if the DO_COUNT\n+ * flag is set. The ID must have been allocated with COUNTER_TYPE=OR.\n+ */\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_COUNTER_ID_OFST 12\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_IN_COUNTER_ID_LEN 4\n+\n+/* MC_CMD_MAE_OUTER_RULE_UPDATE_OUT msgresponse */\n+#define\tMC_CMD_MAE_OUTER_RULE_UPDATE_OUT_LEN 0\n+\n /* MAE_ACTION_RULE_RESPONSE structuredef */\n #define\tMAE_ACTION_RULE_RESPONSE_LEN 16\n #define\tMAE_ACTION_RULE_RESPONSE_ASL_ID_OFST 0\n@@ -31932,6 +33905,7 @@\n #define\tMC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_OFST 0\n #define\tMC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_LBN 0\n #define\tMC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_WIDTH 1\n+/* The number of MAE_MPORT_DESC structures in MPORT_DESC_DATA. May be zero. */\n #define\tMC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_OFST 4\n #define\tMC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_LEN 4\n #define\tMC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_OFST 8\n@@ -31946,4 +33920,407 @@\n #define\tMC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM 240\n #define\tMC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1008\n \n+/* TABLE_FIELD_DESCR structuredef: An individual table field descriptor. This\n+ * describes the location and properties of one N-bit field within a wider\n+ * M-bit key/mask/response value.\n+ */\n+#define\tTABLE_FIELD_DESCR_LEN 8\n+/* Identifier for this field. */\n+#define\tTABLE_FIELD_DESCR_FIELD_ID_OFST 0\n+#define\tTABLE_FIELD_DESCR_FIELD_ID_LEN 2\n+/*            Enum values, see field(s): */\n+/*               TABLE_FIELD_ID */\n+#define\tTABLE_FIELD_DESCR_FIELD_ID_LBN 0\n+#define\tTABLE_FIELD_DESCR_FIELD_ID_WIDTH 16\n+/* Lowest (least significant) bit number of the bits of this field. */\n+#define\tTABLE_FIELD_DESCR_LBN_OFST 2\n+#define\tTABLE_FIELD_DESCR_LBN_LEN 2\n+#define\tTABLE_FIELD_DESCR_LBN_LBN 16\n+#define\tTABLE_FIELD_DESCR_LBN_WIDTH 16\n+/* Width of this field in bits. */\n+#define\tTABLE_FIELD_DESCR_WIDTH_OFST 4\n+#define\tTABLE_FIELD_DESCR_WIDTH_LEN 2\n+#define\tTABLE_FIELD_DESCR_WIDTH_LBN 32\n+#define\tTABLE_FIELD_DESCR_WIDTH_WIDTH 16\n+/* The mask type for this field. (Note that masking is relevant to keys; fields\n+ * of responses are always reported with the EXACT type.)\n+ */\n+#define\tTABLE_FIELD_DESCR_MASK_TYPE_OFST 6\n+#define\tTABLE_FIELD_DESCR_MASK_TYPE_LEN 1\n+/* enum: Field must never be selected in the mask. */\n+#define\tTABLE_FIELD_DESCR_MASK_NEVER 0x0\n+/* enum: Exact match: field must always be selected in the mask. */\n+#define\tTABLE_FIELD_DESCR_MASK_EXACT 0x1\n+/* enum: Ternary match: arbitrary mask bits are allowed. */\n+#define\tTABLE_FIELD_DESCR_MASK_TERNARY 0x2\n+/* enum: Whole field match: mask must be all 1 bits, or all 0 bits. */\n+#define\tTABLE_FIELD_DESCR_MASK_WHOLE_FIELD 0x3\n+/* enum: Longest prefix match: mask must be 1 bit(s) followed by 0 bit(s). */\n+#define\tTABLE_FIELD_DESCR_MASK_LPM 0x4\n+#define\tTABLE_FIELD_DESCR_MASK_TYPE_LBN 48\n+#define\tTABLE_FIELD_DESCR_MASK_TYPE_WIDTH 8\n+/* A version code that allows field semantics to be extended. All fields\n+ * currently use version 0.\n+ */\n+#define\tTABLE_FIELD_DESCR_SCHEME_OFST 7\n+#define\tTABLE_FIELD_DESCR_SCHEME_LEN 1\n+#define\tTABLE_FIELD_DESCR_SCHEME_LBN 56\n+#define\tTABLE_FIELD_DESCR_SCHEME_WIDTH 8\n+\n+\n+/***********************************/\n+/* MC_CMD_TABLE_LIST\n+ * Return the list of tables which may be accessed via this table API.\n+ */\n+#define\tMC_CMD_TABLE_LIST 0x1c9\n+#define\tMC_CMD_TABLE_LIST_MSGSET 0x1c9\n+#undef\tMC_CMD_0x1c9_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x1c9_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_TABLE_LIST_IN msgrequest */\n+#define\tMC_CMD_TABLE_LIST_IN_LEN 4\n+/* Index of the first item to be returned in the TABLE_ID sequence. (Set to 0\n+ * for the first call; further calls are only required if the whole sequence\n+ * does not fit within the maximum MCDI message size.)\n+ */\n+#define\tMC_CMD_TABLE_LIST_IN_FIRST_TABLE_ID_INDEX_OFST 0\n+#define\tMC_CMD_TABLE_LIST_IN_FIRST_TABLE_ID_INDEX_LEN 4\n+\n+/* MC_CMD_TABLE_LIST_OUT msgresponse */\n+#define\tMC_CMD_TABLE_LIST_OUT_LENMIN 4\n+#define\tMC_CMD_TABLE_LIST_OUT_LENMAX 252\n+#define\tMC_CMD_TABLE_LIST_OUT_LENMAX_MCDI2 1020\n+#define\tMC_CMD_TABLE_LIST_OUT_LEN(num) (4+4*(num))\n+#define\tMC_CMD_TABLE_LIST_OUT_TABLE_ID_NUM(len) (((len)-4)/4)\n+/* The total number of tables. */\n+#define\tMC_CMD_TABLE_LIST_OUT_N_TABLES_OFST 0\n+#define\tMC_CMD_TABLE_LIST_OUT_N_TABLES_LEN 4\n+/* A sequence of table identifiers. If all N_TABLES items do not fit, further\n+ * items can be obtained by repeating the call with a non-zero\n+ * FIRST_TABLE_ID_INDEX.\n+ */\n+#define\tMC_CMD_TABLE_LIST_OUT_TABLE_ID_OFST 4\n+#define\tMC_CMD_TABLE_LIST_OUT_TABLE_ID_LEN 4\n+#define\tMC_CMD_TABLE_LIST_OUT_TABLE_ID_MINNUM 0\n+#define\tMC_CMD_TABLE_LIST_OUT_TABLE_ID_MAXNUM 62\n+#define\tMC_CMD_TABLE_LIST_OUT_TABLE_ID_MAXNUM_MCDI2 254\n+/*            Enum values, see field(s): */\n+/*               TABLE_ID */\n+\n+\n+/***********************************/\n+/* MC_CMD_TABLE_DESCRIPTOR\n+ * Request the table descriptor for a particular table. This describes\n+ * properties of the table and the format of the key and response. May return\n+ * EINVAL for unknown table ID.\n+ */\n+#define\tMC_CMD_TABLE_DESCRIPTOR 0x1ca\n+#define\tMC_CMD_TABLE_DESCRIPTOR_MSGSET 0x1ca\n+#undef\tMC_CMD_0x1ca_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x1ca_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_TABLE_DESCRIPTOR_IN msgrequest */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_IN_LEN 8\n+/* Identifier for this field. */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_IN_TABLE_ID_OFST 0\n+#define\tMC_CMD_TABLE_DESCRIPTOR_IN_TABLE_ID_LEN 4\n+/*            Enum values, see field(s): */\n+/*               TABLE_ID */\n+/* Index of the first item to be returned in the FIELDS sequence. (Set to 0 for\n+ * the first call; further calls are only required if the whole sequence does\n+ * not fit within the maximum MCDI message size.)\n+ */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_IN_FIRST_FIELDS_INDEX_OFST 4\n+#define\tMC_CMD_TABLE_DESCRIPTOR_IN_FIRST_FIELDS_INDEX_LEN 4\n+\n+/* MC_CMD_TABLE_DESCRIPTOR_OUT msgresponse */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_LENMIN 28\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_LENMAX 252\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_LENMAX_MCDI2 1020\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_LEN(num) (20+8*(num))\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_NUM(len) (((len)-20)/8)\n+/* Maximum number of entries in this table. */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_MAX_ENTRIES_OFST 0\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_MAX_ENTRIES_LEN 4\n+/* The type of table. (This is really just informational; the important\n+ * properties of a table that affect programming can be deduced from other\n+ * items in the table or field descriptor.)\n+ */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_OFST 4\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_LEN 2\n+/* enum: Direct table (essentially just an array). Behaves like a BCAM for\n+ * programming purposes, where the fact that the key is actually used as an\n+ * array index is really just an implementation detail.\n+ */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_DIRECT 0x1\n+/* enum: BCAM (binary CAM) table: exact match on all key fields.\" */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_BCAM 0x2\n+/* enum: TCAM (ternary CAM) table: matches fields with a mask. Each entry may\n+ * have its own different mask.\n+ */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_TCAM 0x3\n+/* enum: STCAM (semi-TCAM) table: like a TCAM but entries shared a limited\n+ * number of unique masks.\n+ */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_STCAM 0x4\n+/* Width of key (and corresponding mask, for TCAM or STCAM) in bits. */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_KEY_WIDTH_OFST 6\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_KEY_WIDTH_LEN 2\n+/* Width of response in bits. */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_RESP_WIDTH_OFST 8\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_RESP_WIDTH_LEN 2\n+/* The total number of fields in the key. */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_N_KEY_FIELDS_OFST 10\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_N_KEY_FIELDS_LEN 2\n+/* The total number of fields in the response. */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_N_RESP_FIELDS_OFST 12\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_N_RESP_FIELDS_LEN 2\n+/* Number of priorities for STCAM or TCAM; otherwise 0. The priority of a table\n+ * entry (relevant when more than one masked entry matches) ranges from\n+ * 0=highest to N_PRIORITIES-1=lowest.\n+ */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_N_PRIORITIES_OFST 14\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_N_PRIORITIES_LEN 2\n+/* Maximum number of masks for STCAM; otherwise 0. */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_MAX_MASKS_OFST 16\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_MAX_MASKS_LEN 2\n+/* Flags. */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FLAGS_OFST 18\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FLAGS_LEN 1\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_ALLOC_MASKS_OFST 18\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_ALLOC_MASKS_LBN 0\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_ALLOC_MASKS_WIDTH 1\n+/* Access scheme version code, allowing the method of accessing table entries\n+ * to change semantics in future. A client which does not understand the value\n+ * of this field should assume that it cannot program this table. Currently\n+ * always set to 0 indicating the original MC_CMD_TABLE_INSERT/UPDATE/DELETE\n+ * semantics.\n+ */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_SCHEME_OFST 19\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_SCHEME_LEN 1\n+/* A sequence of TABLE_FIELD_DESCR structures: N_KEY_FIELDS items describing\n+ * the key, followed by N_RESP_FIELDS items describing the response. If all\n+ * N_KEY_FIELDS+N_RESP_FIELDS items do not fit, further items can be obtained\n+ * by repeating the call with a non-zero FIRST_FIELDS_INDEX.\n+ */\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_OFST 20\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_LEN 8\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_LO_OFST 20\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_LO_LEN 4\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_LO_LBN 160\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_LO_WIDTH 32\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_HI_OFST 24\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_HI_LEN 4\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_HI_LBN 192\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_HI_WIDTH 32\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_MINNUM 1\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_MAXNUM 29\n+#define\tMC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_MAXNUM_MCDI2 125\n+\n+\n+/***********************************/\n+/* MC_CMD_TABLE_INSERT\n+ * Insert a new entry into a table. The entry must not currently exist. May\n+ * return EINVAL for unknown table ID or other bad request parameters, EEXIST\n+ * if the entry already exists, ENOSPC if there is no space or EPERM if the\n+ * operation is not permitted. In case of an error, the additional MCDI error\n+ * argument field returns the raw error code from the underlying CAM driver.\n+ */\n+#define\tMC_CMD_TABLE_INSERT 0x1cd\n+#define\tMC_CMD_TABLE_INSERT_MSGSET 0x1cd\n+#undef\tMC_CMD_0x1cd_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x1cd_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_TABLE_INSERT_IN msgrequest */\n+#define\tMC_CMD_TABLE_INSERT_IN_LENMIN 16\n+#define\tMC_CMD_TABLE_INSERT_IN_LENMAX 252\n+#define\tMC_CMD_TABLE_INSERT_IN_LENMAX_MCDI2 1020\n+#define\tMC_CMD_TABLE_INSERT_IN_LEN(num) (12+4*(num))\n+#define\tMC_CMD_TABLE_INSERT_IN_DATA_NUM(len) (((len)-12)/4)\n+/* Table identifier. */\n+#define\tMC_CMD_TABLE_INSERT_IN_TABLE_ID_OFST 0\n+#define\tMC_CMD_TABLE_INSERT_IN_TABLE_ID_LEN 4\n+/*            Enum values, see field(s): */\n+/*               TABLE_ID */\n+/* Width in bits of supplied key data (must match table properties). */\n+#define\tMC_CMD_TABLE_INSERT_IN_KEY_WIDTH_OFST 4\n+#define\tMC_CMD_TABLE_INSERT_IN_KEY_WIDTH_LEN 2\n+/* Width in bits of supplied mask data (0 for direct/BCAM tables, or for STCAM\n+ * when allocated MASK_ID is used instead).\n+ */\n+#define\tMC_CMD_TABLE_INSERT_IN_MASK_WIDTH_OFST 6\n+#define\tMC_CMD_TABLE_INSERT_IN_MASK_WIDTH_LEN 2\n+/* Width in bits of supplied response data (for INSERT and UPDATE operations\n+ * this must match the table properties; for DELETE operations, no response\n+ * data is required and this must be 0).\n+ */\n+#define\tMC_CMD_TABLE_INSERT_IN_RESP_WIDTH_OFST 8\n+#define\tMC_CMD_TABLE_INSERT_IN_RESP_WIDTH_LEN 2\n+/* Mask ID for STCAM table - used instead of mask data if the table descriptor\n+ * reports ALLOC_MASKS==1. Otherwise set to 0.\n+ */\n+#define\tMC_CMD_TABLE_INSERT_IN_MASK_ID_OFST 6\n+#define\tMC_CMD_TABLE_INSERT_IN_MASK_ID_LEN 2\n+/* Priority for TCAM or STCAM, in range 0..N_PRIORITIES-1, otherwise 0. */\n+#define\tMC_CMD_TABLE_INSERT_IN_PRIORITY_OFST 8\n+#define\tMC_CMD_TABLE_INSERT_IN_PRIORITY_LEN 2\n+/* (32-bit alignment padding - set to 0) */\n+#define\tMC_CMD_TABLE_INSERT_IN_RESERVED_OFST 10\n+#define\tMC_CMD_TABLE_INSERT_IN_RESERVED_LEN 2\n+/* Sequence of key, mask (if MASK_WIDTH > 0), and response (if RESP_WIDTH > 0)\n+ * data values. Each of these items is logically treated as a single wide N-bit\n+ * value, in which the individual fields have been placed within that value per\n+ * the LBN and WIDTH information from the table field descriptors. The wide\n+ * N-bit value is padded with 0 bits at the MSB end if necessary to make a\n+ * multiple of 32 bits. The value is then packed into this command as a\n+ * sequence of 32-bit words, bits [31:0] first, then bits [63:32], etc.\n+ */\n+#define\tMC_CMD_TABLE_INSERT_IN_DATA_OFST 12\n+#define\tMC_CMD_TABLE_INSERT_IN_DATA_LEN 4\n+#define\tMC_CMD_TABLE_INSERT_IN_DATA_MINNUM 1\n+#define\tMC_CMD_TABLE_INSERT_IN_DATA_MAXNUM 60\n+#define\tMC_CMD_TABLE_INSERT_IN_DATA_MAXNUM_MCDI2 252\n+\n+/* MC_CMD_TABLE_INSERT_OUT msgresponse */\n+#define\tMC_CMD_TABLE_INSERT_OUT_LEN 0\n+\n+\n+/***********************************/\n+/* MC_CMD_TABLE_UPDATE\n+ * Update an existing entry in a table with a new response value. May return\n+ * EINVAL for unknown table ID or other bad request parameters, ENOENT if the\n+ * entry does not already exist, or EPERM if the operation is not permitted. In\n+ * case of an error, the additional MCDI error argument field returns the raw\n+ * error code from the underlying CAM driver.\n+ */\n+#define\tMC_CMD_TABLE_UPDATE 0x1ce\n+#define\tMC_CMD_TABLE_UPDATE_MSGSET 0x1ce\n+#undef\tMC_CMD_0x1ce_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x1ce_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_TABLE_UPDATE_IN msgrequest */\n+#define\tMC_CMD_TABLE_UPDATE_IN_LENMIN 16\n+#define\tMC_CMD_TABLE_UPDATE_IN_LENMAX 252\n+#define\tMC_CMD_TABLE_UPDATE_IN_LENMAX_MCDI2 1020\n+#define\tMC_CMD_TABLE_UPDATE_IN_LEN(num) (12+4*(num))\n+#define\tMC_CMD_TABLE_UPDATE_IN_DATA_NUM(len) (((len)-12)/4)\n+/* Table identifier. */\n+#define\tMC_CMD_TABLE_UPDATE_IN_TABLE_ID_OFST 0\n+#define\tMC_CMD_TABLE_UPDATE_IN_TABLE_ID_LEN 4\n+/*            Enum values, see field(s): */\n+/*               TABLE_ID */\n+/* Width in bits of supplied key data (must match table properties). */\n+#define\tMC_CMD_TABLE_UPDATE_IN_KEY_WIDTH_OFST 4\n+#define\tMC_CMD_TABLE_UPDATE_IN_KEY_WIDTH_LEN 2\n+/* Width in bits of supplied mask data (0 for direct/BCAM tables, or for STCAM\n+ * when allocated MASK_ID is used instead).\n+ */\n+#define\tMC_CMD_TABLE_UPDATE_IN_MASK_WIDTH_OFST 6\n+#define\tMC_CMD_TABLE_UPDATE_IN_MASK_WIDTH_LEN 2\n+/* Width in bits of supplied response data (for INSERT and UPDATE operations\n+ * this must match the table properties; for DELETE operations, no response\n+ * data is required and this must be 0).\n+ */\n+#define\tMC_CMD_TABLE_UPDATE_IN_RESP_WIDTH_OFST 8\n+#define\tMC_CMD_TABLE_UPDATE_IN_RESP_WIDTH_LEN 2\n+/* Mask ID for STCAM table - used instead of mask data if the table descriptor\n+ * reports ALLOC_MASKS==1. Otherwise set to 0.\n+ */\n+#define\tMC_CMD_TABLE_UPDATE_IN_MASK_ID_OFST 6\n+#define\tMC_CMD_TABLE_UPDATE_IN_MASK_ID_LEN 2\n+/* Priority for TCAM or STCAM, in range 0..N_PRIORITIES-1, otherwise 0. */\n+#define\tMC_CMD_TABLE_UPDATE_IN_PRIORITY_OFST 8\n+#define\tMC_CMD_TABLE_UPDATE_IN_PRIORITY_LEN 2\n+/* (32-bit alignment padding - set to 0) */\n+#define\tMC_CMD_TABLE_UPDATE_IN_RESERVED_OFST 10\n+#define\tMC_CMD_TABLE_UPDATE_IN_RESERVED_LEN 2\n+/* Sequence of key, mask (if MASK_WIDTH > 0), and response (if RESP_WIDTH > 0)\n+ * data values. Each of these items is logically treated as a single wide N-bit\n+ * value, in which the individual fields have been placed within that value per\n+ * the LBN and WIDTH information from the table field descriptors. The wide\n+ * N-bit value is padded with 0 bits at the MSB end if necessary to make a\n+ * multiple of 32 bits. The value is then packed into this command as a\n+ * sequence of 32-bit words, bits [31:0] first, then bits [63:32], etc.\n+ */\n+#define\tMC_CMD_TABLE_UPDATE_IN_DATA_OFST 12\n+#define\tMC_CMD_TABLE_UPDATE_IN_DATA_LEN 4\n+#define\tMC_CMD_TABLE_UPDATE_IN_DATA_MINNUM 1\n+#define\tMC_CMD_TABLE_UPDATE_IN_DATA_MAXNUM 60\n+#define\tMC_CMD_TABLE_UPDATE_IN_DATA_MAXNUM_MCDI2 252\n+\n+/* MC_CMD_TABLE_UPDATE_OUT msgresponse */\n+#define\tMC_CMD_TABLE_UPDATE_OUT_LEN 0\n+\n+\n+/***********************************/\n+/* MC_CMD_TABLE_DELETE\n+ * Delete an existing entry in a table. May return EINVAL for unknown table ID\n+ * or other bad request parameters, ENOENT if the entry does not exist, or\n+ * EPERM if the operation is not permitted. In case of an error, the additional\n+ * MCDI error argument field returns the raw error code from the underlying CAM\n+ * driver.\n+ */\n+#define\tMC_CMD_TABLE_DELETE 0x1cf\n+#define\tMC_CMD_TABLE_DELETE_MSGSET 0x1cf\n+#undef\tMC_CMD_0x1cf_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x1cf_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_TABLE_DELETE_IN msgrequest */\n+#define\tMC_CMD_TABLE_DELETE_IN_LENMIN 16\n+#define\tMC_CMD_TABLE_DELETE_IN_LENMAX 252\n+#define\tMC_CMD_TABLE_DELETE_IN_LENMAX_MCDI2 1020\n+#define\tMC_CMD_TABLE_DELETE_IN_LEN(num) (12+4*(num))\n+#define\tMC_CMD_TABLE_DELETE_IN_DATA_NUM(len) (((len)-12)/4)\n+/* Table identifier. */\n+#define\tMC_CMD_TABLE_DELETE_IN_TABLE_ID_OFST 0\n+#define\tMC_CMD_TABLE_DELETE_IN_TABLE_ID_LEN 4\n+/*            Enum values, see field(s): */\n+/*               TABLE_ID */\n+/* Width in bits of supplied key data (must match table properties). */\n+#define\tMC_CMD_TABLE_DELETE_IN_KEY_WIDTH_OFST 4\n+#define\tMC_CMD_TABLE_DELETE_IN_KEY_WIDTH_LEN 2\n+/* Width in bits of supplied mask data (0 for direct/BCAM tables, or for STCAM\n+ * when allocated MASK_ID is used instead).\n+ */\n+#define\tMC_CMD_TABLE_DELETE_IN_MASK_WIDTH_OFST 6\n+#define\tMC_CMD_TABLE_DELETE_IN_MASK_WIDTH_LEN 2\n+/* Width in bits of supplied response data (for INSERT and UPDATE operations\n+ * this must match the table properties; for DELETE operations, no response\n+ * data is required and this must be 0).\n+ */\n+#define\tMC_CMD_TABLE_DELETE_IN_RESP_WIDTH_OFST 8\n+#define\tMC_CMD_TABLE_DELETE_IN_RESP_WIDTH_LEN 2\n+/* Mask ID for STCAM table - used instead of mask data if the table descriptor\n+ * reports ALLOC_MASKS==1. Otherwise set to 0.\n+ */\n+#define\tMC_CMD_TABLE_DELETE_IN_MASK_ID_OFST 6\n+#define\tMC_CMD_TABLE_DELETE_IN_MASK_ID_LEN 2\n+/* Priority for TCAM or STCAM, in range 0..N_PRIORITIES-1, otherwise 0. */\n+#define\tMC_CMD_TABLE_DELETE_IN_PRIORITY_OFST 8\n+#define\tMC_CMD_TABLE_DELETE_IN_PRIORITY_LEN 2\n+/* (32-bit alignment padding - set to 0) */\n+#define\tMC_CMD_TABLE_DELETE_IN_RESERVED_OFST 10\n+#define\tMC_CMD_TABLE_DELETE_IN_RESERVED_LEN 2\n+/* Sequence of key, mask (if MASK_WIDTH > 0), and response (if RESP_WIDTH > 0)\n+ * data values. Each of these items is logically treated as a single wide N-bit\n+ * value, in which the individual fields have been placed within that value per\n+ * the LBN and WIDTH information from the table field descriptors. The wide\n+ * N-bit value is padded with 0 bits at the MSB end if necessary to make a\n+ * multiple of 32 bits. The value is then packed into this command as a\n+ * sequence of 32-bit words, bits [31:0] first, then bits [63:32], etc.\n+ */\n+#define\tMC_CMD_TABLE_DELETE_IN_DATA_OFST 12\n+#define\tMC_CMD_TABLE_DELETE_IN_DATA_LEN 4\n+#define\tMC_CMD_TABLE_DELETE_IN_DATA_MINNUM 1\n+#define\tMC_CMD_TABLE_DELETE_IN_DATA_MAXNUM 60\n+#define\tMC_CMD_TABLE_DELETE_IN_DATA_MAXNUM_MCDI2 252\n+\n+/* MC_CMD_TABLE_DELETE_OUT msgresponse */\n+#define\tMC_CMD_TABLE_DELETE_OUT_LEN 0\n+\n #endif /* _SIENA_MC_DRIVER_PCOL_H */\n",
    "prefixes": [
        "v4",
        "01/34"
    ]
}