Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/129255/?format=api
{ "id": 129255, "url": "http://patchwork.dpdk.org/api/patches/129255/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230704160454.4187-3-igozlan@nvidia.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230704160454.4187-3-igozlan@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230704160454.4187-3-igozlan@nvidia.com", "date": "2023-07-04T16:04:51", "name": "[v3,3/5] net/mlx5/hws: remove duplicated reformat type", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "9132b0b6d4697a649d0bbd7ac696c0c8ab30e6fc", "submitter": { "id": 3118, "url": "http://patchwork.dpdk.org/api/people/3118/?format=api", "name": "Itamar Gozlan", "email": "igozlan@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patchwork.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230704160454.4187-3-igozlan@nvidia.com/mbox/", "series": [ { "id": 28810, "url": "http://patchwork.dpdk.org/api/series/28810/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=28810", "date": "2023-07-04T16:04:49", "name": "[v3,1/5] net/mlx5/hws: remove unneeded new line for DR_LOG", "version": 3, "mbox": "http://patchwork.dpdk.org/series/28810/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/129255/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/129255/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id EB19642DAE;\n\tTue, 4 Jul 2023 18:06:25 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D885B42D17;\n\tTue, 4 Jul 2023 18:06:25 +0200 (CEST)", "from NAM11-CO1-obe.outbound.protection.outlook.com\n (mail-co1nam11on2061.outbound.protection.outlook.com [40.107.220.61])\n by mails.dpdk.org (Postfix) with ESMTP id 9C04642BFE\n for <dev@dpdk.org>; Tue, 4 Jul 2023 18:06:24 +0200 (CEST)", "from DM6PR02CA0127.namprd02.prod.outlook.com (2603:10b6:5:1b4::29)\n by IA1PR12MB8223.namprd12.prod.outlook.com (2603:10b6:208:3f3::10) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6544.24; Tue, 4 Jul\n 2023 16:06:21 +0000", "from DM6NAM11FT091.eop-nam11.prod.protection.outlook.com\n (2603:10b6:5:1b4:cafe::c) by DM6PR02CA0127.outlook.office365.com\n (2603:10b6:5:1b4::29) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6544.31 via Frontend\n Transport; Tue, 4 Jul 2023 16:06:21 +0000", "from mail.nvidia.com (216.228.117.161) by\n DM6NAM11FT091.mail.protection.outlook.com (10.13.173.108) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.6521.44 via Frontend Transport; Tue, 4 Jul 2023 16:06:20 +0000", "from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com\n (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.5; Tue, 4 Jul 2023\n 09:06:11 -0700", "from rnnvmail201.nvidia.com (10.129.68.8) by rnnvmail201.nvidia.com\n (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Tue, 4 Jul 2023\n 09:06:10 -0700", "from nvidia.com (10.127.8.12) by mail.nvidia.com (10.129.68.8) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37 via Frontend\n Transport; Tue, 4 Jul 2023 09:06:08 -0700" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=RQzRsMmxUgywYrb23gqGhsV+19jiqBkI4/1JaahQm2AgFYTGM3/gv++JB4dKWqwqbT/yYHuxQ93jb2DG2SHil9A6+PLbTiI0YHQ62V4gEpjfZ9lvhCNFgww/OyOPCZwTdorzF3rgV9+e57lmaquFFqz2ZZeTBL2JSNOoIYepTj3/wco7YDWrkgMCTnS71YbmViEVdOy79aSwJThWzJQKEffWsJhmZq9kzmiNPhEJ6Aghh/ELVax0UA4Z0dG78i4Cj0v/M4H4c5flXJ4+FjQ+9xEGXazinAg5qU+RHLCptWukmSXR168CTTJULSEx4dlm47gO+aJDvQkIiw1UW+kx4g==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=s6Z870rGHHMAyojkZY2etlAQXfIvYJcSpEVQo0/BLZM=;\n b=LNYCXentkzIup9yK7r3RFwqGXlq9JHJ6mbQcbDnYsrtKuR6HUJsxmxvo8a7+mMX3k+Ww7ayTKPxyPHSFl0C3Y5v6yIYDYb8dox9gAXMFgxoUrHvCtrOPSoam3fGbYsfjqrrShwjlZEIIrQapSoQpxWzkmw/CegjjDnyjCls2ZIjfXXdgAnqSc2I+srPe0EZ9YdVVkVLLRoWaLAaxwPQQRe0o4GAczktSFW5NZUyY9gz74XPZ5NE7niq/aPzLJ4Y12UgiLaR2Rny5KbtUNZXYkqd42DPE4PP0JbwnaO9EKBQcoI3GMsH3Za+3ybIZyg7gDRocNN8fTqeseCR9vzl0QQ==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.117.161) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com;\n dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=s6Z870rGHHMAyojkZY2etlAQXfIvYJcSpEVQo0/BLZM=;\n b=RvdFw84UBY/wORL6WI+8xTtLxmYdRO/o0SV9jCuGyKYuVkVfwhCuLDKCYoGCFvKKGkgy5jZDb176iogheENPFuRWABrgXLo0Hd+YY0yI/EQ5AW9wOOD3Oj0F9i8f/WnXCzPVmiFKSBkDxAXC0S2GXnoEy3qkuunRVZVh9ihRoybXa7HhuOZm35Qh3o4oq2qltLQEFodXkhs9gbRVhtElhUx5i+GXF0CZ98Whmhopgjp8bRPQin3QyWfeMiuRh7nPW57A63pAxB2jOTL++7tqIR+XyvRVxGyVNfQhIME2QlNROR3IOX6jzAp3WuBccuaWvY2f+PfzDSE+a2iWxleP1A==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.117.161)\n smtp.mailfrom=nvidia.com;\n dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.117.161 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C", "From": "Itamar Gozlan <igozlan@nvidia.com>", "To": "<valex@nvidia.com>, <viacheslavo@nvidia.com>, <matan@nvidia.com>,\n <thomas@monjalon.net>, <suanmingm@nvidia.com>, Ori Kam <orika@nvidia.com>", "CC": "<dev@dpdk.org>, Shun Hao <shunh@nvidia.com>", "Subject": "[v3 3/5] net/mlx5/hws: remove duplicated reformat type", "Date": "Tue, 4 Jul 2023 19:04:51 +0300", "Message-ID": "<20230704160454.4187-3-igozlan@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20230704160454.4187-1-igozlan@nvidia.com>", "References": "<20230704104645.19800-5-igozlan@nvidia.com>\n <20230704160454.4187-1-igozlan@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "DM6NAM11FT091:EE_|IA1PR12MB8223:EE_", "X-MS-Office365-Filtering-Correlation-Id": "efc73cfd-4454-49f6-cd58-08db7ca89b77", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n o82P5f+kEC1Bm101oyaUkU/QG6CvhxugSlDopH6u6RF43zPnLjUxoIO76Yf6t2LbProYiP5+T4ViPoS//nNdEJfA7OO7Kh3HSLLIbphW7xkT1wfLTEVPIp1nG+6R53C7SBMihbKUffDJxq0iGGLkcLmOgwZtgDlNQ6BsKwH08TAiwlPk6XjkOqBgsAH9UOpyleU/CZA84JSeWrDyXgCeySGrFooIUvc/hlldZWWcNSGD42jLiDf7htRrQxE75nFk1eptet24HMMoNYOi/wi4W2FgqqxE88C6zBlytDzXjU6+atTsOIFYrnewP9pwWYDXNVxNj7CbtArts7plZ7Dm0dGnJJISRfSJPqbWJy5DhTNI6SidyT4brge+DPKzZM+4DpqoEYXDuD3PnpNwK4Gd4+eyHPq/13tBqjXEIf+QtGuhWD/iVBspUWbnYnEh1ZCHmEanumomw2VrOVQaBzmuFKWA5Yle17jBSWJSDnxZqg16pYFpApjpc2OXFUDnRFMwJZnXmpVFqNj9hk0fhDVMu5Arx3X4FDVyzjh0/e52n7lMS3VhwhJJGHjyXFa6xNav5K/4ONLhbs9GyRzDMVqr0isaYWKmco/ks/gnNmiIsgENYs4nQOQ3q76R13SiFe4J1hxiNxA5V+/lgq+yEvTVar50k3nsJ6BCbMbJGliJ+HF0EgWomyH9gpvkju8Gmz8XEkrY0cjTEbkY51/jwq7uv/U84r5fpgSmVsWF3GpfgNuOl9ropE+OWFsAm+tb+2bE", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230028)(4636009)(376002)(346002)(136003)(39860400002)(396003)(451199021)(40470700004)(46966006)(36840700001)(26005)(478600001)(1076003)(6666004)(82740400003)(107886003)(86362001)(2616005)(6286002)(186003)(36860700001)(54906003)(7636003)(6636002)(4326008)(70586007)(426003)(83380400001)(356005)(336012)(110136005)(70206006)(7696005)(316002)(47076005)(5660300002)(8676002)(8936002)(30864003)(40460700003)(41300700001)(2906002)(40480700001)(55016003)(82310400005)(36756003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "04 Jul 2023 16:06:20.6164 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n efc73cfd-4454-49f6-cd58-08db7ca89b77", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT091.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "IA1PR12MB8223", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Shun Hao <shunh@nvidia.com>\n\nCurrently there are two enum definitions for reformat type:\nmlx5dr_action_reformat_type and mlx5dr_action_type. They are actually\nthe same. This patch remove the unnecessary mlx5dr_action_reformat_type\nso use only one definition for reformat type.\n\nSigned-off-by: Shun Hao <shunh@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/hws/mlx5dr.h | 19 ++---\n drivers/net/mlx5/hws/mlx5dr_action.c | 110 ++++++++++----------------\n drivers/net/mlx5/hws/mlx5dr_debug.c | 8 +-\n drivers/net/mlx5/hws/mlx5dr_pat_arg.c | 2 +-\n drivers/net/mlx5/mlx5_flow_hw.c | 34 ++++----\n 5 files changed, 68 insertions(+), 105 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h\nindex 7942fb0a8f..7d5af4c9bb 100644\n--- a/drivers/net/mlx5/hws/mlx5dr.h\n+++ b/drivers/net/mlx5/hws/mlx5dr.h\n@@ -29,10 +29,10 @@ enum mlx5dr_matcher_resource_mode {\n \n enum mlx5dr_action_type {\n \tMLX5DR_ACTION_TYP_LAST,\n-\tMLX5DR_ACTION_TYP_TNL_L2_TO_L2,\n-\tMLX5DR_ACTION_TYP_L2_TO_TNL_L2,\n-\tMLX5DR_ACTION_TYP_TNL_L3_TO_L2,\n-\tMLX5DR_ACTION_TYP_L2_TO_TNL_L3,\n+\tMLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2,\n+\tMLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2,\n+\tMLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2,\n+\tMLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3,\n \tMLX5DR_ACTION_TYP_DROP,\n \tMLX5DR_ACTION_TYP_TIR,\n \tMLX5DR_ACTION_TYP_FT,\n@@ -62,13 +62,6 @@ enum mlx5dr_action_flags {\n \tMLX5DR_ACTION_FLAG_SHARED = 1 << 6,\n };\n \n-enum mlx5dr_action_reformat_type {\n-\tMLX5DR_ACTION_REFORMAT_TYPE_TNL_L2_TO_L2,\n-\tMLX5DR_ACTION_REFORMAT_TYPE_L2_TO_TNL_L2,\n-\tMLX5DR_ACTION_REFORMAT_TYPE_TNL_L3_TO_L2,\n-\tMLX5DR_ACTION_REFORMAT_TYPE_L2_TO_TNL_L3,\n-};\n-\n enum mlx5dr_action_aso_meter_color {\n \tMLX5DR_ACTION_ASO_METER_COLOR_RED = 0x0,\n \tMLX5DR_ACTION_ASO_METER_COLOR_YELLOW = 0x1,\n@@ -487,7 +480,7 @@ mlx5dr_action_create_counter(struct mlx5dr_context *ctx,\n * @param[in] ctx\n *\tThe context in which the new action will be created.\n * @param[in] reformat_type\n- *\tType of reformat.\n+ *\tType of reformat prefixed with MLX5DR_ACTION_TYP_REFORMAT.\n * @param[in] data_sz\n *\tSize in bytes of data.\n * @param[in] inline_data\n@@ -500,7 +493,7 @@ mlx5dr_action_create_counter(struct mlx5dr_context *ctx,\n */\n struct mlx5dr_action *\n mlx5dr_action_create_reformat(struct mlx5dr_context *ctx,\n-\t\t\t enum mlx5dr_action_reformat_type reformat_type,\n+\t\t\t enum mlx5dr_action_type reformat_type,\n \t\t\t size_t data_sz,\n \t\t\t void *inline_data,\n \t\t\t uint32_t log_bulk_size,\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c\nindex e2db85940c..851cee8802 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_action.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_action.c\n@@ -18,8 +18,8 @@\n static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_MAX] = {\n \t[MLX5DR_TABLE_TYPE_NIC_RX] = {\n \t\tBIT(MLX5DR_ACTION_TYP_TAG),\n-\t\tBIT(MLX5DR_ACTION_TYP_TNL_L2_TO_L2) |\n-\t\tBIT(MLX5DR_ACTION_TYP_TNL_L3_TO_L2),\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2) |\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2),\n \t\tBIT(MLX5DR_ACTION_TYP_POP_VLAN),\n \t\tBIT(MLX5DR_ACTION_TYP_POP_VLAN),\n \t\tBIT(MLX5DR_ACTION_TYP_CTR),\n@@ -28,8 +28,8 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_\n \t\tBIT(MLX5DR_ACTION_TYP_PUSH_VLAN),\n \t\tBIT(MLX5DR_ACTION_TYP_PUSH_VLAN),\n \t\tBIT(MLX5DR_ACTION_TYP_MODIFY_HDR),\n-\t\tBIT(MLX5DR_ACTION_TYP_L2_TO_TNL_L2) |\n-\t\tBIT(MLX5DR_ACTION_TYP_L2_TO_TNL_L3),\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),\n \t\tBIT(MLX5DR_ACTION_TYP_FT) |\n \t\tBIT(MLX5DR_ACTION_TYP_MISS) |\n \t\tBIT(MLX5DR_ACTION_TYP_TIR) |\n@@ -46,8 +46,8 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_\n \t\tBIT(MLX5DR_ACTION_TYP_PUSH_VLAN),\n \t\tBIT(MLX5DR_ACTION_TYP_PUSH_VLAN),\n \t\tBIT(MLX5DR_ACTION_TYP_MODIFY_HDR),\n-\t\tBIT(MLX5DR_ACTION_TYP_L2_TO_TNL_L2) |\n-\t\tBIT(MLX5DR_ACTION_TYP_L2_TO_TNL_L3),\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),\n \t\tBIT(MLX5DR_ACTION_TYP_FT) |\n \t\tBIT(MLX5DR_ACTION_TYP_MISS) |\n \t\tBIT(MLX5DR_ACTION_TYP_DROP) |\n@@ -55,8 +55,8 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_\n \t\tBIT(MLX5DR_ACTION_TYP_LAST),\n \t},\n \t[MLX5DR_TABLE_TYPE_FDB] = {\n-\t\tBIT(MLX5DR_ACTION_TYP_TNL_L2_TO_L2) |\n-\t\tBIT(MLX5DR_ACTION_TYP_TNL_L3_TO_L2),\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2) |\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2),\n \t\tBIT(MLX5DR_ACTION_TYP_POP_VLAN),\n \t\tBIT(MLX5DR_ACTION_TYP_POP_VLAN),\n \t\tBIT(MLX5DR_ACTION_TYP_CTR),\n@@ -65,8 +65,8 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_\n \t\tBIT(MLX5DR_ACTION_TYP_PUSH_VLAN),\n \t\tBIT(MLX5DR_ACTION_TYP_PUSH_VLAN),\n \t\tBIT(MLX5DR_ACTION_TYP_MODIFY_HDR),\n-\t\tBIT(MLX5DR_ACTION_TYP_L2_TO_TNL_L2) |\n-\t\tBIT(MLX5DR_ACTION_TYP_L2_TO_TNL_L3),\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),\n \t\tBIT(MLX5DR_ACTION_TYP_FT) |\n \t\tBIT(MLX5DR_ACTION_TYP_MISS) |\n \t\tBIT(MLX5DR_ACTION_TYP_VPORT) |\n@@ -292,10 +292,10 @@ int mlx5dr_action_root_build_attr(struct mlx5dr_rule_action rule_actions[],\n \t\tcase MLX5DR_ACTION_TYP_DROP:\n \t\t\tattr[i].type = MLX5DV_FLOW_ACTION_DROP;\n \t\t\tbreak;\n-\t\tcase MLX5DR_ACTION_TYP_TNL_L2_TO_L2:\n-\t\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L2:\n-\t\tcase MLX5DR_ACTION_TYP_TNL_L3_TO_L2:\n-\t\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L3:\n+\t\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2:\n+\t\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:\n+\t\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:\n+\t\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3:\n \t\tcase MLX5DR_ACTION_TYP_MODIFY_HDR:\n \t\t\tattr[i].type = MLX5DV_FLOW_ACTION_IBV_FLOW_ACTION;\n \t\t\tattr[i].action = action->flow_action;\n@@ -503,7 +503,7 @@ static void mlx5dr_action_fill_stc_attr(struct mlx5dr_action *action,\n \t\tattr->action_offset = MLX5DR_ACTION_OFFSET_HIT;\n \t\tattr->dest_tir_num = obj->id;\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_TNL_L3_TO_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:\n \tcase MLX5DR_ACTION_TYP_MODIFY_HDR:\n \t\tattr->action_offset = MLX5DR_ACTION_OFFSET_DW6;\n \t\tif (action->modify_header.num_of_actions == 1) {\n@@ -529,14 +529,14 @@ static void mlx5dr_action_fill_stc_attr(struct mlx5dr_action *action,\n \t\tattr->action_offset = MLX5DR_ACTION_OFFSET_HIT;\n \t\tattr->dest_table_id = action->root_tbl.sa->id;\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_TNL_L2_TO_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2:\n \t\tattr->action_type = MLX5_IFC_STC_ACTION_TYPE_HEADER_REMOVE;\n \t\tattr->action_offset = MLX5DR_ACTION_OFFSET_DW5;\n \t\tattr->remove_header.decap = 1;\n \t\tattr->remove_header.start_anchor = MLX5_HEADER_ANCHOR_PACKET_START;\n \t\tattr->remove_header.end_anchor = MLX5_HEADER_ANCHOR_INNER_MAC;\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:\n \t\tattr->action_type = MLX5_IFC_STC_ACTION_TYPE_HEADER_INSERT;\n \t\tattr->action_offset = MLX5DR_ACTION_OFFSET_DW6;\n \t\tattr->insert_header.encap = 1;\n@@ -544,7 +544,7 @@ static void mlx5dr_action_fill_stc_attr(struct mlx5dr_action *action,\n \t\tattr->insert_header.arg_id = action->reformat.arg_obj->id;\n \t\tattr->insert_header.header_size = action->reformat.header_size;\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L3:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3:\n \t\tattr->action_type = MLX5_IFC_STC_ACTION_TYPE_HEADER_INSERT;\n \t\tattr->action_offset = MLX5DR_ACTION_OFFSET_DW6;\n \t\tattr->insert_header.encap = 1;\n@@ -1128,49 +1128,24 @@ mlx5dr_action_create_pop_vlan(struct mlx5dr_context *ctx, uint32_t flags)\n \treturn NULL;\n }\n \n-static int\n-mlx5dr_action_conv_reformat_type_to_action(uint32_t reformat_type,\n-\t\t\t\t\t enum mlx5dr_action_type *action_type)\n-{\n-\tswitch (reformat_type) {\n-\tcase MLX5DR_ACTION_REFORMAT_TYPE_TNL_L2_TO_L2:\n-\t\t*action_type = MLX5DR_ACTION_TYP_TNL_L2_TO_L2;\n-\t\tbreak;\n-\tcase MLX5DR_ACTION_REFORMAT_TYPE_L2_TO_TNL_L2:\n-\t\t*action_type = MLX5DR_ACTION_TYP_L2_TO_TNL_L2;\n-\t\tbreak;\n-\tcase MLX5DR_ACTION_REFORMAT_TYPE_TNL_L3_TO_L2:\n-\t\t*action_type = MLX5DR_ACTION_TYP_TNL_L3_TO_L2;\n-\t\tbreak;\n-\tcase MLX5DR_ACTION_REFORMAT_TYPE_L2_TO_TNL_L3:\n-\t\t*action_type = MLX5DR_ACTION_TYP_L2_TO_TNL_L3;\n-\t\tbreak;\n-\tdefault:\n-\t\tDR_LOG(ERR, \"Invalid reformat type requested\");\n-\t\trte_errno = ENOTSUP;\n-\t\treturn rte_errno;\n-\t}\n-\treturn 0;\n-}\n-\n static void\n mlx5dr_action_conv_reformat_to_verbs(uint32_t action_type,\n \t\t\t\t uint32_t *verb_reformat_type)\n {\n \tswitch (action_type) {\n-\tcase MLX5DR_ACTION_TYP_TNL_L2_TO_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2:\n \t\t*verb_reformat_type =\n \t\t\tMLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2;\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:\n \t\t*verb_reformat_type =\n \t\t\tMLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL;\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_TNL_L3_TO_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:\n \t\t*verb_reformat_type =\n \t\t\tMLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L3:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3:\n \t\t*verb_reformat_type =\n \t\t\tMLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;\n \t\tbreak;\n@@ -1470,16 +1445,16 @@ mlx5dr_action_create_reformat_hws(struct mlx5dr_context *ctx,\n \tint ret;\n \n \tswitch (action->type) {\n-\tcase MLX5DR_ACTION_TYP_TNL_L2_TO_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2:\n \t\tret = mlx5dr_action_create_stcs(action, NULL);\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:\n \t\tret = mlx5dr_action_handle_l2_to_tunnel_l2(ctx, data_sz, data, bulk_size, action);\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L3:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3:\n \t\tret = mlx5dr_action_handle_l2_to_tunnel_l3(ctx, data_sz, data, bulk_size, action);\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_TNL_L3_TO_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:\n \t\tret = mlx5dr_action_handle_tunnel_l3_to_l2(ctx, data_sz, data, bulk_size, action);\n \t\tbreak;\n \n@@ -1494,21 +1469,16 @@ mlx5dr_action_create_reformat_hws(struct mlx5dr_context *ctx,\n \n struct mlx5dr_action *\n mlx5dr_action_create_reformat(struct mlx5dr_context *ctx,\n-\t\t\t enum mlx5dr_action_reformat_type reformat_type,\n+\t\t\t enum mlx5dr_action_type reformat_type,\n \t\t\t size_t data_sz,\n \t\t\t void *inline_data,\n \t\t\t uint32_t log_bulk_size,\n \t\t\t uint32_t flags)\n {\n-\tenum mlx5dr_action_type action_type;\n \tstruct mlx5dr_action *action;\n \tint ret;\n \n-\tret = mlx5dr_action_conv_reformat_type_to_action(reformat_type, &action_type);\n-\tif (ret)\n-\t\treturn NULL;\n-\n-\taction = mlx5dr_action_create_generic(ctx, flags, action_type);\n+\taction = mlx5dr_action_create_generic(ctx, flags, reformat_type);\n \tif (!action)\n \t\treturn NULL;\n \n@@ -1712,7 +1682,7 @@ static void mlx5dr_action_destroy_hws(struct mlx5dr_action *action)\n \tcase MLX5DR_ACTION_TYP_DROP:\n \tcase MLX5DR_ACTION_TYP_CTR:\n \tcase MLX5DR_ACTION_TYP_FT:\n-\tcase MLX5DR_ACTION_TYP_TNL_L2_TO_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2:\n \tcase MLX5DR_ACTION_TYP_ASO_METER:\n \tcase MLX5DR_ACTION_TYP_ASO_CT:\n \tcase MLX5DR_ACTION_TYP_PUSH_VLAN:\n@@ -1726,18 +1696,18 @@ static void mlx5dr_action_destroy_hws(struct mlx5dr_action *action)\n \t\tmlx5dr_action_destroy_stcs(action);\n \t\tmlx5dr_action_put_shared_stc(action, MLX5DR_CONTEXT_SHARED_STC_POP);\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_TNL_L3_TO_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:\n \tcase MLX5DR_ACTION_TYP_MODIFY_HDR:\n \t\tmlx5dr_action_destroy_stcs(action);\n \t\tif (action->modify_header.num_of_actions > 1)\n \t\t\tmlx5dr_pat_arg_destroy_modify_header(action->ctx, action);\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L3:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3:\n \t\tmlx5dr_action_destroy_stcs(action);\n \t\tmlx5dr_action_put_shared_stc(action, MLX5DR_CONTEXT_SHARED_STC_DECAP);\n \t\tmlx5dr_cmd_destroy_obj(action->reformat.arg_obj);\n \t\tbreak;\n-\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:\n \t\tmlx5dr_action_destroy_stcs(action);\n \t\tmlx5dr_cmd_destroy_obj(action->reformat.arg_obj);\n \t\tbreak;\n@@ -1747,10 +1717,10 @@ static void mlx5dr_action_destroy_hws(struct mlx5dr_action *action)\n static void mlx5dr_action_destroy_root(struct mlx5dr_action *action)\n {\n \tswitch (action->type) {\n-\tcase MLX5DR_ACTION_TYP_TNL_L2_TO_L2:\n-\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L2:\n-\tcase MLX5DR_ACTION_TYP_TNL_L3_TO_L2:\n-\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L3:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3:\n \tcase MLX5DR_ACTION_TYP_MODIFY_HDR:\n \t\tibv_destroy_flow_action(action->flow_action);\n \t\tbreak;\n@@ -2256,7 +2226,7 @@ int mlx5dr_action_template_process(struct mlx5dr_action_template *at)\n \t\t\tsetter->idx_double = i;\n \t\t\tbreak;\n \n-\t\tcase MLX5DR_ACTION_TYP_TNL_L2_TO_L2:\n+\t\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2:\n \t\t\t/* Single remove header to header */\n \t\t\tsetter = mlx5dr_action_setter_find_first(last_setter, ASF_SINGLE1 | ASF_MODIFY);\n \t\t\tsetter->flags |= ASF_SINGLE1 | ASF_REMOVE | ASF_REPARSE;\n@@ -2264,7 +2234,7 @@ int mlx5dr_action_template_process(struct mlx5dr_action_template *at)\n \t\t\tsetter->idx_single = i;\n \t\t\tbreak;\n \n-\t\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L2:\n+\t\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:\n \t\t\t/* Double insert header with pointer */\n \t\t\tsetter = mlx5dr_action_setter_find_first(last_setter, ASF_DOUBLE);\n \t\t\tsetter->flags |= ASF_DOUBLE | ASF_REPARSE;\n@@ -2272,7 +2242,7 @@ int mlx5dr_action_template_process(struct mlx5dr_action_template *at)\n \t\t\tsetter->idx_double = i;\n \t\t\tbreak;\n \n-\t\tcase MLX5DR_ACTION_TYP_L2_TO_TNL_L3:\n+\t\tcase MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3:\n \t\t\t/* Single remove + Double insert header with pointer */\n \t\t\tsetter = mlx5dr_action_setter_find_first(last_setter, ASF_SINGLE1 | ASF_DOUBLE);\n \t\t\tsetter->flags |= ASF_SINGLE1 | ASF_DOUBLE | ASF_REPARSE | ASF_REMOVE;\n@@ -2282,7 +2252,7 @@ int mlx5dr_action_template_process(struct mlx5dr_action_template *at)\n \t\t\tsetter->idx_single = i;\n \t\t\tbreak;\n \n-\t\tcase MLX5DR_ACTION_TYP_TNL_L3_TO_L2:\n+\t\tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:\n \t\t\t/* Double modify header list with remove and push inline */\n \t\t\tsetter = mlx5dr_action_setter_find_first(last_setter,\n \t\t\t\t\t\t\t\t ASF_DOUBLE | ASF_REMOVE);\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_debug.c b/drivers/net/mlx5/hws/mlx5dr_debug.c\nindex d249f8d869..5064b23b7d 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_debug.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_debug.c\n@@ -6,10 +6,10 @@\n \n const char *mlx5dr_debug_action_type_str[] = {\n \t[MLX5DR_ACTION_TYP_LAST] = \"LAST\",\n-\t[MLX5DR_ACTION_TYP_TNL_L2_TO_L2] = \"TNL_L2_TO_L2\",\n-\t[MLX5DR_ACTION_TYP_L2_TO_TNL_L2] = \"L2_TO_TNL_L2\",\n-\t[MLX5DR_ACTION_TYP_TNL_L3_TO_L2] = \"TNL_L3_TO_L2\",\n-\t[MLX5DR_ACTION_TYP_L2_TO_TNL_L3] = \"L2_TO_TNL_L3\",\n+\t[MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2] = \"TNL_L2_TO_L2\",\n+\t[MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2] = \"L2_TO_TNL_L2\",\n+\t[MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2] = \"TNL_L3_TO_L2\",\n+\t[MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3] = \"L2_TO_TNL_L3\",\n \t[MLX5DR_ACTION_TYP_DROP] = \"DROP\",\n \t[MLX5DR_ACTION_TYP_TIR] = \"TIR\",\n \t[MLX5DR_ACTION_TYP_FT] = \"FT\",\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_pat_arg.c b/drivers/net/mlx5/hws/mlx5dr_pat_arg.c\nindex bedaedb677..309a61d477 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_pat_arg.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_pat_arg.c\n@@ -73,7 +73,7 @@ static bool mlx5dr_pat_compare_pattern(enum mlx5dr_action_type cur_type,\n \t\treturn false;\n \n \t /* All decap-l3 look the same, only change is the num of actions */\n-\tif (type == MLX5DR_ACTION_TYP_TNL_L3_TO_L2)\n+\tif (type == MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2)\n \t\treturn true;\n \n \tfor (i = 0; i < num_of_actions; i++) {\ndiff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 330386df77..e1adc081c1 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -1420,7 +1420,7 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \tstruct rte_flow_action *actions = at->actions;\n \tstruct rte_flow_action *action_start = actions;\n \tstruct rte_flow_action *masks = at->masks;\n-\tenum mlx5dr_action_reformat_type refmt_type = 0;\n+\tenum mlx5dr_action_type refmt_type = 0;\n \tconst struct rte_flow_action_raw_encap *raw_encap_data;\n \tconst struct rte_flow_item *enc_item = NULL, *enc_item_m = NULL;\n \tuint16_t reformat_src = 0;\n@@ -1575,7 +1575,7 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\t\t masks->conf)->definition;\n \t\t\treformat_used = true;\n \t\t\treformat_src = actions - action_start;\n-\t\t\trefmt_type = MLX5DR_ACTION_REFORMAT_TYPE_L2_TO_TNL_L2;\n+\t\t\trefmt_type = MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:\n \t\t\tMLX5_ASSERT(!reformat_used);\n@@ -1586,13 +1586,13 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\t\t masks->conf)->definition;\n \t\t\treformat_used = true;\n \t\t\treformat_src = actions - action_start;\n-\t\t\trefmt_type = MLX5DR_ACTION_REFORMAT_TYPE_L2_TO_TNL_L2;\n+\t\t\trefmt_type = MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:\n \t\tcase RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:\n \t\t\tMLX5_ASSERT(!reformat_used);\n \t\t\treformat_used = true;\n-\t\t\trefmt_type = MLX5DR_ACTION_REFORMAT_TYPE_TNL_L2_TO_L2;\n+\t\t\trefmt_type = MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_RAW_ENCAP:\n \t\t\traw_encap_data =\n@@ -1608,18 +1608,18 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\tif (reformat_used) {\n \t\t\t\trefmt_type = data_size <\n \t\t\t\tMLX5_ENCAPSULATION_DECISION_SIZE ?\n-\t\t\t\tMLX5DR_ACTION_REFORMAT_TYPE_TNL_L3_TO_L2 :\n-\t\t\t\tMLX5DR_ACTION_REFORMAT_TYPE_L2_TO_TNL_L3;\n+\t\t\t\tMLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2 :\n+\t\t\t\tMLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3;\n \t\t\t} else {\n \t\t\t\treformat_used = true;\n \t\t\t\trefmt_type =\n-\t\t\t\tMLX5DR_ACTION_REFORMAT_TYPE_L2_TO_TNL_L2;\n+\t\t\t\tMLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2;\n \t\t\t}\n \t\t\treformat_src = actions - action_start;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_RAW_DECAP:\n \t\t\treformat_used = true;\n-\t\t\trefmt_type = MLX5DR_ACTION_REFORMAT_TYPE_TNL_L2_TO_L2;\n+\t\t\trefmt_type = MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_SEND_TO_KERNEL:\n \t\t\tflow_hw_translate_group(dev, cfg, attr->group,\n@@ -4523,10 +4523,10 @@ static enum mlx5dr_action_type mlx5_hw_dr_action_types[] = {\n \t[RTE_FLOW_ACTION_TYPE_JUMP] = MLX5DR_ACTION_TYP_FT,\n \t[RTE_FLOW_ACTION_TYPE_QUEUE] = MLX5DR_ACTION_TYP_TIR,\n \t[RTE_FLOW_ACTION_TYPE_RSS] = MLX5DR_ACTION_TYP_TIR,\n-\t[RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = MLX5DR_ACTION_TYP_L2_TO_TNL_L2,\n-\t[RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = MLX5DR_ACTION_TYP_L2_TO_TNL_L2,\n-\t[RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = MLX5DR_ACTION_TYP_TNL_L2_TO_L2,\n-\t[RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = MLX5DR_ACTION_TYP_TNL_L2_TO_L2,\n+\t[RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2,\n+\t[RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2,\n+\t[RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2,\n+\t[RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2,\n \t[RTE_FLOW_ACTION_TYPE_MODIFY_FIELD] = MLX5DR_ACTION_TYP_MODIFY_HDR,\n \t[RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT] = MLX5DR_ACTION_TYP_VPORT,\n \t[RTE_FLOW_ACTION_TYPE_CONNTRACK] = MLX5DR_ACTION_TYP_ASO_CT,\n@@ -4604,7 +4604,7 @@ flow_hw_dr_actions_template_create(struct rte_flow_actions_template *at)\n \tenum mlx5dr_action_type action_types[MLX5_HW_MAX_ACTS] = { MLX5DR_ACTION_TYP_LAST };\n \tunsigned int i;\n \tuint16_t curr_off;\n-\tenum mlx5dr_action_type reformat_act_type = MLX5DR_ACTION_TYP_TNL_L2_TO_L2;\n+\tenum mlx5dr_action_type reformat_act_type = MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2;\n \tuint16_t reformat_off = UINT16_MAX;\n \tuint16_t mhdr_off = UINT16_MAX;\n \tuint16_t cnt_off = UINT16_MAX;\n@@ -4642,16 +4642,16 @@ flow_hw_dr_actions_template_create(struct rte_flow_actions_template *at)\n \t\t\tdata_size = raw_encap_data->size;\n \t\t\tif (reformat_off != UINT16_MAX) {\n \t\t\t\treformat_act_type = data_size < MLX5_ENCAPSULATION_DECISION_SIZE ?\n-\t\t\t\t\tMLX5DR_ACTION_TYP_TNL_L3_TO_L2 :\n-\t\t\t\t\tMLX5DR_ACTION_TYP_L2_TO_TNL_L3;\n+\t\t\t\t\tMLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2 :\n+\t\t\t\t\tMLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3;\n \t\t\t} else {\n \t\t\t\treformat_off = curr_off++;\n-\t\t\t\treformat_act_type = MLX5DR_ACTION_TYP_L2_TO_TNL_L2;\n+\t\t\t\treformat_act_type = MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2;\n \t\t\t}\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_RAW_DECAP:\n \t\t\treformat_off = curr_off++;\n-\t\t\treformat_act_type = MLX5DR_ACTION_TYP_TNL_L2_TO_L2;\n+\t\t\treformat_act_type = MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:\n \t\t\tif (mhdr_off == UINT16_MAX) {\n", "prefixes": [ "v3", "3/5" ] }