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GET /api/patches/129710/?format=api
{ "id": 129710, "url": "http://patchwork.dpdk.org/api/patches/129710/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230727093107.7242-2-bruce.richardson@intel.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230727093107.7242-2-bruce.richardson@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230727093107.7242-2-bruce.richardson@intel.com", "date": "2023-07-27T09:31:06", "name": "[1/2] build/x86: remove conditional checks for AVX2 support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "0be15ca92f7136ad95f233d2f6de0654d0f2ce5a", "submitter": { "id": 20, "url": "http://patchwork.dpdk.org/api/people/20/?format=api", "name": "Bruce Richardson", "email": "bruce.richardson@intel.com" }, "delegate": { "id": 24651, "url": "http://patchwork.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230727093107.7242-2-bruce.richardson@intel.com/mbox/", "series": [ { "id": 29021, "url": "http://patchwork.dpdk.org/api/series/29021/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29021", "date": "2023-07-27T09:31:05", "name": "simplify building x86 code with AVX2 support", "version": 1, "mbox": "http://patchwork.dpdk.org/series/29021/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/129710/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/129710/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5050A42F5B;\n\tThu, 27 Jul 2023 11:31:27 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D065943246;\n\tThu, 27 Jul 2023 11:31:22 +0200 (CEST)", "from mgamail.intel.com (unknown [134.134.136.100])\n by mails.dpdk.org (Postfix) with ESMTP id DDAC440041\n for <dev@dpdk.org>; Thu, 27 Jul 2023 11:31:19 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 27 Jul 2023 02:31:18 -0700", "from silpixa00401385.ir.intel.com ([10.237.214.14])\n by orsmga008.jf.intel.com with ESMTP; 27 Jul 2023 02:31:17 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1690450280; x=1721986280;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=MiZiStFWdwDqW27nERB440CyOf4znlpLmSKqbK65EPg=;\n b=iTBwPIWinaOGL/uSgrvmuxPb3M09CoI9NlIB89ojGvg0qQbQ3PftATkT\n tAYQYPIbgRtbxx+FA91bEhW1AMOjIWw0gwL7MldNvbZkHUS29Y8qQ1IX1\n 8bSPQ3+z4ZDiC02ljHM6kDmG2nzRzir/TVATTXUv3ari3gTrUJhCfLg0E\n xqRpAfKZ5wImD0JX13IhxW5XDF1Ni6omkd/lKhuOQ6gPF6kSJT9tYoZ6P\n Xw0XuhRsQxMoKBEo7ubF+Xg/wAVWijMUFEFbVtSSsyxiDt6OTiTLfKz84\n bEA2Vs4mpSE/m9QsluWrUMohFSzvAJgE3yXLzLZF0fG4AViwBybuxwMzN g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10783\"; a=\"434537442\"", "E=Sophos;i=\"6.01,234,1684825200\"; d=\"scan'208\";a=\"434537442\"", "E=McAfee;i=\"6600,9927,10783\"; a=\"756584459\"", "E=Sophos;i=\"6.01,234,1684825200\"; d=\"scan'208\";a=\"756584459\"" ], "X-ExtLoop1": "1", "From": "Bruce Richardson <bruce.richardson@intel.com>", "To": "dev@dpdk.org", "Cc": "Bruce Richardson <bruce.richardson@intel.com>", "Subject": "[PATCH 1/2] build/x86: remove conditional checks for AVX2 support", "Date": "Thu, 27 Jul 2023 10:31:06 +0100", "Message-Id": "<20230727093107.7242-2-bruce.richardson@intel.com>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<20230727093107.7242-1-bruce.richardson@intel.com>", "References": "<20230727093107.7242-1-bruce.richardson@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "In a number of libraries and drivers we have multiple levels of checks\nfor enabling AVX2 support. In these cases:\n\n* we first check for AVX2 support in the build-time ISA, i.e. through\n the instruction-set/-march flag. If present, we add source file to the\n list of sources.\n* if not enabled at the minimum instruction-set level, i.e. a\n default/generic build, we then check for compiler support for AVX2\n and, if available, did a separate build of the AVX2 file using an\n additional flag to enable the instruction set.\n\nWhile this works, and was necessary in older releases, we no longer need\nthis level of complexity, as all supported DPDK compilers have support\nfor AVX2. This makes the second check unnecessary.\n\nHowever, when we look at the effect of the second option above vs the\nfirst, the only real difference is that in the second case, we add an\nadditional \"-mavx2\" to the build flags. This flag simply makes the\ninstruction set available for use, so should be harmless in the case\nwhere the \"march\" flag already has that instruction set available.\nTherefore, we can remove the check for the first case also, and always\nuse the fallback case with the extra flag.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n drivers/net/bnxt/meson.build | 27 ++++++++++-----------------\n drivers/net/enic/meson.build | 10 +++-------\n drivers/net/i40e/meson.build | 23 +++++++----------------\n drivers/net/iavf/meson.build | 23 +++++++----------------\n drivers/net/ice/meson.build | 22 +++++++---------------\n lib/acl/meson.build | 24 ++++++------------------\n 6 files changed, 40 insertions(+), 89 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/meson.build b/drivers/net/bnxt/meson.build\nindex c7a0d5f6c9..c223a21002 100644\n--- a/drivers/net/bnxt/meson.build\n+++ b/drivers/net/bnxt/meson.build\n@@ -53,23 +53,16 @@ subdir('hcapi/cfa')\n \n if arch_subdir == 'x86'\n sources += files('bnxt_rxtx_vec_sse.c')\n- # compile AVX2 version if either:\n- # a. we have AVX supported in minimum instruction set baseline\n- # b. it's not minimum instruction set, but supported by compiler\n- if cc.get_define('__AVX2__', args: machine_args) != ''\n- cflags += ['-DCC_AVX2_SUPPORT']\n- sources += files('bnxt_rxtx_vec_avx2.c')\n- elif cc.has_argument('-mavx2')\n- cflags += ['-DCC_AVX2_SUPPORT']\n- bnxt_avx2_lib = static_library('bnxt_avx2_lib',\n- 'bnxt_rxtx_vec_avx2.c',\n- dependencies: [static_rte_ethdev,\n- static_rte_bus_pci,\n- static_rte_kvargs, static_rte_hash],\n- include_directories: includes,\n- c_args: [cflags, '-mavx2'])\n- objs += bnxt_avx2_lib.extract_objects('bnxt_rxtx_vec_avx2.c')\n- endif\n+ cflags += ['-DCC_AVX2_SUPPORT']\n+ # build AVX2 code with instruction set explicitly enabled for runtime selection\n+ bnxt_avx2_lib = static_library('bnxt_avx2_lib',\n+ 'bnxt_rxtx_vec_avx2.c',\n+ dependencies: [static_rte_ethdev,\n+ static_rte_bus_pci,\n+ static_rte_kvargs, static_rte_hash],\n+ include_directories: includes,\n+ c_args: [cflags, '-mavx2'])\n+ objs += bnxt_avx2_lib.extract_objects('bnxt_rxtx_vec_avx2.c')\n elif arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64')\n sources += files('bnxt_rxtx_vec_neon.c')\n endif\ndiff --git a/drivers/net/enic/meson.build b/drivers/net/enic/meson.build\nindex 77dcd9e7ec..8700ae27f2 100644\n--- a/drivers/net/enic/meson.build\n+++ b/drivers/net/enic/meson.build\n@@ -28,14 +28,10 @@ sources = files(\n deps += ['hash']\n includes += include_directories('base')\n \n-# The current implementation assumes 64-bit pointers\n-if cc.get_define('__AVX2__', args: machine_args) != '' and dpdk_conf.get('RTE_ARCH_64')\n- sources += files('enic_rxtx_vec_avx2.c')\n-# Build the avx2 handler if the compiler supports it, even though 'machine'\n-# does not. This is to support users who build for the min supported machine\n+# Build the avx2 handler for 64-bit X86 targets, even though 'machine'\n+# may not. This is to support users who build for the min supported machine\n # and need to run the binary on newer CPUs too.\n-# This part is from i40e meson.build\n-elif cc.has_argument('-mavx2') and dpdk_conf.get('RTE_ARCH_64')\n+if dpdk_conf.has('RTE_ARCH_X86_64')\n enic_avx2_lib = static_library('enic_avx2_lib',\n 'enic_rxtx_vec_avx2.c',\n dependencies: [static_rte_ethdev, static_rte_bus_pci],\ndiff --git a/drivers/net/i40e/meson.build b/drivers/net/i40e/meson.build\nindex 8e53b87a65..46600520e1 100644\n--- a/drivers/net/i40e/meson.build\n+++ b/drivers/net/i40e/meson.build\n@@ -49,22 +49,13 @@ if arch_subdir == 'x86'\n cflags += ['-fno-asynchronous-unwind-tables']\n endif\n \n- # compile AVX2 version if either:\n- # a. we have AVX supported in minimum instruction set baseline\n- # b. it's not minimum instruction set, but supported by compiler\n- if cc.get_define('__AVX2__', args: machine_args) != ''\n- cflags += ['-DCC_AVX2_SUPPORT']\n- sources += files('i40e_rxtx_vec_avx2.c')\n- elif cc.has_argument('-mavx2')\n- cflags += ['-DCC_AVX2_SUPPORT']\n- i40e_avx2_lib = static_library('i40e_avx2_lib',\n- 'i40e_rxtx_vec_avx2.c',\n- dependencies: [static_rte_ethdev,\n- static_rte_kvargs, static_rte_hash],\n- include_directories: includes,\n- c_args: [cflags, '-mavx2'])\n- objs += i40e_avx2_lib.extract_objects('i40e_rxtx_vec_avx2.c')\n- endif\n+ cflags += ['-DCC_AVX2_SUPPORT']\n+ i40e_avx2_lib = static_library('i40e_avx2_lib',\n+ 'i40e_rxtx_vec_avx2.c',\n+ dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],\n+ include_directories: includes,\n+ c_args: [cflags, '-mavx2'])\n+ objs += i40e_avx2_lib.extract_objects('i40e_rxtx_vec_avx2.c')\n \n i40e_avx512_cpu_support = (\n cc.get_define('__AVX512F__', args: machine_args) != '' and\ndiff --git a/drivers/net/iavf/meson.build b/drivers/net/iavf/meson.build\nindex fc09ffa2ae..ff949ef92b 100644\n--- a/drivers/net/iavf/meson.build\n+++ b/drivers/net/iavf/meson.build\n@@ -29,22 +29,13 @@ if arch_subdir == 'x86'\n cflags += ['-fno-asynchronous-unwind-tables']\n endif\n \n- # compile AVX2 version if either:\n- # a. we have AVX supported in minimum instruction set baseline\n- # b. it's not minimum instruction set, but supported by compiler\n- if cc.get_define('__AVX2__', args: machine_args) != ''\n- cflags += ['-DCC_AVX2_SUPPORT']\n- sources += files('iavf_rxtx_vec_avx2.c')\n- elif cc.has_argument('-mavx2')\n- cflags += ['-DCC_AVX2_SUPPORT']\n- iavf_avx2_lib = static_library('iavf_avx2_lib',\n- 'iavf_rxtx_vec_avx2.c',\n- dependencies: [static_rte_ethdev,\n- static_rte_kvargs, static_rte_hash],\n- include_directories: includes,\n- c_args: [cflags, '-mavx2'])\n- objs += iavf_avx2_lib.extract_objects('iavf_rxtx_vec_avx2.c')\n- endif\n+ cflags += ['-DCC_AVX2_SUPPORT']\n+ iavf_avx2_lib = static_library('iavf_avx2_lib',\n+ 'iavf_rxtx_vec_avx2.c',\n+ dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],\n+ include_directories: includes,\n+ c_args: [cflags, '-mavx2'])\n+ objs += iavf_avx2_lib.extract_objects('iavf_rxtx_vec_avx2.c')\n \n iavf_avx512_cpu_support = (\n cc.get_define('__AVX512F__', args: machine_args) != '' and\ndiff --git a/drivers/net/ice/meson.build b/drivers/net/ice/meson.build\nindex 460528854a..98288f6ac0 100644\n--- a/drivers/net/ice/meson.build\n+++ b/drivers/net/ice/meson.build\n@@ -28,21 +28,13 @@ if arch_subdir == 'x86'\n cflags += ['-fno-asynchronous-unwind-tables']\n endif\n \n- # compile AVX2 version if either:\n- # a. we have AVX supported in minimum instruction set baseline\n- # b. it's not minimum instruction set, but supported by compiler\n- if cc.get_define('__AVX2__', args: machine_args) != ''\n- cflags += ['-DCC_AVX2_SUPPORT']\n- sources += files('ice_rxtx_vec_avx2.c')\n- elif cc.has_argument('-mavx2')\n- cflags += ['-DCC_AVX2_SUPPORT']\n- ice_avx2_lib = static_library('ice_avx2_lib',\n- 'ice_rxtx_vec_avx2.c',\n- dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],\n- include_directories: includes,\n- c_args: [cflags, '-mavx2'])\n- objs += ice_avx2_lib.extract_objects('ice_rxtx_vec_avx2.c')\n- endif\n+ cflags += ['-DCC_AVX2_SUPPORT']\n+ ice_avx2_lib = static_library('ice_avx2_lib',\n+ 'ice_rxtx_vec_avx2.c',\n+ dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],\n+ include_directories: includes,\n+ c_args: [cflags, '-mavx2'])\n+ objs += ice_avx2_lib.extract_objects('ice_rxtx_vec_avx2.c')\n \n ice_avx512_cpu_support = (\n cc.get_define('__AVX512F__', args: machine_args) != '' and\ndiff --git a/lib/acl/meson.build b/lib/acl/meson.build\nindex fbe17f9454..87f19757a8 100644\n--- a/lib/acl/meson.build\n+++ b/lib/acl/meson.build\n@@ -14,24 +14,12 @@ headers = files('rte_acl.h', 'rte_acl_osdep.h')\n if dpdk_conf.has('RTE_ARCH_X86')\n sources += files('acl_run_sse.c')\n \n- # compile AVX2 version if either:\n- # a. we have AVX supported in minimum instruction set baseline\n- # b. it's not minimum instruction set, but supported by compiler\n- #\n- # in former case, just add avx2 C file to files list\n- # in latter case, compile c file to static lib, using correct compiler\n- # flags, and then have the .o file from static lib linked into main lib.\n- if cc.get_define('__AVX2__', args: machine_args) != ''\n- sources += files('acl_run_avx2.c')\n- cflags += '-DCC_AVX2_SUPPORT'\n- elif cc.has_argument('-mavx2')\n- avx2_tmplib = static_library('avx2_tmp',\n- 'acl_run_avx2.c',\n- dependencies: static_rte_eal,\n- c_args: cflags + ['-mavx2'])\n- objs += avx2_tmplib.extract_objects('acl_run_avx2.c')\n- cflags += '-DCC_AVX2_SUPPORT'\n- endif\n+ cflags += '-DCC_AVX2_SUPPORT'\n+ avx2_tmplib = static_library('avx2_tmp',\n+ 'acl_run_avx2.c',\n+ dependencies: static_rte_eal,\n+ c_args: cflags + ['-mavx2'])\n+ objs += avx2_tmplib.extract_objects('acl_run_avx2.c')\n \n # compile AVX512 version if:\n # we are building 64-bit binary AND binutils can generate proper code\n", "prefixes": [ "1/2" ] }