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GET /api/patches/129714/?format=api
{ "id": 129714, "url": "http://patchwork.dpdk.org/api/patches/129714/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230727115926.2252988-3-adwivedi@marvell.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230727115926.2252988-3-adwivedi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230727115926.2252988-3-adwivedi@marvell.com", "date": "2023-07-27T11:59:26", "name": "[v1,2/2] net/cnxk: add get flow aged ops", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "949d5e762ff6129d6a11cd9d48453262f6922ba3", "submitter": { "id": 1561, "url": "http://patchwork.dpdk.org/api/people/1561/?format=api", "name": "Ankur Dwivedi", "email": "adwivedi@marvell.com" }, "delegate": { "id": 310, "url": "http://patchwork.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230727115926.2252988-3-adwivedi@marvell.com/mbox/", "series": [ { "id": 29022, "url": "http://patchwork.dpdk.org/api/series/29022/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29022", "date": "2023-07-27T11:59:24", "name": "add support for flow aging in CNXK driver", "version": 1, "mbox": "http://patchwork.dpdk.org/series/29022/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/129714/comments/", "check": "warning", "checks": "http://patchwork.dpdk.org/api/patches/129714/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4AA7242F5F;\n\tThu, 27 Jul 2023 14:00:03 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 37ED94324F;\n\tThu, 27 Jul 2023 14:00:03 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 1CA504324E\n for <dev@dpdk.org>; Thu, 27 Jul 2023 14:00:02 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 36R8KtE0021332 for <dev@dpdk.org>; Thu, 27 Jul 2023 05:00:01 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3s389rtpxu-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 27 Jul 2023 05:00:00 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Thu, 27 Jul 2023 04:59:58 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Thu, 27 Jul 2023 04:59:58 -0700", "from localhost.localdomain (unknown [10.28.36.185])\n by maili.marvell.com (Postfix) with ESMTP id 37A903F704A;\n Thu, 27 Jul 2023 04:59:55 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=9mFIvpqYvzwLZf0Wj1tq6I0oDE59HDmBfvE1Vkt9I5Q=;\n b=Jc2b18SCCiNSdyYsM2fIo4Dnxt9WOLbM10u/M09Woc9WI70ZLNCMTVJqS1QxG48Ij4yI\n J6F1dAhNLH6b0DMwoL0dal9F97xGqkm00PVr6CcJYoiw5UG8ksp+5DajXkOYTyLqaILQ\n 9Z4x8BLz1l0T4Y3EkeoCcWQGeNGEDVKDsv94ItkxT1aERz6UQ4xzf+CWTH27H5wU37HR\n oGM18gMKIFbOZ/X4uVteltVh0u/7I/GYsMFuDPv1plukj3O+h7NbNp/TQfKC9sEyayKW\n 6KGYb3M6OBVhYPMPzGNATLtCip2JR6QhpgMXqOB0or7z19tVr4sndVAg7BCM6gRXXinT OA==", "From": "Ankur Dwivedi <adwivedi@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <ndabilpuram@marvell.com>,\n <kirankumark@marvell.com>,\n <skori@marvell.com>, <skoteshwar@marvell.com>,\n Ankur Dwivedi <adwivedi@marvell.com>", "Subject": "[PATCH v1 2/2] net/cnxk: add get flow aged ops", "Date": "Thu, 27 Jul 2023 17:29:26 +0530", "Message-ID": "<20230727115926.2252988-3-adwivedi@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230727115926.2252988-1-adwivedi@marvell.com>", "References": "<20230727115926.2252988-1-adwivedi@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "ONCoibpIYX1D0arm0wIITXoQqM9YEP6z", "X-Proofpoint-GUID": "ONCoibpIYX1D0arm0wIITXoQqM9YEP6z", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26\n definitions=2023-07-27_06,2023-07-26_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Adds get flow aged ops in CNXK driver. Also adds the devargs to get the\npoll frequency of control thread.\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\n---\n doc/guides/nics/cnxk.rst | 12 +++++++\n doc/guides/nics/features/cnxk.ini | 1 +\n doc/guides/nics/features/cnxk_vf.ini | 1 +\n drivers/net/cnxk/cnxk_ethdev_devargs.c | 21 +++++++++++-\n drivers/net/cnxk/cnxk_flow.c | 45 ++++++++++++++++++++++++++\n 5 files changed, 79 insertions(+), 1 deletion(-)", "diff": "diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst\nindex 9229056f6f..dc71ab7fc3 100644\n--- a/doc/guides/nics/cnxk.rst\n+++ b/doc/guides/nics/cnxk.rst\n@@ -581,6 +581,18 @@ Runtime Config Options for inline device\n With the above configuration, driver would poll for soft expiry events every\n 1000 usec.\n \n+- ``NPC MCAM Aging poll frequency in seconds`` (default ``10``)\n+\n+ Poll frequency for aging control thread can be specified by\n+ ``aging_poll_freq`` ``devargs`` parameter.\n+\n+ For example::\n+\n+ -a 0002:01:00.2,aging_poll_freq=50\n+\n+ With the above configuration, driver would poll for aging flows every 50\n+ seconds.\n+\n Debugging Options\n -----------------\n \ndiff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini\nindex 838e781d6d..ebedbd0588 100644\n--- a/doc/guides/nics/features/cnxk.ini\n+++ b/doc/guides/nics/features/cnxk.ini\n@@ -80,6 +80,7 @@ vxlan = Y\n vxlan_gpe = Y\n \n [rte_flow actions]\n+age = Y\n count = Y\n drop = Y\n flag = Y\ndiff --git a/doc/guides/nics/features/cnxk_vf.ini b/doc/guides/nics/features/cnxk_vf.ini\nindex 470c45ce59..0e9ad94382 100644\n--- a/doc/guides/nics/features/cnxk_vf.ini\n+++ b/doc/guides/nics/features/cnxk_vf.ini\n@@ -71,6 +71,7 @@ vxlan = Y\n vxlan_gpe = Y\n \n [rte_flow actions]\n+age = Y\n count = Y\n drop = Y\n flag = Y\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c b/drivers/net/cnxk/cnxk_ethdev_devargs.c\nindex e1a0845ece..8e862be933 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_devargs.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c\n@@ -245,6 +245,19 @@ parse_sdp_channel_mask(const char *key, const char *value, void *extra_args)\n \treturn 0;\n }\n \n+static int\n+parse_val_u16(const char *key, const char *value, void *extra_args)\n+{\n+\tRTE_SET_USED(key);\n+\tuint16_t val;\n+\n+\tval = atoi(value);\n+\n+\t*(uint16_t *)extra_args = val;\n+\n+\treturn 0;\n+}\n+\n #define CNXK_RSS_RETA_SIZE\t\"reta_size\"\n #define CNXK_SCL_ENABLE\t\t\"scalar_enable\"\n #define CNXK_TX_COMPL_ENA \"tx_compl_ena\"\n@@ -265,10 +278,12 @@ parse_sdp_channel_mask(const char *key, const char *value, void *extra_args)\n #define CNXK_CUSTOM_SA_ACT\t\"custom_sa_act\"\n #define CNXK_SQB_SLACK\t\t\"sqb_slack\"\n #define CNXK_NIX_META_BUF_SZ\t\"meta_buf_sz\"\n+#define CNXK_FLOW_AGING_POLL_FREQ\t\"aging_poll_freq\"\n \n int\n cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n {\n+\tuint16_t aging_thread_poll_freq = ROC_NPC_AGE_POLL_FREQ_MIN;\n \tuint16_t reta_sz = ROC_NIX_RSS_RETA_SZ_64;\n \tuint16_t sqb_count = CNXK_NIX_TX_MAX_SQB;\n \tstruct flow_pre_l2_size_info pre_l2_info;\n@@ -338,6 +353,8 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n \trte_kvargs_process(kvlist, CNXK_SQB_SLACK, &parse_sqb_count,\n \t\t\t &sqb_slack);\n \trte_kvargs_process(kvlist, CNXK_NIX_META_BUF_SZ, &parse_meta_bufsize, &meta_buf_sz);\n+\trte_kvargs_process(kvlist, CNXK_FLOW_AGING_POLL_FREQ, &parse_val_u16,\n+\t\t\t &aging_thread_poll_freq);\n \trte_kvargs_free(kvlist);\n \n null_devargs:\n@@ -369,6 +386,7 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n \tdev->npc.pre_l2_size_offset = pre_l2_info.pre_l2_size_off;\n \tdev->npc.pre_l2_size_offset_mask = pre_l2_info.pre_l2_size_off_mask;\n \tdev->npc.pre_l2_size_shift_dir = pre_l2_info.pre_l2_size_shift_dir;\n+\tdev->npc.flow_age.aging_poll_freq = aging_thread_poll_freq;\n \treturn 0;\n exit:\n \treturn -EINVAL;\n@@ -390,4 +408,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_cnxk,\n \t\t\t CNXK_NO_INL_DEV \"=0\"\n \t\t\t CNXK_SDP_CHANNEL_MASK \"=<1-4095>/<1-4095>\"\n \t\t\t CNXK_CUSTOM_SA_ACT \"=1\"\n-\t\t\t CNXK_SQB_SLACK \"=<12-512>\");\n+\t\t\t CNXK_SQB_SLACK \"=<12-512>\"\n+\t\t\t CNXK_FLOW_AGING_POLL_FREQ \"=<10-65535>\");\ndiff --git a/drivers/net/cnxk/cnxk_flow.c b/drivers/net/cnxk/cnxk_flow.c\nindex 3b8348ae9c..9d69dd90e3 100644\n--- a/drivers/net/cnxk/cnxk_flow.c\n+++ b/drivers/net/cnxk/cnxk_flow.c\n@@ -230,6 +230,10 @@ cnxk_map_actions(struct rte_eth_dev *eth_dev, const struct rte_flow_attr *attr,\n \t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_METER;\n \t\t\tin_actions[i].conf = actions->conf;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_AGE:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_AGE;\n+\t\t\tin_actions[i].conf = actions->conf;\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\tplt_npc_dbg(\"Action is not supported = %d\",\n \t\t\t\t actions->type);\n@@ -480,10 +484,51 @@ cnxk_flow_dev_dump(struct rte_eth_dev *eth_dev, struct rte_flow *flow,\n \treturn 0;\n }\n \n+static int\n+cnxk_flow_get_aged_flows(struct rte_eth_dev *eth_dev, void **context,\n+\t\t\t uint32_t nb_contexts, struct rte_flow_error *err)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct roc_npc *roc_npc = &dev->npc;\n+\tstruct roc_npc_flow_age *flow_age;\n+\tuint32_t start_id;\n+\tuint32_t end_id;\n+\tint cnt = 0;\n+\tuint32_t sn;\n+\tuint32_t i;\n+\n+\tRTE_SET_USED(err);\n+\n+\tflow_age = &roc_npc->flow_age;\n+\n+\tdo {\n+\t\tsn = plt_seqcount_read_begin(&flow_age->seq_cnt);\n+\n+\t\tif (nb_contexts == 0)\n+\t\t\tcnt = flow_age->aged_flows_cnt;\n+\t\telse {\n+\t\t\tstart_id = flow_age->start_id;\n+\t\t\tend_id = flow_age->end_id;\n+\t\t\tfor (i = start_id; i <= end_id; i++) {\n+\t\t\t\tif ((int)nb_contexts == cnt)\n+\t\t\t\t\tbreak;\n+\t\t\t\tif (plt_bitmap_get(flow_age->aged_flows, i)) {\n+\t\t\t\t\tcontext[cnt] =\n+\t\t\t\t\t\troc_npc_aged_flow_ctx_get(roc_npc, i);\n+\t\t\t\t\tcnt++;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\t} while (plt_seqcount_read_retry(&flow_age->seq_cnt, sn));\n+\n+\treturn cnt;\n+}\n+\n struct rte_flow_ops cnxk_flow_ops = {\n \t.validate = cnxk_flow_validate,\n \t.flush = cnxk_flow_flush,\n \t.query = cnxk_flow_query,\n \t.isolate = cnxk_flow_isolate,\n \t.dev_dump = cnxk_flow_dev_dump,\n+\t.get_aged_flows = cnxk_flow_get_aged_flows,\n };\n", "prefixes": [ "v1", "2/2" ] }