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GET /api/patches/129880/?format=api
http://patchwork.dpdk.org/api/patches/129880/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230803075038.307012-12-david.marchand@redhat.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230803075038.307012-12-david.marchand@redhat.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230803075038.307012-12-david.marchand@redhat.com", "date": "2023-08-03T07:50:34", "name": "[11/14] pci: define some ACS constants", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e44930f91ba00274ad751338a29d5608c42a08a2", "submitter": { "id": 1173, "url": "http://patchwork.dpdk.org/api/people/1173/?format=api", "name": "David Marchand", "email": "david.marchand@redhat.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230803075038.307012-12-david.marchand@redhat.com/mbox/", "series": [ { "id": 29101, "url": "http://patchwork.dpdk.org/api/series/29101/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29101", "date": "2023-08-03T07:50:23", "name": "Cleanup PCI(e) drivers", "version": 1, "mbox": "http://patchwork.dpdk.org/series/29101/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/129880/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/129880/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 79F0542FC1;\n\tThu, 3 Aug 2023 09:52:10 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 89F914327E;\n\tThu, 3 Aug 2023 09:51:34 +0200 (CEST)", "from us-smtp-delivery-124.mimecast.com\n (us-smtp-delivery-124.mimecast.com [170.10.129.124])\n by mails.dpdk.org (Postfix) with ESMTP id C52E24327E\n for <dev@dpdk.org>; Thu, 3 Aug 2023 09:51:32 +0200 (CEST)", "from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com\n [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS\n (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n us-mta-383-gCZGPm4YOSuJzIEq1oQuiQ-1; Thu, 03 Aug 2023 03:51:26 -0400", "from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com\n [10.11.54.3])\n (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n (No client certificate requested)\n by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 406F6185A7A3;\n Thu, 3 Aug 2023 07:51:26 +0000 (UTC)", "from dmarchan.redhat.com (unknown [10.45.224.120])\n by smtp.corp.redhat.com (Postfix) with ESMTP id EB97B1121325;\n Thu, 3 Aug 2023 07:51:24 +0000 (UTC)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1691049092;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:content-type:content-type:\n content-transfer-encoding:content-transfer-encoding:\n in-reply-to:in-reply-to:references:references;\n bh=Zwc3yv4ox58GKxlRhBB0bFhJZjwX4zwtno3c7smq3LA=;\n b=I8rAxK43UUPjllJV4Xezct5TDFfdBJQUfQAI5ae/b6PjOz636UmNLG93ueW69HCYgISu/z\n wT4U7O3COjbJgrRwcyMS6qkaUot8d3INaYiRymGsbks7ZM+OLA/IzfgPPlljR1Rt6nPasN\n mc5O/0HvxARNUPJiaJ7LoENCPkvC5os=", "X-MC-Unique": "gCZGPm4YOSuJzIEq1oQuiQ-1", "From": "David Marchand <david.marchand@redhat.com>", "To": "dev@dpdk.org", "Cc": "thomas@monjalon.net, ferruh.yigit@amd.com, chenbo.xia@intel.com,\n nipun.gupta@amd.com, Timothy McDaniel <timothy.mcdaniel@intel.com>,\n Gaetan Rivet <grive@u256.net>", "Subject": "[PATCH 11/14] pci: define some ACS constants", "Date": "Thu, 3 Aug 2023 09:50:34 +0200", "Message-ID": "<20230803075038.307012-12-david.marchand@redhat.com>", "In-Reply-To": "<20230803075038.307012-1-david.marchand@redhat.com>", "References": "<20230803075038.307012-1-david.marchand@redhat.com>", "MIME-Version": "1.0", "X-Scanned-By": "MIMEDefang 3.1 on 10.11.54.3", "X-Mimecast-Spam-Score": "0", "X-Mimecast-Originator": "redhat.com", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain; charset=\"US-ASCII\"; x-default=true", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Define some PCI ACS extended feature constants and use them in existing\ndrivers.\n\nSigned-off-by: David Marchand <david.marchand@redhat.com>\n---\n drivers/event/dlb2/pf/dlb2_main.c | 23 ++++++++---------------\n lib/pci/rte_pci.h | 9 +++++++++\n 2 files changed, 17 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c\nindex 29e3001627..8e729d1964 100644\n--- a/drivers/event/dlb2/pf/dlb2_main.c\n+++ b/drivers/event/dlb2/pf/dlb2_main.c\n@@ -33,13 +33,6 @@\n #define DLB2_PCI_ERR_ROOT_STATUS 0x30\n #define DLB2_PCI_ERR_COR_STATUS 0x10\n #define DLB2_PCI_ERR_UNCOR_STATUS 0x4\n-#define DLB2_PCI_ACS_CAP 0x4\n-#define DLB2_PCI_ACS_CTRL 0x6\n-#define DLB2_PCI_ACS_SV 0x1\n-#define DLB2_PCI_ACS_RR 0x4\n-#define DLB2_PCI_ACS_CR 0x8\n-#define DLB2_PCI_ACS_UF 0x10\n-#define DLB2_PCI_ACS_EC 0x20\n \n static int\n dlb2_pf_init_driver_state(struct dlb2_dev *dlb2_dev)\n@@ -492,16 +485,16 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)\n \n \tif (acs_cap_offset >= 0) {\n \t\tuint16_t acs_cap, acs_ctrl, acs_mask;\n-\t\toff = acs_cap_offset + DLB2_PCI_ACS_CAP;\n+\t\toff = acs_cap_offset + RTE_PCI_ACS_CAP;\n \t\tif (rte_pci_read_config(pdev, &acs_cap, 2, off) != 2)\n \t\t\tacs_cap = 0;\n \n-\t\toff = acs_cap_offset + DLB2_PCI_ACS_CTRL;\n+\t\toff = acs_cap_offset + RTE_PCI_ACS_CTRL;\n \t\tif (rte_pci_read_config(pdev, &acs_ctrl, 2, off) != 2)\n \t\t\tacs_ctrl = 0;\n \n-\t\tacs_mask = DLB2_PCI_ACS_SV | DLB2_PCI_ACS_RR;\n-\t\tacs_mask |= (DLB2_PCI_ACS_CR | DLB2_PCI_ACS_UF);\n+\t\tacs_mask = RTE_PCI_ACS_SV | RTE_PCI_ACS_RR;\n+\t\tacs_mask |= (RTE_PCI_ACS_CR | RTE_PCI_ACS_UF);\n \t\tacs_ctrl |= (acs_cap & acs_mask);\n \n \t\tret = rte_pci_write_config(pdev, &acs_ctrl, 2, off);\n@@ -511,15 +504,15 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)\n \t\t\treturn ret;\n \t\t}\n \n-\t\toff = acs_cap_offset + DLB2_PCI_ACS_CTRL;\n+\t\toff = acs_cap_offset + RTE_PCI_ACS_CTRL;\n \t\tif (rte_pci_read_config(pdev, &acs_ctrl, 2, off) != 2)\n \t\t\tacs_ctrl = 0;\n \n-\t\tacs_mask = DLB2_PCI_ACS_RR | DLB2_PCI_ACS_CR;\n-\t\tacs_mask |= DLB2_PCI_ACS_EC;\n+\t\tacs_mask = RTE_PCI_ACS_RR | RTE_PCI_ACS_CR;\n+\t\tacs_mask |= RTE_PCI_ACS_EC;\n \t\tacs_ctrl &= ~acs_mask;\n \n-\t\toff = acs_cap_offset + DLB2_PCI_ACS_CTRL;\n+\t\toff = acs_cap_offset + RTE_PCI_ACS_CTRL;\n \t\tret = rte_pci_write_config(pdev, &acs_ctrl, 2, off);\n \t\tif (ret != 2) {\n \t\t\tDLB2_LOG_ERR(\"[%s()] failed to write the pcie config space at offset %d\\n\",\ndiff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h\nindex 67b34a0af2..315c37571d 100644\n--- a/lib/pci/rte_pci.h\n+++ b/lib/pci/rte_pci.h\n@@ -100,6 +100,15 @@ extern \"C\" {\n #define RTE_PCI_EXT_CAP_ID_SRIOV\t0x10\t/* SR-IOV*/\n #define RTE_PCI_EXT_CAP_ID_PRI\t\t0x13\t/* Page Request Interface */\n \n+/* Access Control Service */\n+#define RTE_PCI_ACS_CAP\t\t\t0x04\t/* ACS Capability Register */\n+#define RTE_PCI_ACS_CTRL\t\t0x06\t/* ACS Control Register */\n+#define RTE_PCI_ACS_SV\t\t\t0x0001\t/* Source Validation */\n+#define RTE_PCI_ACS_RR\t\t\t0x0004\t/* P2P Request Redirect */\n+#define RTE_PCI_ACS_CR\t\t\t0x0008\t/* P2P Completion Redirect */\n+#define RTE_PCI_ACS_UF\t\t\t0x0010\t/* Upstream Forwarding */\n+#define RTE_PCI_ACS_EC\t\t\t0x0020\t/* P2P Egress Control */\n+\n /* Single Root I/O Virtualization */\n #define RTE_PCI_SRIOV_CAP\t\t0x04\t/* SR-IOV Capabilities */\n #define RTE_PCI_SRIOV_CTRL\t\t0x08\t/* SR-IOV Control */\n", "prefixes": [ "11/14" ] }{ "id": 129880, "url": "