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GET /api/patches/130030/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 130030,
    "url": "http://patchwork.dpdk.org/api/patches/130030/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230809155134.539287-18-beilei.xing@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230809155134.539287-18-beilei.xing@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230809155134.539287-18-beilei.xing@intel.com",
    "date": "2023-08-09T15:51:32",
    "name": "[17/19] net/cpfl: support dispatch process",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "bbdaca11774c62bedbce0d4c0dc0657ead66764a",
    "submitter": {
        "id": 410,
        "url": "http://patchwork.dpdk.org/api/people/410/?format=api",
        "name": "Xing, Beilei",
        "email": "beilei.xing@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patchwork.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230809155134.539287-18-beilei.xing@intel.com/mbox/",
    "series": [
        {
            "id": 29139,
            "url": "http://patchwork.dpdk.org/api/series/29139/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29139",
            "date": "2023-08-09T15:51:15",
            "name": "net/cpfl: support port representor",
            "version": 1,
            "mbox": "http://patchwork.dpdk.org/series/29139/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/130030/comments/",
    "check": "warning",
    "checks": "http://patchwork.dpdk.org/api/patches/130030/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9638443016;\n\tWed,  9 Aug 2023 09:35:18 +0200 (CEST)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1C6B843259;\n\tWed,  9 Aug 2023 09:34:01 +0200 (CEST)",
            "from mgamail.intel.com (mgamail.intel.com [134.134.136.126])\n by mails.dpdk.org (Postfix) with ESMTP id 0828F40DDB\n for <dev@dpdk.org>; Wed,  9 Aug 2023 09:33:55 +0200 (CEST)",
            "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 09 Aug 2023 00:33:37 -0700",
            "from dpdk-beileix-icelake.sh.intel.com ([10.67.116.252])\n by fmsmga005.fm.intel.com with ESMTP; 09 Aug 2023 00:33:36 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1691566438; x=1723102438;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=adaF0gpl0YLEEh6d7V66scm+srADb8tJPcwWV5UP1oU=;\n b=LpsvH9oA9I2duvm8vDorZ5ncRBUEIsCIGVOBe3z71c2DFUVve2RTloLh\n F6t8CF2GClpusQE4lmPm/xOrE7J+TTxCkEjVNGSRXMOkEu2jAh1KLYp5l\n A98YNrn/ctl9ZPUzoZNUBS+7PPynm4AykaS107c9nfyvm5fppCz3Vl/yb\n TqrKdbS2nxWSz4y+pVB1niRk0ROynfnY2pNF4xW71x4fa/xftAPGVwQDg\n cFjqSN06I2PVLboh9R3fdTAW3CkN8ggntqyqJKZ0yHQOxaLye0V/Zb3V7\n rKEMRdOugY1TsKccZrqh1g65zFloOyk7P8POdvxiocn3WuE74bRR1zrk3 A==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6600,9927,10795\"; a=\"356014539\"",
            "E=Sophos;i=\"6.01,158,1684825200\"; d=\"scan'208\";a=\"356014539\"",
            "E=McAfee;i=\"6600,9927,10795\"; a=\"1062337469\"",
            "E=Sophos;i=\"6.01,158,1684825200\"; d=\"scan'208\";a=\"1062337469\""
        ],
        "X-ExtLoop1": "1",
        "From": "beilei.xing@intel.com",
        "To": "jingjing.wu@intel.com,\n\tmingxia.liu@intel.com",
        "Cc": "dev@dpdk.org,\n\tBeilei Xing <beilei.xing@intel.com>",
        "Subject": "[PATCH 17/19] net/cpfl: support dispatch process",
        "Date": "Wed,  9 Aug 2023 15:51:32 +0000",
        "Message-Id": "<20230809155134.539287-18-beilei.xing@intel.com>",
        "X-Mailer": "git-send-email 2.34.1",
        "In-Reply-To": "<20230809155134.539287-1-beilei.xing@intel.com>",
        "References": "<20230809155134.539287-1-beilei.xing@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Beilei Xing <beilei.xing@intel.com>\n\nAdd dispatch process cpfl_packets_dispatch function.\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\n---\n drivers/net/cpfl/cpfl_ethdev.c      |  39 ++++++++-\n drivers/net/cpfl/cpfl_ethdev.h      |   1 +\n drivers/net/cpfl/cpfl_representor.c |  80 +++++++++++++++++\n drivers/net/cpfl/cpfl_rxtx.c        | 131 ++++++++++++++++++++++++++++\n drivers/net/cpfl/cpfl_rxtx.h        |   8 ++\n 5 files changed, 257 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c\nindex f674d93050..8569a0b81d 100644\n--- a/drivers/net/cpfl/cpfl_ethdev.c\n+++ b/drivers/net/cpfl/cpfl_ethdev.c\n@@ -129,6 +129,13 @@ static const struct rte_cpfl_xstats_name_off rte_cpfl_stats_strings[] = {\n \n #define CPFL_NB_XSTATS\t\t\tRTE_DIM(rte_cpfl_stats_strings)\n \n+static const struct rte_mbuf_dynfield cpfl_source_metadata_param = {\n+\t.name = \"cpfl_source_metadata\",\n+\t.size = sizeof(uint16_t),\n+\t.align = __alignof__(uint16_t),\n+\t.flags = 0,\n+};\n+\n static int\n cpfl_dev_link_update(struct rte_eth_dev *dev,\n \t\t     __rte_unused int wait_to_complete)\n@@ -2382,7 +2389,7 @@ static int\n cpfl_pci_probe_first(struct rte_pci_device *pci_dev)\n {\n \tstruct cpfl_adapter_ext *adapter;\n-\tint retval;\n+\tint retval, offset;\n \tuint16_t port_id;\n \n \tadapter = rte_zmalloc(\"cpfl_adapter_ext\",\n@@ -2432,7 +2439,22 @@ cpfl_pci_probe_first(struct rte_pci_device *pci_dev)\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to create exceptional vport. \");\n \t\t\tgoto close_ethdev;\n \t\t}\n+\n+\t\t/* register dynfield to carry src_vsi\n+\t\t * TODO: is this a waste to use dynfield? Can we redefine a recv func like\n+\t\t * below to carry src vsi directly by src_vsi[]?\n+\t\t * idpf_exceptioanl_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t * uint16_t src_vsi[], uint16_t nb_pkts)\n+\t\t */\n+\t\toffset = rte_mbuf_dynfield_register(&cpfl_source_metadata_param);\n+\t\tif (unlikely(offset == -1)) {\n+\t\t\tretval = -rte_errno;\n+\t\t\tPMD_INIT_LOG(ERR, \"source metadata is disabled in mbuf\");\n+\t\t\tgoto close_ethdev;\n+\t\t}\n+\t\tcpfl_dynfield_source_metadata_offset = offset;\n \t}\n+\n \tretval = cpfl_repr_create(pci_dev, adapter);\n \tif (retval != 0) {\n \t\tPMD_INIT_LOG(ERR, \"Failed to create representors \");\n@@ -2458,7 +2480,7 @@ cpfl_pci_probe_first(struct rte_pci_device *pci_dev)\n static int\n cpfl_pci_probe_again(struct rte_pci_device *pci_dev, struct cpfl_adapter_ext *adapter)\n {\n-\tint ret;\n+\tint ret, offset;\n \n \tret = cpfl_parse_devargs(pci_dev, adapter, false);\n \tif (ret != 0) {\n@@ -2478,6 +2500,19 @@ cpfl_pci_probe_again(struct rte_pci_device *pci_dev, struct cpfl_adapter_ext *ad\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to create exceptional vport. \");\n \t\t\treturn ret;\n \t\t}\n+\n+\t\t/* register dynfield to carry src_vsi\n+\t\t * TODO: is this a waste to use dynfield? Can we redefine a recv func like\n+\t\t * below to carry src vsi directly by src_vsi[]?\n+\t\t * idpf_exceptioanl_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t * uint16_t src_vsi[], uint16_t nb_pkts)\n+\t\t */\n+\t\toffset = rte_mbuf_dynfield_register(&cpfl_source_metadata_param);\n+\t\tif (unlikely(offset == -1)) {\n+\t\t\tPMD_INIT_LOG(ERR, \"source metadata is disabled in mbuf\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\tcpfl_dynfield_source_metadata_offset = offset;\n \t}\n \n \tret = cpfl_repr_create(pci_dev, adapter);\ndiff --git a/drivers/net/cpfl/cpfl_ethdev.h b/drivers/net/cpfl/cpfl_ethdev.h\nindex 33e810408b..5bd6f930b8 100644\n--- a/drivers/net/cpfl/cpfl_ethdev.h\n+++ b/drivers/net/cpfl/cpfl_ethdev.h\n@@ -227,6 +227,7 @@ int cpfl_cc_vport_info_get(struct cpfl_adapter_ext *adapter,\n \t\t\t   struct cpchnl2_vport_id *vport_id,\n \t\t\t   struct cpfl_vport_id *vi,\n \t\t\t   struct cpchnl2_get_vport_info_response *response);\n+int cpfl_packets_dispatch(void *arg);\n \n #define CPFL_DEV_TO_PCI(eth_dev)\t\t\\\n \tRTE_DEV_TO_PCI((eth_dev)->device)\ndiff --git a/drivers/net/cpfl/cpfl_representor.c b/drivers/net/cpfl/cpfl_representor.c\nindex 51b70ea346..a781cff403 100644\n--- a/drivers/net/cpfl/cpfl_representor.c\n+++ b/drivers/net/cpfl/cpfl_representor.c\n@@ -4,6 +4,7 @@\n \n #include \"cpfl_representor.h\"\n #include \"cpfl_rxtx.h\"\n+#include \"cpfl_ethdev.h\"\n \n static int\n cpfl_repr_whitelist_update(struct cpfl_adapter_ext *adapter,\n@@ -853,3 +854,82 @@ cpfl_repr_create(struct rte_pci_device *pci_dev, struct cpfl_adapter_ext *adapte\n \n \treturn 0;\n }\n+\n+static struct cpfl_repr *\n+cpfl_get_repr_by_vsi(struct cpfl_adapter_ext *adapter,\n+\t\t     uint16_t vsi_id)\n+{\n+\tconst struct cpfl_repr_id *repr_id;\n+\tstruct rte_eth_dev *dev;\n+\tstruct cpfl_repr *repr;\n+\tuint32_t iter = 0;\n+\n+\trte_spinlock_lock(&adapter->repr_lock);\n+\n+\twhile (rte_hash_iterate(adapter->repr_whitelist_hash,\n+\t\t\t\t(const void **)&repr_id, (void **)&dev, &iter) >= 0) {\n+\t\tif (dev == NULL)\n+\t\t\tcontinue;\n+\n+\t\trepr = CPFL_DEV_TO_REPR(dev);\n+\t\tif (repr->vport_info->vport_info.vsi_id == vsi_id) {\n+\t\t\trte_spinlock_unlock(&adapter->repr_lock);\n+\t\t\treturn repr;\n+\t\t}\n+\t}\n+\n+\trte_spinlock_unlock(&adapter->repr_lock);\n+\treturn NULL;\n+}\n+\n+#define PKT_DISPATCH_BURST  32\n+/* Function to dispath packets to representors' rx rings */\n+int\n+cpfl_packets_dispatch(void *arg)\n+{\n+\tstruct rte_eth_dev *dev = arg;\n+\tstruct cpfl_vport *vport = dev->data->dev_private;\n+\tstruct cpfl_adapter_ext *adapter = vport->itf.adapter;\n+\tstruct cpfl_rx_queue **rxq =\n+\t\t(struct cpfl_rx_queue **)dev->data->rx_queues;\n+\tstruct rte_mbuf *pkts_burst[PKT_DISPATCH_BURST];\n+\tstruct cpfl_repr *repr;\n+\tstruct rte_eth_dev_data *dev_data;\n+\tstruct cpfl_repr_rx_queue *repr_rxq;\n+\tuint16_t src_vsi;\n+\tuint32_t nb_rx, nb_enq;\n+\tuint8_t i, j;\n+\n+\tif (dev->data->dev_started == 0) {\n+\t\t/* skip if excpetional vport is not started*/\n+\t\treturn 0;\n+\t}\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n+\t\tnb_rx = cpfl_splitq_recv_pkts(rxq[i], pkts_burst, PKT_DISPATCH_BURST);\n+\t\tfor (j = 0; j < nb_rx; j++) {\n+\t\t\tsrc_vsi = *CPFL_MBUF_SOURCE_METADATA(pkts_burst[j]);\n+\t\t\t/* Get the repr according to source vsi */\n+\t\t\trepr = cpfl_get_repr_by_vsi(adapter, src_vsi);\n+\t\t\tif (unlikely(!repr)) {\n+\t\t\t\trte_pktmbuf_free(pkts_burst[j]);\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\t\t\tdev_data = (struct rte_eth_dev_data *)repr->itf.data;\n+\t\t\tif (unlikely(!dev_data->dev_started || !dev_data->rx_queue_state[0])) {\n+\t\t\t\trte_pktmbuf_free(pkts_burst[j]);\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\t\t\trepr_rxq = (struct cpfl_repr_rx_queue *)\n+\t\t\t\t(((struct rte_eth_dev_data *)repr->itf.data)->rx_queues[0]);\n+\t\t\tif (unlikely(!repr_rxq || !repr_rxq->rx_ring)) {\n+\t\t\t\trte_pktmbuf_free(pkts_burst[j]);\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\t\t\tnb_enq = rte_ring_enqueue_bulk(repr_rxq->rx_ring,\n+\t\t\t\t\t\t       (void *)&pkts_burst[j], 1, NULL);\n+\t\t\tif (!nb_enq) /* enqueue fails, just free it */\n+\t\t\t\trte_pktmbuf_free(pkts_burst[j]);\n+\t\t}\n+\t}\n+\treturn 0;\n+}\ndiff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c\nindex 882efe04cf..a931b5ec12 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.c\n+++ b/drivers/net/cpfl/cpfl_rxtx.c\n@@ -1412,6 +1412,137 @@ cpfl_stop_queues(struct rte_eth_dev *dev)\n \t}\n }\n \n+int cpfl_dynfield_source_metadata_offset = -1;\n+\n+uint16_t\n+cpfl_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t      uint16_t nb_pkts)\n+{\n+\tvolatile struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc_ring;\n+\tvolatile struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc;\n+\tuint16_t pktlen_gen_bufq_id;\n+\tstruct idpf_rx_queue *rxq;\n+\tconst uint32_t *ptype_tbl;\n+\tuint8_t status_err0_qw1;\n+\tstruct idpf_adapter *ad;\n+\tstruct rte_mbuf *rxm;\n+\tuint16_t rx_id_bufq1;\n+\tuint16_t rx_id_bufq2;\n+\tuint64_t pkt_flags;\n+\tuint16_t pkt_len;\n+\tuint16_t bufq_id;\n+\tuint16_t gen_id;\n+\tuint16_t rx_id;\n+\tuint16_t nb_rx;\n+\tuint64_t ts_ns;\n+\n+\tnb_rx = 0;\n+\trxq = rx_queue;\n+\tad = rxq->adapter;\n+\n+\tif (unlikely(rxq == NULL) || unlikely(!rxq->q_started))\n+\t\treturn nb_rx;\n+\n+\trx_id = rxq->rx_tail;\n+\trx_id_bufq1 = rxq->bufq1->rx_next_avail;\n+\trx_id_bufq2 = rxq->bufq2->rx_next_avail;\n+\trx_desc_ring = rxq->rx_ring;\n+\tptype_tbl = rxq->adapter->ptype_tbl;\n+\n+\tif ((rxq->offloads & IDPF_RX_OFFLOAD_TIMESTAMP) != 0)\n+\t\trxq->hw_register_set = 1;\n+\n+\twhile (nb_rx < nb_pkts) {\n+\t\trx_desc = &rx_desc_ring[rx_id];\n+\n+\t\tpktlen_gen_bufq_id =\n+\t\t\trte_le_to_cpu_16(rx_desc->pktlen_gen_bufq_id);\n+\t\tgen_id = (pktlen_gen_bufq_id &\n+\t\t\t  VIRTCHNL2_RX_FLEX_DESC_ADV_GEN_M) >>\n+\t\t\tVIRTCHNL2_RX_FLEX_DESC_ADV_GEN_S;\n+\t\tif (gen_id != rxq->expected_gen_id)\n+\t\t\tbreak;\n+\n+\t\tpkt_len = (pktlen_gen_bufq_id &\n+\t\t\t   VIRTCHNL2_RX_FLEX_DESC_ADV_LEN_PBUF_M) >>\n+\t\t\tVIRTCHNL2_RX_FLEX_DESC_ADV_LEN_PBUF_S;\n+\t\tif (pkt_len == 0)\n+\t\t\tRX_LOG(ERR, \"Packet length is 0\");\n+\n+\t\trx_id++;\n+\t\tif (unlikely(rx_id == rxq->nb_rx_desc)) {\n+\t\t\trx_id = 0;\n+\t\t\trxq->expected_gen_id ^= 1;\n+\t\t}\n+\n+\t\tbufq_id = (pktlen_gen_bufq_id &\n+\t\t\t   VIRTCHNL2_RX_FLEX_DESC_ADV_BUFQ_ID_M) >>\n+\t\t\tVIRTCHNL2_RX_FLEX_DESC_ADV_BUFQ_ID_S;\n+\t\tif (bufq_id == 0) {\n+\t\t\trxm = rxq->bufq1->sw_ring[rx_id_bufq1];\n+\t\t\trx_id_bufq1++;\n+\t\t\tif (unlikely(rx_id_bufq1 == rxq->bufq1->nb_rx_desc))\n+\t\t\t\trx_id_bufq1 = 0;\n+\t\t\trxq->bufq1->nb_rx_hold++;\n+\t\t} else {\n+\t\t\trxm = rxq->bufq2->sw_ring[rx_id_bufq2];\n+\t\t\trx_id_bufq2++;\n+\t\t\tif (unlikely(rx_id_bufq2 == rxq->bufq2->nb_rx_desc))\n+\t\t\t\trx_id_bufq2 = 0;\n+\t\t\trxq->bufq2->nb_rx_hold++;\n+\t\t}\n+\n+\t\trxm->pkt_len = pkt_len;\n+\t\trxm->data_len = pkt_len;\n+\t\trxm->data_off = RTE_PKTMBUF_HEADROOM;\n+\t\trxm->next = NULL;\n+\t\trxm->nb_segs = 1;\n+\t\trxm->port = rxq->port_id;\n+\t\trxm->ol_flags = 0;\n+\t\trxm->packet_type =\n+\t\t\tptype_tbl[(rte_le_to_cpu_16(rx_desc->ptype_err_fflags0) &\n+\t\t\t\t   VIRTCHNL2_RX_FLEX_DESC_ADV_PTYPE_M) >>\n+\t\t\t\t  VIRTCHNL2_RX_FLEX_DESC_ADV_PTYPE_S];\n+\n+\t\tstatus_err0_qw1 = rx_desc->status_err0_qw1;\n+\t\tpkt_flags = idpf_splitq_rx_csum_offload(status_err0_qw1);\n+\t\tpkt_flags |= idpf_splitq_rx_rss_offload(rxm, rx_desc);\n+\t\tif (idpf_timestamp_dynflag > 0 &&\n+\t\t    (rxq->offloads & IDPF_RX_OFFLOAD_TIMESTAMP)) {\n+\t\t\t/* timestamp */\n+\t\t\tts_ns = idpf_tstamp_convert_32b_64b(ad,\n+\t\t\t\t\t\t\t    rxq->hw_register_set,\n+\t\t\t\t\t\t\t    rte_le_to_cpu_32(rx_desc->ts_high));\n+\t\t\trxq->hw_register_set = 0;\n+\t\t\t*RTE_MBUF_DYNFIELD(rxm,\n+\t\t\t\t\t   idpf_timestamp_dynfield_offset,\n+\t\t\t\t\t   rte_mbuf_timestamp_t *) = ts_ns;\n+\t\t\trxm->ol_flags |= idpf_timestamp_dynflag;\n+\t\t}\n+\n+\t\tif (likely(cpfl_dynfield_source_metadata_offset != -1))\n+\t\t\t*CPFL_MBUF_SOURCE_METADATA(rxm) =\n+\t\t\t\trte_le_to_cpu_16(rx_desc->fmd4);\n+\n+\t\trxm->ol_flags |= pkt_flags;\n+\n+\t\trx_pkts[nb_rx++] = rxm;\n+\t}\n+\n+\tif (nb_rx > 0) {\n+\t\trxq->rx_tail = rx_id;\n+\t\tif (rx_id_bufq1 != rxq->bufq1->rx_next_avail)\n+\t\t\trxq->bufq1->rx_next_avail = rx_id_bufq1;\n+\t\tif (rx_id_bufq2 != rxq->bufq2->rx_next_avail)\n+\t\t\trxq->bufq2->rx_next_avail = rx_id_bufq2;\n+\n+\t\tidpf_split_rx_bufq_refill(rxq->bufq1);\n+\t\tidpf_split_rx_bufq_refill(rxq->bufq2);\n+\t}\n+\n+\treturn nb_rx;\n+}\n+\n static inline void\n cpfl_set_tx_switch_ctx(uint16_t vsi_id, bool is_vsi,\n \t\t       volatile union idpf_flex_tx_ctx_desc *ctx_desc)\ndiff --git a/drivers/net/cpfl/cpfl_rxtx.h b/drivers/net/cpfl/cpfl_rxtx.h\nindex 463ab73323..39e5e115d6 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.h\n+++ b/drivers/net/cpfl/cpfl_rxtx.h\n@@ -81,6 +81,11 @@ cpfl_hw_qid_get(uint16_t start_qid, uint16_t offset)\n \treturn start_qid + offset;\n }\n \n+extern int cpfl_dynfield_source_metadata_offset;\n+\n+#define CPFL_MBUF_SOURCE_METADATA(m)\t\t\t\t\t\\\n+\tRTE_MBUF_DYNFIELD((m), cpfl_dynfield_source_metadata_offset, uint16_t *)\n+\n static inline uint64_t\n cpfl_hw_qtail_get(uint64_t tail_start, uint16_t offset, uint64_t tail_spacing)\n {\n@@ -128,4 +133,7 @@ uint16_t cpfl_dummy_xmit_pkts(void *queue,\n uint16_t cpfl_xmit_pkts_to_vsi(struct cpfl_tx_queue *txq,\n \t\t\t       struct rte_mbuf **tx_pkts,\n \t\t\t       uint16_t nb_pkts, uint16_t vsi_id);\n+uint16_t cpfl_splitq_recv_pkts(void *rx_queue,\n+\t\t\t       struct rte_mbuf **rx_pkts,\n+\t\t\t       uint16_t nb_pkts);\n #endif /* _CPFL_RXTX_H_ */\n",
    "prefixes": [
        "17/19"
    ]
}