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GET /api/patches/130182/?format=api
{ "id": 130182, "url": "http://patchwork.dpdk.org/api/patches/130182/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/1691775136-6460-4-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1691775136-6460-4-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1691775136-6460-4-git-send-email-roretzla@linux.microsoft.com", "date": "2023-08-11T17:32:13", "name": "[v2,3/6] eal: add rte atomic qualifier with casts", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "40237afba103eaab0401cae6671ca7f1a4b0da4c", "submitter": { "id": 2077, "url": "http://patchwork.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patchwork.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/1691775136-6460-4-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 29194, "url": "http://patchwork.dpdk.org/api/series/29194/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29194", "date": "2023-08-11T17:32:10", "name": "RFC optional rte optional stdatomics API", "version": 2, "mbox": "http://patchwork.dpdk.org/series/29194/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/130182/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/130182/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7033943036;\n\tFri, 11 Aug 2023 19:32:33 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E54DF43261;\n\tFri, 11 Aug 2023 19:32:22 +0200 (CEST)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id C676240F17;\n Fri, 11 Aug 2023 19:32:19 +0200 (CEST)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 1D3AF20FCF7F; Fri, 11 Aug 2023 10:32:19 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 1D3AF20FCF7F", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1691775139;\n bh=wZsvw5yF2iOgCSbKdxrjGE+mybBwUZMbxBA3Q52/OIM=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=qkcGLoOrm54DlY+QNwhYpDRMLaxJm4+9I1ErNdTWWSt0oTCDy3BkM+DxYwRD01FiL\n voEJQhhH7m1dxoekZ4bVpzOqoc/kXCufTEyS6/wLDrkBG/QBADNtJTVVJk2Xf/xzNx\n xtoK2mpoTVkmEPZx9jDyKIlow33U3vMunTWajtJU=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "techboard@dpdk.org, Bruce Richardson <bruce.richardson@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Jerin Jacob <jerinj@marvell.com>,\n Sunil Kumar Kori <skori@marvell.com>,\n =?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n Joyce Kong <joyce.kong@arm.com>, David Christensen <drc@linux.vnet.ibm.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n David Hunt <david.hunt@intel.com>, Thomas Monjalon <thomas@monjalon.net>,\n David Marchand <david.marchand@redhat.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v2 3/6] eal: add rte atomic qualifier with casts", "Date": "Fri, 11 Aug 2023 10:32:13 -0700", "Message-Id": "<1691775136-6460-4-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1691775136-6460-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1691717521-1025-1-git-send-email-roretzla@linux.microsoft.com>\n <1691775136-6460-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Introduce __rte_atomic qualifying casts in rte_optional atomics inline\nfunctions to prevent cascading the need to pass __rte_atomic qualified\narguments.\n\nWarning, this is really implementation dependent and being done\ntemporarily to avoid having to convert more of the libraries and tests in\nDPDK in the initial series that introduces the API. The consequence of the\nassumption of the ABI of the types in question not being ``the same'' is\nonly a risk that may be realized when enable_stdatomic=true.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\n---\n lib/eal/include/generic/rte_atomic.h | 48 ++++++++++++++++++++++++------------\n lib/eal/include/generic/rte_pause.h | 9 ++++---\n lib/eal/x86/rte_power_intrinsics.c | 7 +++---\n 3 files changed, 42 insertions(+), 22 deletions(-)", "diff": "diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h\nindex f6c4b3e..4f954e0 100644\n--- a/lib/eal/include/generic/rte_atomic.h\n+++ b/lib/eal/include/generic/rte_atomic.h\n@@ -274,7 +274,8 @@\n static inline void\n rte_atomic16_add(rte_atomic16_t *v, int16_t inc)\n {\n-\trte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_add_explicit((volatile int16_t __rte_atomic *)&v->cnt, inc,\n+\t rte_memory_order_seq_cst);\n }\n \n /**\n@@ -288,7 +289,8 @@\n static inline void\n rte_atomic16_sub(rte_atomic16_t *v, int16_t dec)\n {\n-\trte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_sub_explicit((volatile int16_t __rte_atomic *)&v->cnt, dec,\n+\t rte_memory_order_seq_cst);\n }\n \n /**\n@@ -341,7 +343,8 @@\n static inline int16_t\n rte_atomic16_add_return(rte_atomic16_t *v, int16_t inc)\n {\n-\treturn rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;\n+\treturn rte_atomic_fetch_add_explicit((volatile int16_t __rte_atomic *)&v->cnt, inc,\n+\t rte_memory_order_seq_cst) + inc;\n }\n \n /**\n@@ -361,7 +364,8 @@\n static inline int16_t\n rte_atomic16_sub_return(rte_atomic16_t *v, int16_t dec)\n {\n-\treturn rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;\n+\treturn rte_atomic_fetch_sub_explicit((volatile int16_t __rte_atomic *)&v->cnt, dec,\n+\t rte_memory_order_seq_cst) - dec;\n }\n \n /**\n@@ -380,7 +384,8 @@\n #ifdef RTE_FORCE_INTRINSICS\n static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)\n {\n-\treturn rte_atomic_fetch_add_explicit(&v->cnt, 1, rte_memory_order_seq_cst) + 1 == 0;\n+\treturn rte_atomic_fetch_add_explicit((volatile int16_t __rte_atomic *)&v->cnt, 1,\n+\t rte_memory_order_seq_cst) + 1 == 0;\n }\n #endif\n \n@@ -400,7 +405,8 @@ static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)\n #ifdef RTE_FORCE_INTRINSICS\n static inline int rte_atomic16_dec_and_test(rte_atomic16_t *v)\n {\n-\treturn rte_atomic_fetch_sub_explicit(&v->cnt, 1, rte_memory_order_seq_cst) - 1 == 0;\n+\treturn rte_atomic_fetch_sub_explicit((volatile int16_t __rte_atomic *)&v->cnt, 1,\n+\t rte_memory_order_seq_cst) - 1 == 0;\n }\n #endif\n \n@@ -553,7 +559,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)\n static inline void\n rte_atomic32_add(rte_atomic32_t *v, int32_t inc)\n {\n-\trte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_add_explicit((volatile int32_t __rte_atomic *)&v->cnt, inc,\n+\t rte_memory_order_seq_cst);\n }\n \n /**\n@@ -567,7 +574,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)\n static inline void\n rte_atomic32_sub(rte_atomic32_t *v, int32_t dec)\n {\n-\trte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_sub_explicit((volatile int32_t __rte_atomic *)&v->cnt, dec,\n+\t rte_memory_order_seq_cst);\n }\n \n /**\n@@ -620,7 +628,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)\n static inline int32_t\n rte_atomic32_add_return(rte_atomic32_t *v, int32_t inc)\n {\n-\treturn rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;\n+\treturn rte_atomic_fetch_add_explicit((volatile int32_t __rte_atomic *)&v->cnt, inc,\n+\t rte_memory_order_seq_cst) + inc;\n }\n \n /**\n@@ -640,7 +649,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)\n static inline int32_t\n rte_atomic32_sub_return(rte_atomic32_t *v, int32_t dec)\n {\n-\treturn rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;\n+\treturn rte_atomic_fetch_sub_explicit((volatile int32_t __rte_atomic *)&v->cnt, dec,\n+\t rte_memory_order_seq_cst) - dec;\n }\n \n /**\n@@ -659,7 +669,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)\n #ifdef RTE_FORCE_INTRINSICS\n static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)\n {\n-\treturn rte_atomic_fetch_add_explicit(&v->cnt, 1, rte_memory_order_seq_cst) + 1 == 0;\n+\treturn rte_atomic_fetch_add_explicit((volatile int32_t __rte_atomic *)&v->cnt, 1,\n+\t rte_memory_order_seq_cst) + 1 == 0;\n }\n #endif\n \n@@ -679,7 +690,8 @@ static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)\n #ifdef RTE_FORCE_INTRINSICS\n static inline int rte_atomic32_dec_and_test(rte_atomic32_t *v)\n {\n-\treturn rte_atomic_fetch_sub_explicit(&v->cnt, 1, rte_memory_order_seq_cst) - 1 == 0;\n+\treturn rte_atomic_fetch_sub_explicit((volatile int32_t __rte_atomic *)&v->cnt, 1,\n+\t rte_memory_order_seq_cst) - 1 == 0;\n }\n #endif\n \n@@ -885,7 +897,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)\n static inline void\n rte_atomic64_add(rte_atomic64_t *v, int64_t inc)\n {\n-\trte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_add_explicit((volatile int64_t __rte_atomic *)&v->cnt, inc,\n+\t rte_memory_order_seq_cst);\n }\n #endif\n \n@@ -904,7 +917,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)\n static inline void\n rte_atomic64_sub(rte_atomic64_t *v, int64_t dec)\n {\n-\trte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);\n+\trte_atomic_fetch_sub_explicit((volatile int64_t __rte_atomic *)&v->cnt, dec,\n+\t rte_memory_order_seq_cst);\n }\n #endif\n \n@@ -962,7 +976,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)\n static inline int64_t\n rte_atomic64_add_return(rte_atomic64_t *v, int64_t inc)\n {\n-\treturn rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;\n+\treturn rte_atomic_fetch_add_explicit((volatile int64_t __rte_atomic *)&v->cnt, inc,\n+\t rte_memory_order_seq_cst) + inc;\n }\n #endif\n \n@@ -986,7 +1001,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)\n static inline int64_t\n rte_atomic64_sub_return(rte_atomic64_t *v, int64_t dec)\n {\n-\treturn rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;\n+\treturn rte_atomic_fetch_sub_explicit((volatile int64_t __rte_atomic *)&v->cnt, dec,\n+\t rte_memory_order_seq_cst) - dec;\n }\n #endif\n \ndiff --git a/lib/eal/include/generic/rte_pause.h b/lib/eal/include/generic/rte_pause.h\nindex c816e7d..c261689 100644\n--- a/lib/eal/include/generic/rte_pause.h\n+++ b/lib/eal/include/generic/rte_pause.h\n@@ -87,7 +87,8 @@\n {\n \tassert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);\n \n-\twhile (rte_atomic_load_explicit(addr, memorder) != expected)\n+\twhile (rte_atomic_load_explicit((volatile uint16_t __rte_atomic *)addr, memorder)\n+\t != expected)\n \t\trte_pause();\n }\n \n@@ -97,7 +98,8 @@\n {\n \tassert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);\n \n-\twhile (rte_atomic_load_explicit(addr, memorder) != expected)\n+\twhile (rte_atomic_load_explicit((volatile uint32_t __rte_atomic *)addr, memorder)\n+\t != expected)\n \t\trte_pause();\n }\n \n@@ -107,7 +109,8 @@\n {\n \tassert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);\n \n-\twhile (rte_atomic_load_explicit(addr, memorder) != expected)\n+\twhile (rte_atomic_load_explicit((volatile uint64_t __rte_atomic *)addr, memorder)\n+\t != expected)\n \t\trte_pause();\n }\n \ndiff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c\nindex cf70e33..6c192f0 100644\n--- a/lib/eal/x86/rte_power_intrinsics.c\n+++ b/lib/eal/x86/rte_power_intrinsics.c\n@@ -23,9 +23,10 @@\n \tuint64_t val;\n \n \t/* trigger a write but don't change the value */\n-\tval = rte_atomic_load_explicit((volatile uint64_t *)addr, rte_memory_order_relaxed);\n-\trte_atomic_compare_exchange_strong_explicit((volatile uint64_t *)addr, &val, val,\n-\t\t\trte_memory_order_relaxed, rte_memory_order_relaxed);\n+\tval = rte_atomic_load_explicit((volatile uint64_t __rte_atomic *)addr,\n+\t rte_memory_order_relaxed);\n+\trte_atomic_compare_exchange_strong_explicit((volatile uint64_t __rte_atomic *)addr,\n+\t &val, val, rte_memory_order_relaxed, rte_memory_order_relaxed);\n }\n \n static bool wait_supported;\n", "prefixes": [ "v2", "3/6" ] }