Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/130728/?format=api
{ "id": 130728, "url": "http://patchwork.dpdk.org/api/patches/130728/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230824110956.1943559-26-chaoyong.he@corigine.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230824110956.1943559-26-chaoyong.he@corigine.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230824110956.1943559-26-chaoyong.he@corigine.com", "date": "2023-08-24T11:09:54", "name": "[25/27] net/nfp: refact the PCIe module", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "ea3bf003de80aa50c46dcb2d780610b29cba26da", "submitter": { "id": 2554, "url": "http://patchwork.dpdk.org/api/people/2554/?format=api", "name": "Chaoyong He", "email": "chaoyong.he@corigine.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230824110956.1943559-26-chaoyong.he@corigine.com/mbox/", "series": [ { "id": 29333, "url": "http://patchwork.dpdk.org/api/series/29333/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29333", "date": "2023-08-24T11:09:29", "name": "refact the nfpcore module", "version": 1, "mbox": "http://patchwork.dpdk.org/series/29333/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/130728/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/130728/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9080C430EF;\n\tThu, 24 Aug 2023 13:14:10 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 61983432F3;\n\tThu, 24 Aug 2023 13:11:37 +0200 (CEST)", "from NAM10-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam10on2129.outbound.protection.outlook.com [40.107.93.129])\n by mails.dpdk.org (Postfix) with ESMTP id 94D67432DB\n for <dev@dpdk.org>; Thu, 24 Aug 2023 13:11:32 +0200 (CEST)", "from SJ0PR13MB5545.namprd13.prod.outlook.com (2603:10b6:a03:424::5)\n by PH7PR13MB6116.namprd13.prod.outlook.com (2603:10b6:510:2b7::20)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6699.20; Thu, 24 Aug\n 2023 11:11:31 +0000", "from SJ0PR13MB5545.namprd13.prod.outlook.com\n ([fe80::51fe:5846:af8b:bace]) by SJ0PR13MB5545.namprd13.prod.outlook.com\n ([fe80::51fe:5846:af8b:bace%3]) with mapi id 15.20.6699.020; Thu, 24 Aug 2023\n 11:11:31 +0000" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=HljjRFlD3IVNBbC73VkjENFdyd48GpoyLfw5v2571cYr1Y3AlBA+Z9lBC6ZHBrL6mzWJ2wWR05miWmh2N0esGOZCUHRmhwvAO6RMkj8NODfqYwkogfJ7Ib7jY76+JKX8nh33E5rX/8oX+fy6CIiAa8pscENWEqSh0VBqBMxAnMjiAOL9kTVlE5N9qfdXO6vCCkmfyFHGGMU0yhHQaHRHwPj2vcfdO0D7XK6dWQHrInin8GMcgovYhiL7lJN9QscF9bz96/Y4PLG7lZup2QIigFhkz+wxm+KWNBD2rdLjmYzB1BBTWVRr6LOaitPqBRRGsGs9c7eIfCeBMvb3EUoBgA==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=r5P4vSzp4IvYosj5zToxzykSe5EnMyZ1tqFwvhNLzIk=;\n b=a8S6oM8Nc0U+NgAZqzIWrjzlqxDEiAHS5w108sIC86arxpvJHHHwhSqF1z5WTQnVq36wWRORO8Cm7zIwIhtxAaZeY6eKNVIVaKTQBd5mTd97P9RdzmufQmJ07nvV7Wnx4be0fljxKdChCiRWkMtzMIIDp//EAKyR4uanyD7I+7+2ciXBHNjby8ldpzV6iZG7ViAUlx66LoVkzBHh+gxRmeyGMoFmLIsftuRst4Tq2h2vrLEikCv2+B/30KDmyuTomln2PiEnTzlaJjD8jZMeR5Wf5KAI/zJdvWmr9DAIN6TLOBGCZqFXIYsmOGZMtRwG7PJOKHtB/74QcpTTEDHjng==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=corigine.com; dmarc=pass action=none header.from=corigine.com;\n dkim=pass header.d=corigine.com; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=corigine.onmicrosoft.com; s=selector2-corigine-onmicrosoft-com;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=r5P4vSzp4IvYosj5zToxzykSe5EnMyZ1tqFwvhNLzIk=;\n b=Z1TXgbd0h7ikYpI4UZaSfsgvvU0VvVCjXw+cfI73f2V3D/cV0lfa3/cIMfORe9OgZYQeBhswSi0t5+IB5730WiEGsHbsFL5HuiZW2RwSe3vKzHCcYg795asBJRFFVxhZbT8l9QUxX0aemcWLbE7wD2euBaRETzIy3QR2whZ52+I=", "Authentication-Results": "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=corigine.com;", "From": "Chaoyong He <chaoyong.he@corigine.com>", "To": "dev@dpdk.org", "Cc": "oss-drivers@corigine.com, niklas.soderlund@corigine.com,\n Chaoyong He <chaoyong.he@corigine.com>", "Subject": "[PATCH 25/27] net/nfp: refact the PCIe module", "Date": "Thu, 24 Aug 2023 19:09:54 +0800", "Message-Id": "<20230824110956.1943559-26-chaoyong.he@corigine.com>", "X-Mailer": "git-send-email 2.39.1", "In-Reply-To": "<20230824110956.1943559-1-chaoyong.he@corigine.com>", "References": "<20230824110956.1943559-1-chaoyong.he@corigine.com>", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-ClientProxiedBy": "SJ0PR05CA0005.namprd05.prod.outlook.com\n (2603:10b6:a03:33b::10) To SJ0PR13MB5545.namprd13.prod.outlook.com\n (2603:10b6:a03:424::5)", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "SJ0PR13MB5545:EE_|PH7PR13MB6116:EE_", "X-MS-Office365-Filtering-Correlation-Id": "bba0f3b6-9c9a-44a8-0cc7-08dba492de7a", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n ajpBqGI8GMEAyd+GBW1rzQrkJHBSMpKQ1ZpGsV0jYrNw/0A/+P41P74HL+w/dK0MXZPMVgYGaGFndyQ8cDzOivQW9uBkyzf6D8CHdPKtw3F4tP6F1Hz6T8H0RKjm13EWtPLsWaTZGpSB1TT3rmPEutSDcJKQugUrLWRMZh++8qt2wueHMVXTSSJ4Xu6d0BxS1oYTHG913vAuvHhH9Ldx5X95P8ghNPsCi4jvAI3Gbh+wmFCLENppJ5Kvp/LrD+56m9v9xmJI+XV2YvENDoZRkexlE4ff1LbrkID75H7CHZs3oqYdlMnVOHca2G/ZgV4GUFE2Zp9paY2Sk0IekOwFggUYoI5KV3ZomciaPmFetmKGQrNLSuGNJzxBsD8Ap4ump8wYBc2IkVgb/MKADl/4nm1v8zrWRwvf8Zb1fFXnC13QjjEQnfp8NRBClnLW11THDAMpKT1gjLqp9GsP7ZseDo47qU4waPAoBon23N+gUeEkSxRissJCgAiw5jamBsvT9oQPoUhHE3VvNI4kbDvECwUlSURjs2ymBxBqP2bW/l09hnke5SMgczmPMNx2Dua4Jdmif29QIaJiF9VR938+fp4ArH0Tf7Cs0TcXEpoESh9+OT4LVBiRmyV9ECsHAm2ysc2EjHzSJmiSSAf6R+PXOhTS7jXkLpaLQm5MxYwNL5fqXyD8Y+P1wE8BIoh0AnDY", "X-Forefront-Antispam-Report": "CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:SJ0PR13MB5545.namprd13.prod.outlook.com; PTR:; CAT:NONE;\n SFS:(13230031)(366004)(39830400003)(346002)(396003)(136003)(376002)(1800799009)(186009)(451199024)(6506007)(26005)(1076003)(2616005)(107886003)(52116002)(12101799020)(6512007)(66574015)(6486002)(83380400001)(38100700002)(8676002)(8936002)(36756003)(316002)(4326008)(41300700001)(2906002)(86362001)(5660300002)(44832011)(38350700002)(6666004)(6916009)(478600001)(66476007)(66946007)(66556008);\n DIR:OUT; SFP:1102;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "=?utf-8?q?eY+LHzsGaWGP1IllPNyxiRJ8U8hB?=\n\t=?utf-8?q?nDRnbI/W92N7NxVIzPlW6ZjpTCSK0XN6pM15KhoxtXQzk4jC7ZY11D1hjshR+UKPr?=\n\t=?utf-8?q?POZ7TBDkBZfJ+7linFtzB3shZng2f9McKKm7sfnCnv5ERWSitR3YywEbsqjsEvXaV?=\n\t=?utf-8?q?tnNbnA/QfFfRScXs7ZTISePA1AsvuRcZ527P9jwmRWUbC8sgFHU/XFQEFgv4u6wCJ?=\n\t=?utf-8?q?LZJarVErkCVIhRF8cvvi3kndsfarzO6t6zbtGHF3s4BOkrt3lo80WyiC/w6zbcsmF?=\n\t=?utf-8?q?o0twDQfDFvFjdJUYXgYXKDn8QnMkaN03WVMIsgqm0YpnOcU4K3ymYJa73YHJpql33?=\n\t=?utf-8?q?Guon0NsEofdy/kSFZ0ZggNfSkXrmEnJkBY6n873KXQubT49ObOci2mdcEezV86DjN?=\n\t=?utf-8?q?/N7jT5OyhG0sZEBqnqNjMWLXfnfa4xuMWJw7aAd/azHUFDeAbIwrAqwrmIhJBWb64?=\n\t=?utf-8?q?pZdkmYIsJx0a3rnikZDzh0ge6iDxLNUXQZRmTXMECq2jEA0fWxtMjpJFVhVKv4UpL?=\n\t=?utf-8?q?skzcuUxi7uOCunFktBPBFCdbfqMR5H6d4vqFFPxzpL2zFCv6vUV9/Nud1pxo+7qky?=\n\t=?utf-8?q?8Dik+sE1NhMux1Wlfh05TMO6P5ULBpwksHvB9RzOecrzU+cFZ663RbGasWoeYltUt?=\n\t=?utf-8?q?g3b+tCGhzQycSX/f9CC4ueLx29lU+5wY9fb6QvVqgA89heFAL1SgEEek9Zt8XO3bC?=\n\t=?utf-8?q?MJ4fKZPRZoEX9DRFX01j34BfyktOh8rkDTTbH1pIFkfLJWmfAtjeQEe6Q1nnMxQlO?=\n\t=?utf-8?q?x7ZFJuB30t8AWlJTV8Lc+9Gm+sc6RMdtEQ93/dlb4lqFY7aa5aNy522QxF3Sc+RVp?=\n\t=?utf-8?q?i6NIQx6BiCEfbiAGsRCk9JGfyDBJrVGNgu1rggMgqbB4wgeBPE1aNMP/tHUx0UKIo?=\n\t=?utf-8?q?lLJhFEuKhOC2UgUVFP5B4p457QoSCdrwYL6z0uLoHiR0b5xizkd1mrjwIJKb+8kRD?=\n\t=?utf-8?q?EsYQb8T3LT0jIgp4Z9JnZfOAV0lRSuZuW0LtDn2/0r06mPy8WQYrysib/tuCsIsoy?=\n\t=?utf-8?q?DvPyveBU4LGJ4rZmFkgqWoZHl6zr4lXI36kjuFaa5LFaKIZRyxoU2sDktuaWGmFgN?=\n\t=?utf-8?q?+qQ5WvVIQJbOUGLZAlYrftKVvdHZt6FeUwaG5nRYPraVg1MXxMn5yLwifXQkJz3RL?=\n\t=?utf-8?q?rmV2k2tM96pigdi6DgktFDZf0iQwu7vWA5Lqr27W5WCgRrJ2cfhBmy+yjxyfDM5Wj?=\n\t=?utf-8?q?hkSbfQMO7fLDrAbjPXLnHB1MRVZu0j28kUxa8N4qDg4fKtQVsk3geGm1ZlK49apsC?=\n\t=?utf-8?q?KVT5b9FqciSSswCV+41yxsdil2Q72QoMFly1JljjY7BuRkUcWMIYOjr+lt5XyQO34?=\n\t=?utf-8?q?OG60cujR6okhPlakt1k5UvVmHUtqoPbid3IqNFPlWDYzkcGlQMniQDDa60+eRZjUi?=\n\t=?utf-8?q?0HqR6Fgjfd4pFFFCS/LWa9QH1K+DoPOBLs2zjbha3eq+GgkAGf+IX/H8J6TExBtrl?=\n\t=?utf-8?q?64f9oDgm3rlBKdwFEtHLSfedSIWAbyj8MThle1O8PwC47N5DZmpPP2ffbrXF407Br?=\n\t=?utf-8?q?rE311NkukWtYHOqEYuddstKS8TkIwBcBtg=3D=3D?=", "X-OriginatorOrg": "corigine.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n bba0f3b6-9c9a-44a8-0cc7-08dba492de7a", "X-MS-Exchange-CrossTenant-AuthSource": "SJ0PR13MB5545.namprd13.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "24 Aug 2023 11:11:31.1115 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "fe128f2c-073b-4c20-818e-7246a585940c", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n HDQ58JfDgS5fgVuOiQg6xgOCK2ZSIjnep2DAKMG80rXkTjNOwsjwsZX7p7xXUPSpy2F3JrYTvhjBG1HpIIOuauiPMCHnQG65Ke+ildvYF9w=", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "PH7PR13MB6116", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Sync the logic from kernel driver and remove the unneeded header\nfile include statements.\n\nSigned-off-by: Chaoyong He <chaoyong.he@corigine.com>\nReviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>\n---\n drivers/net/nfp/nfpcore/nfp6000_pcie.c | 211 +++++++++++++++++--------\n drivers/net/nfp/nfpcore/nfp_cpp.h | 9 ++\n 2 files changed, 150 insertions(+), 70 deletions(-)", "diff": "diff --git a/drivers/net/nfp/nfpcore/nfp6000_pcie.c b/drivers/net/nfp/nfpcore/nfp6000_pcie.c\nindex 45645e04f8..eb03571f99 100644\n--- a/drivers/net/nfp/nfpcore/nfp6000_pcie.c\n+++ b/drivers/net/nfp/nfpcore/nfp6000_pcie.c\n@@ -16,23 +16,8 @@\n \n #include \"nfp6000_pcie.h\"\n \n-#include <assert.h>\n-#include <stdio.h>\n-#include <stdlib.h>\n #include <unistd.h>\n-#include <stdint.h>\n-#include <stdbool.h>\n #include <fcntl.h>\n-#include <string.h>\n-#include <errno.h>\n-#include <dirent.h>\n-#include <libgen.h>\n-\n-#include <sys/mman.h>\n-#include <sys/file.h>\n-#include <sys/stat.h>\n-\n-#include <ethdev_pci.h>\n \n #include \"nfp_cpp.h\"\n #include \"nfp_logs.h\"\n@@ -43,8 +28,11 @@\n #define NFP_PCIE_BAR(_pf) (0x30000 + ((_pf) & 7) * 0xc0)\n \n #define NFP_PCIE_BAR_PCIE2CPP_ACTION_BASEADDRESS(_x) (((_x) & 0x1f) << 16)\n+#define NFP_PCIE_BAR_PCIE2CPP_ACTION_BASEADDRESS_OF(_x) (((_x) >> 16) & 0x1f)\n #define NFP_PCIE_BAR_PCIE2CPP_BASEADDRESS(_x) (((_x) & 0xffff) << 0)\n+#define NFP_PCIE_BAR_PCIE2CPP_BASEADDRESS_OF(_x) (((_x) >> 0) & 0xffff)\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT(_x) (((_x) & 0x3) << 27)\n+#define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_OF(_x) (((_x) >> 27) & 0x3)\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_32BIT 0\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_64BIT 1\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_0BYTE 3\n@@ -55,7 +43,9 @@\n #define NFP_PCIE_BAR_PCIE2CPP_MAPTYPE_TARGET 2\n #define NFP_PCIE_BAR_PCIE2CPP_MAPTYPE_GENERAL 3\n #define NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS(_x) (((_x) & 0xf) << 23)\n+#define NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS_OF(_x) (((_x) >> 23) & 0xf)\n #define NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS(_x) (((_x) & 0x3) << 21)\n+#define NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS_OF(_x) (((_x) >> 21) & 0x3)\n \n /*\n * Minimal size of the PCIe cfg memory we depend on being mapped,\n@@ -132,7 +122,7 @@ nfp_compute_bar(const struct nfp_bar *bar,\n \tuint32_t newcfg;\n \tuint32_t bitsize;\n \n-\tif (target >= 16)\n+\tif (target >= NFP_CPP_NUM_TARGETS)\n \t\treturn -EINVAL;\n \n \tswitch (width) {\n@@ -182,10 +172,6 @@ nfp_compute_bar(const struct nfp_bar *bar,\n \t\toffset &= mask;\n \t\tbitsize = 40 - 21;\n \t}\n-\n-\tif (bar->bitsize < bitsize)\n-\t\treturn -EINVAL;\n-\n \tnewcfg |= offset >> bitsize;\n \n \tif (bar_base != NULL)\n@@ -434,7 +420,7 @@ nfp6000_area_acquire(struct nfp_cpp_area *area)\n \n \t/* Must have been too big. Sub-allocate. */\n \tif (priv->bar->iomem == NULL)\n-\t\treturn (-ENOMEM);\n+\t\treturn -ENOMEM;\n \n \tpriv->iomem = priv->bar->iomem + priv->bar_offset;\n \n@@ -464,9 +450,9 @@ nfp6000_area_read(struct nfp_cpp_area *area,\n \t\tuint32_t offset,\n \t\tsize_t length)\n {\n+\tint ret;\n \tsize_t n;\n \tint width;\n-\tbool is_64;\n \tuint32_t *wrptr32 = address;\n \tuint64_t *wrptr64 = address;\n \tstruct nfp6000_area_priv *priv;\n@@ -484,47 +470,54 @@ nfp6000_area_read(struct nfp_cpp_area *area,\n \tif (width <= 0)\n \t\treturn -EINVAL;\n \n+\t/* MU reads via a PCIe2CPP BAR support 32bit (and other) lengths */\n+\tif (priv->target == (NFP_CPP_TARGET_MU & NFP_CPP_TARGET_ID_MASK) &&\n+\t\t\tpriv->action == NFP_CPP_ACTION_RW &&\n+\t\t\t(offset % sizeof(uint64_t) == 4 ||\n+\t\t\tlength % sizeof(uint64_t) == 4))\n+\t\twidth = TARGET_WIDTH_32;\n+\n \t/* Unaligned? Translate to an explicit access */\n \tif (((priv->offset + offset) & (width - 1)) != 0) {\n \t\tPMD_DRV_LOG(ERR, \"aread_read unaligned!!!\");\n \t\treturn -EINVAL;\n \t}\n \n-\tis_64 = width == TARGET_WIDTH_64;\n-\n-\t/* MU reads via a PCIe2CPP BAR supports 32bit (and other) lengths */\n-\tif (priv->target == (NFP_CPP_TARGET_ID_MASK & NFP_CPP_TARGET_MU) &&\n-\t\t\tpriv->action == NFP_CPP_ACTION_RW) {\n-\t\tis_64 = false;\n-\t}\n+\tif (priv->bar == NULL)\n+\t\treturn -EFAULT;\n \n-\tif (is_64) {\n-\t\tif (offset % sizeof(uint64_t) != 0 ||\n-\t\t\t\tlength % sizeof(uint64_t) != 0)\n-\t\t\treturn -EINVAL;\n-\t} else {\n+\tswitch (width) {\n+\tcase TARGET_WIDTH_32:\n \t\tif (offset % sizeof(uint32_t) != 0 ||\n \t\t\t\tlength % sizeof(uint32_t) != 0)\n \t\t\treturn -EINVAL;\n-\t}\n \n-\tif (priv->bar == NULL)\n-\t\treturn -EFAULT;\n+\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n+\t\t\t*wrptr32 = *rdptr32;\n+\t\t\twrptr32++;\n+\t\t\trdptr32++;\n+\t\t}\n+\n+\t\tret = n;\n+\t\tbreak;\n+\tcase TARGET_WIDTH_64:\n+\t\tif (offset % sizeof(uint64_t) != 0 ||\n+\t\t\t\tlength % sizeof(uint64_t) != 0)\n+\t\t\treturn -EINVAL;\n \n-\tif (is_64)\n \t\tfor (n = 0; n < length; n += sizeof(uint64_t)) {\n \t\t\t*wrptr64 = *rdptr64;\n \t\t\twrptr64++;\n \t\t\trdptr64++;\n \t\t}\n-\telse\n-\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n-\t\t\t*wrptr32 = *rdptr32;\n-\t\t\twrptr32++;\n-\t\t\trdptr32++;\n-\t\t}\n \n-\treturn n;\n+\t\tret = n;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn ret;\n }\n \n static int\n@@ -533,9 +526,9 @@ nfp6000_area_write(struct nfp_cpp_area *area,\n \t\tuint32_t offset,\n \t\tsize_t length)\n {\n+\tint ret;\n \tsize_t n;\n \tint width;\n-\tbool is_64;\n \tuint32_t *wrptr32;\n \tuint64_t *wrptr64;\n \tstruct nfp6000_area_priv *priv;\n@@ -553,47 +546,53 @@ nfp6000_area_write(struct nfp_cpp_area *area,\n \tif (width <= 0)\n \t\treturn -EINVAL;\n \n+\t/* MU reads via a PCIe2CPP BAR support 32bit (and other) lengths */\n+\tif (priv->target == (NFP_CPP_TARGET_MU & NFP_CPP_TARGET_ID_MASK) &&\n+\t\t\tpriv->action == NFP_CPP_ACTION_RW &&\n+\t\t\t(offset % sizeof(uint64_t) == 4 ||\n+\t\t\tlength % sizeof(uint64_t) == 4))\n+\t\twidth = TARGET_WIDTH_32;\n+\n \t/* Unaligned? Translate to an explicit access */\n \tif (((priv->offset + offset) & (width - 1)) != 0)\n \t\treturn -EINVAL;\n \n-\tis_64 = width == TARGET_WIDTH_64;\n-\n-\t/* MU writes via a PCIe2CPP BAR supports 32bit (and other) lengths */\n-\tif (priv->target == (NFP_CPP_TARGET_ID_MASK & NFP_CPP_TARGET_MU) &&\n-\t\t\tpriv->action == NFP_CPP_ACTION_RW)\n-\t\tis_64 = false;\n+\tif (priv->bar == NULL)\n+\t\treturn -EFAULT;\n \n-\tif (is_64) {\n-\t\tif (offset % sizeof(uint64_t) != 0 ||\n-\t\t\t\tlength % sizeof(uint64_t) != 0)\n-\t\t\treturn -EINVAL;\n-\t} else {\n+\tswitch (width) {\n+\tcase TARGET_WIDTH_32:\n \t\tif (offset % sizeof(uint32_t) != 0 ||\n \t\t\t\tlength % sizeof(uint32_t) != 0)\n \t\t\treturn -EINVAL;\n-\t}\n \n-\tif (priv->bar == NULL)\n-\t\treturn -EFAULT;\n+\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n+\t\t\t*wrptr32 = *rdptr32;\n+\t\t\twrptr32++;\n+\t\t\trdptr32++;\n+\t\t}\n+\n+\t\tret = n;\n+\t\tbreak;\n+\tcase TARGET_WIDTH_64:\n+\t\tif (offset % sizeof(uint64_t) != 0 ||\n+\t\t\t\tlength % sizeof(uint64_t) != 0)\n+\t\t\treturn -EINVAL;\n \n-\tif (is_64)\n \t\tfor (n = 0; n < length; n += sizeof(uint64_t)) {\n \t\t\t*wrptr64 = *rdptr64;\n \t\t\twrptr64++;\n \t\t\trdptr64++;\n \t\t}\n-\telse\n-\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n-\t\t\t*wrptr32 = *rdptr32;\n-\t\t\twrptr32++;\n-\t\t\trdptr32++;\n-\t\t}\n \n-\treturn n;\n-}\n+\t\tret = n;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n \n-#define PCI_DEVICES \"/sys/bus/pci/devices\"\n+\treturn ret;\n+}\n \n static int\n nfp_acquire_process_lock(struct nfp_pcie_user *desc)\n@@ -706,6 +705,74 @@ nfp6000_set_serial(struct rte_pci_device *dev,\n \treturn 0;\n }\n \n+static int\n+nfp6000_get_dsn(struct rte_pci_device *pci_dev,\n+\t\tuint64_t *dsn)\n+{\n+\toff_t pos;\n+\tsize_t len;\n+\tuint64_t tmp;\n+\n+\tpos = rte_pci_find_ext_capability(pci_dev, RTE_PCI_EXT_CAP_ID_DSN);\n+\tif (pos <= 0) {\n+\t\tPMD_DRV_LOG(ERR, \"PCI_EXT_CAP_ID_DSN not found\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tpos += 4;\n+\tlen = sizeof(tmp);\n+\n+\tif (rte_pci_read_config(pci_dev, &tmp, len, pos) < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"nfp get device serial number failed\");\n+\t\treturn -ENOENT;\n+\t}\n+\n+\t*dsn = tmp;\n+\n+\treturn 0;\n+}\n+\n+static int\n+nfp6000_get_interface(struct rte_pci_device *dev,\n+\t\tuint16_t *interface)\n+{\n+\tint ret;\n+\tuint64_t dsn;\n+\n+\tret = nfp6000_get_dsn(dev, &dsn);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\t*interface = dsn & 0xffff;\n+\n+\treturn 0;\n+}\n+\n+static int\n+nfp6000_get_serial(struct rte_pci_device *dev,\n+\t\tuint8_t *serial,\n+\t\tsize_t length)\n+{\n+\tint ret;\n+\tuint64_t dsn;\n+\n+\tif (length < NFP_SERIAL_LEN)\n+\t\treturn -ENOMEM;\n+\n+\tret = nfp6000_get_dsn(dev, &dsn);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\tserial[0] = (dsn >> 56) & 0xff;\n+\tserial[1] = (dsn >> 48) & 0xff;\n+\tserial[2] = (dsn >> 40) & 0xff;\n+\tserial[3] = (dsn >> 32) & 0xff;\n+\tserial[4] = (dsn >> 24) & 0xff;\n+\tserial[5] = (dsn >> 16) & 0xff;\n+\n+\treturn 0;\n+}\n+\n static int\n nfp6000_set_barsz(struct rte_pci_device *dev,\n \t\tstruct nfp_pcie_user *desc)\n@@ -789,6 +856,10 @@ static const struct nfp_cpp_operations nfp6000_pcie_ops = {\n \t.free = nfp6000_free,\n \n \t.area_priv_size = sizeof(struct nfp6000_area_priv),\n+\n+\t.get_interface = nfp6000_get_interface,\n+\t.get_serial = nfp6000_get_serial,\n+\n \t.area_init = nfp6000_area_init,\n \t.area_acquire = nfp6000_area_acquire,\n \t.area_release = nfp6000_area_release,\ndiff --git a/drivers/net/nfp/nfpcore/nfp_cpp.h b/drivers/net/nfp/nfpcore/nfp_cpp.h\nindex 34ed50ceca..0f36ba0b50 100644\n--- a/drivers/net/nfp/nfpcore/nfp_cpp.h\n+++ b/drivers/net/nfp/nfpcore/nfp_cpp.h\n@@ -16,6 +16,8 @@ struct nfp_cpp_area;\n \n #define NFP_SERIAL_LEN 6\n \n+#define NFP_CPP_NUM_TARGETS 16\n+\n /*\n * NFP CPP operations structure\n */\n@@ -33,6 +35,13 @@ struct nfp_cpp_operations {\n \t */\n \tvoid (*free)(struct nfp_cpp *cpp);\n \n+\tint (*get_interface)(struct rte_pci_device *dev,\n+\t\t\tuint16_t *interface);\n+\n+\tint (*get_serial)(struct rte_pci_device *dev,\n+\t\t\tuint8_t *serial,\n+\t\t\tsize_t length);\n+\n \t/*\n \t * Initialize a new NFP CPP area\n \t * NOTE: This is _not_ serialized\n", "prefixes": [ "25/27" ] }