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{
    "id": 131486,
    "url": "http://patchwork.dpdk.org/api/patches/131486/?format=api",
    "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230915091551.1459606-12-chaoyong.he@corigine.com/",
    "project": {
        "id": 1,
        "url": "http://patchwork.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230915091551.1459606-12-chaoyong.he@corigine.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230915091551.1459606-12-chaoyong.he@corigine.com",
    "date": "2023-09-15T09:15:35",
    "name": "[v3,11/27] net/nfp: rename some parameter and variable",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "14ddc6268d02e9f0f388f00fbd323e3625c6e983",
    "submitter": {
        "id": 2554,
        "url": "http://patchwork.dpdk.org/api/people/2554/?format=api",
        "name": "Chaoyong He",
        "email": "chaoyong.he@corigine.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patchwork.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230915091551.1459606-12-chaoyong.he@corigine.com/mbox/",
    "series": [
        {
            "id": 29520,
            "url": "http://patchwork.dpdk.org/api/series/29520/?format=api",
            "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29520",
            "date": "2023-09-15T09:15:24",
            "name": "refact the nfpcore module",
            "version": 3,
            "mbox": "http://patchwork.dpdk.org/series/29520/mbox/"
        }
    ],
    "comments": "http://patchwork.dpdk.org/api/patches/131486/comments/",
    "check": "success",
    "checks": "http://patchwork.dpdk.org/api/patches/131486/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Chaoyong He <chaoyong.he@corigine.com>",
        "To": "dev@dpdk.org",
        "Cc": "oss-drivers@corigine.com, Chaoyong He <chaoyong.he@corigine.com>,\n\t=?utf-8?q?Niklas_S=C3=B6derlund?= <niklas.soderlund@corigine.com>",
        "Subject": "[PATCH v3 11/27] net/nfp: rename some parameter and variable",
        "Date": "Fri, 15 Sep 2023 17:15:35 +0800",
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    "content": "Rename some parameter and variable to make the logic easier to\nunderstand.\n\nSigned-off-by: Chaoyong He <chaoyong.he@corigine.com>\nReviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>\n---\n drivers/net/nfp/nfpcore/nfp_cpp.h          | 10 ++---\n drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 42 ++++++++---------\n drivers/net/nfp/nfpcore/nfp_cppcore.c      | 52 +++++++++++-----------\n drivers/net/nfp/nfpcore/nfp_mip.h          |  2 +-\n drivers/net/nfp/nfpcore/nfp_mutex.c        |  6 +--\n drivers/net/nfp/nfpcore/nfp_nffw.c         | 20 ++++-----\n drivers/net/nfp/nfpcore/nfp_nffw.h         |  4 +-\n drivers/net/nfp/nfpcore/nfp_nsp.h          |  8 ++--\n drivers/net/nfp/nfpcore/nfp_nsp_cmds.c     |  2 +-\n drivers/net/nfp/nfpcore/nfp_nsp_eth.c      | 20 ++++-----\n 10 files changed, 83 insertions(+), 83 deletions(-)",
    "diff": "diff --git a/drivers/net/nfp/nfpcore/nfp_cpp.h b/drivers/net/nfp/nfpcore/nfp_cpp.h\nindex ceb4d56a08..be7ae1d919 100644\n--- a/drivers/net/nfp/nfpcore/nfp_cpp.h\n+++ b/drivers/net/nfp/nfpcore/nfp_cpp.h\n@@ -247,7 +247,7 @@ void *nfp_cpp_priv(struct nfp_cpp *cpp);\n \n void *nfp_cpp_area_priv(struct nfp_cpp_area *cpp_area);\n \n-uint32_t __nfp_cpp_model_autodetect(struct nfp_cpp *cpp, uint32_t *model);\n+uint32_t nfp_cpp_model_autodetect(struct nfp_cpp *cpp, uint32_t *model);\n \n /* NFP CPP core interface for CPP clients */\n struct nfp_cpp *nfp_cpp_from_device_name(struct rte_pci_device *dev,\n@@ -381,10 +381,10 @@ uint8_t *nfp_cpp_map_area(struct nfp_cpp *cpp, uint32_t cpp_id,\n \t\tuint64_t addr, uint32_t size, struct nfp_cpp_area **area);\n \n int nfp_cpp_area_read(struct nfp_cpp_area *area, uint32_t offset,\n-\t\tvoid *buffer, size_t length);\n+\t\tvoid *address, size_t length);\n \n int nfp_cpp_area_write(struct nfp_cpp_area *area, uint32_t offset,\n-\t\tconst void *buffer, size_t length);\n+\t\tconst void *address, size_t length);\n \n void *nfp_cpp_area_iomem(struct nfp_cpp_area *area);\n \n@@ -393,10 +393,10 @@ struct nfp_cpp *nfp_cpp_area_cpp(struct nfp_cpp_area *cpp_area);\n const char *nfp_cpp_area_name(struct nfp_cpp_area *cpp_area);\n \n int nfp_cpp_read(struct nfp_cpp *cpp, uint32_t cpp_id,\n-\t\tuint64_t address, void *kernel_vaddr, size_t length);\n+\t\tuint64_t address, void *buf, size_t length);\n \n int nfp_cpp_write(struct nfp_cpp *cpp, uint32_t cpp_id,\n-\t\tuint64_t address, const void *kernel_vaddr, size_t length);\n+\t\tuint64_t address, const void *buf, size_t length);\n \n int nfp_cpp_area_readl(struct nfp_cpp_area *area, uint32_t offset,\n \t\tuint32_t *value);\ndiff --git a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c\nindex 28a6278497..db15411eb2 100644\n--- a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c\n+++ b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c\n@@ -118,9 +118,9 @@ static int\n nfp_compute_bar(const struct nfp_bar *bar,\n \t\tuint32_t *bar_config,\n \t\tuint64_t *bar_base,\n-\t\tint tgt,\n-\t\tint act,\n-\t\tint tok,\n+\t\tint target,\n+\t\tint action,\n+\t\tint token,\n \t\tuint64_t offset,\n \t\tsize_t size,\n \t\tint width)\n@@ -129,7 +129,7 @@ nfp_compute_bar(const struct nfp_bar *bar,\n \tuint32_t newcfg;\n \tuint32_t bitsize;\n \n-\tif (tgt >= 16)\n+\tif (target >= 16)\n \t\treturn -EINVAL;\n \n \tswitch (width) {\n@@ -149,15 +149,15 @@ nfp_compute_bar(const struct nfp_bar *bar,\n \t\treturn -EINVAL;\n \t}\n \n-\tif (act != NFP_CPP_ACTION_RW && act != 0) {\n+\tif (action != NFP_CPP_ACTION_RW && action != 0) {\n \t\t/* Fixed CPP mapping with specific action */\n \t\tmask = ~(NFP_PCIE_P2C_FIXED_SIZE(bar) - 1);\n \n \t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_MAPTYPE\n \t\t\t\t(NFP_PCIE_BAR_PCIE2CPP_MAPTYPE_FIXED);\n-\t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS(tgt);\n-\t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_ACTION_BASEADDRESS(act);\n-\t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS(tok);\n+\t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS(target);\n+\t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_ACTION_BASEADDRESS(action);\n+\t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS(token);\n \n \t\tif ((offset & mask) != ((offset + size - 1) & mask))\n \t\t\treturn -EINVAL;\n@@ -170,8 +170,8 @@ nfp_compute_bar(const struct nfp_bar *bar,\n \t\t/* Bulk mapping */\n \t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_MAPTYPE\n \t\t\t\t(NFP_PCIE_BAR_PCIE2CPP_MAPTYPE_BULK);\n-\t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS(tgt);\n-\t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS(tok);\n+\t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS(target);\n+\t\tnewcfg |= NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS(token);\n \n \t\tif ((offset & mask) != ((offset + size - 1) & mask))\n \t\t\treturn -EINVAL;\n@@ -221,9 +221,9 @@ nfp_bar_write(struct nfp_pcie_user *nfp,\n static int\n nfp_reconfigure_bar(struct nfp_pcie_user *nfp,\n \t\tstruct nfp_bar *bar,\n-\t\tint tgt,\n-\t\tint act,\n-\t\tint tok,\n+\t\tint target,\n+\t\tint action,\n+\t\tint token,\n \t\tuint64_t offset,\n \t\tsize_t size,\n \t\tint width)\n@@ -232,8 +232,8 @@ nfp_reconfigure_bar(struct nfp_pcie_user *nfp,\n \tuint32_t newcfg;\n \tuint64_t newbase;\n \n-\terr = nfp_compute_bar(bar, &newcfg, &newbase, tgt, act, tok, offset,\n-\t\t\tsize, width);\n+\terr = nfp_compute_bar(bar, &newcfg, &newbase, target, action,\n+\t\t\ttoken, offset, size, width);\n \tif (err != 0)\n \t\treturn err;\n \n@@ -457,15 +457,15 @@ nfp6000_area_iomem(struct nfp_cpp_area *area)\n \n static int\n nfp6000_area_read(struct nfp_cpp_area *area,\n-\t\tvoid *kernel_vaddr,\n+\t\tvoid *address,\n \t\tuint32_t offset,\n \t\tsize_t length)\n {\n \tsize_t n;\n \tint width;\n \tbool is_64;\n-\tuint32_t *wrptr32 = kernel_vaddr;\n-\tuint64_t *wrptr64 = kernel_vaddr;\n+\tuint32_t *wrptr32 = address;\n+\tuint64_t *wrptr64 = address;\n \tstruct nfp6000_area_priv *priv;\n \tconst volatile uint32_t *rdptr32;\n \tconst volatile uint64_t *rdptr64;\n@@ -526,7 +526,7 @@ nfp6000_area_read(struct nfp_cpp_area *area,\n \n static int\n nfp6000_area_write(struct nfp_cpp_area *area,\n-\t\tconst void *kernel_vaddr,\n+\t\tconst void *address,\n \t\tuint32_t offset,\n \t\tsize_t length)\n {\n@@ -536,8 +536,8 @@ nfp6000_area_write(struct nfp_cpp_area *area,\n \tuint32_t *wrptr32;\n \tuint64_t *wrptr64;\n \tstruct nfp6000_area_priv *priv;\n-\tconst uint32_t *rdptr32 = kernel_vaddr;\n-\tconst uint64_t *rdptr64 = kernel_vaddr;\n+\tconst uint32_t *rdptr32 = address;\n+\tconst uint64_t *rdptr64 = address;\n \n \tpriv = nfp_cpp_area_priv(area);\n \twrptr64 = (uint64_t *)(priv->iomem + offset);\ndiff --git a/drivers/net/nfp/nfpcore/nfp_cppcore.c b/drivers/net/nfp/nfpcore/nfp_cppcore.c\nindex bb6eab36e2..0f68c5d667 100644\n--- a/drivers/net/nfp/nfpcore/nfp_cppcore.c\n+++ b/drivers/net/nfp/nfpcore/nfp_cppcore.c\n@@ -90,7 +90,7 @@ nfp_cpp_model(struct nfp_cpp *cpp)\n \tif (cpp == NULL)\n \t\treturn NFP_CPP_MODEL_INVALID;\n \n-\terr = __nfp_cpp_model_autodetect(cpp, &model);\n+\terr = nfp_cpp_model_autodetect(cpp, &model);\n \n \tif (err < 0)\n \t\treturn err;\n@@ -484,7 +484,7 @@ nfp_cpp_area_iomem(struct nfp_cpp_area *area)\n  *   CPP area handle\n  * @param offset\n  *   Offset into CPP area\n- * @param kernel_vaddr\n+ * @param address\n  *   Address to put data into\n  * @param length\n  *   Number of bytes to read\n@@ -498,13 +498,13 @@ nfp_cpp_area_iomem(struct nfp_cpp_area *area)\n int\n nfp_cpp_area_read(struct nfp_cpp_area *area,\n \t\tuint32_t offset,\n-\t\tvoid *kernel_vaddr,\n+\t\tvoid *address,\n \t\tsize_t length)\n {\n \tif ((offset + length) > area->size)\n \t\treturn -EFAULT;\n \n-\treturn area->cpp->op->area_read(area, kernel_vaddr, offset, length);\n+\treturn area->cpp->op->area_read(area, address, offset, length);\n }\n \n /**\n@@ -514,7 +514,7 @@ nfp_cpp_area_read(struct nfp_cpp_area *area,\n  *   CPP area handle\n  * @param offset\n  *   Offset into CPP area\n- * @param kernel_vaddr\n+ * @param address\n  *   Address to put data into\n  * @param length\n  *   Number of bytes to read\n@@ -528,13 +528,13 @@ nfp_cpp_area_read(struct nfp_cpp_area *area,\n int\n nfp_cpp_area_write(struct nfp_cpp_area *area,\n \t\tuint32_t offset,\n-\t\tconst void *kernel_vaddr,\n+\t\tconst void *address,\n \t\tsize_t length)\n {\n \tif ((offset + length) > area->size)\n \t\treturn -EFAULT;\n \n-\treturn area->cpp->op->area_write(area, kernel_vaddr, offset, length);\n+\treturn area->cpp->op->area_write(area, address, offset, length);\n }\n \n /*\n@@ -880,14 +880,14 @@ nfp_cpp_alloc(struct rte_pci_device *dev,\n \t}\n \n \tif (NFP_CPP_MODEL_IS_6000(nfp_cpp_model(cpp))) {\n-\t\tuint32_t xpbaddr;\n-\t\tsize_t tgt;\n+\t\tuint32_t xpb_addr;\n+\t\tsize_t target;\n \n-\t\tfor (tgt = 0; tgt < RTE_DIM(cpp->imb_cat_table); tgt++) {\n+\t\tfor (target = 0; target < RTE_DIM(cpp->imb_cat_table); target++) {\n \t\t\t/* Hardcoded XPB IMB Base, island 0 */\n-\t\t\txpbaddr = 0x000a0000 + (tgt * 4);\n-\t\t\terr = nfp_xpb_readl(cpp, xpbaddr,\n-\t\t\t\t\t(uint32_t *)&cpp->imb_cat_table[tgt]);\n+\t\t\txpb_addr = 0x000a0000 + (target * 4);\n+\t\t\terr = nfp_xpb_readl(cpp, xpb_addr,\n+\t\t\t\t\t(uint32_t *)&cpp->imb_cat_table[target]);\n \t\t\tif (err < 0) {\n \t\t\t\trte_free(cpp);\n \t\t\t\treturn NULL;\n@@ -950,9 +950,9 @@ nfp_cpp_from_device_name(struct rte_pci_device *dev,\n  *   CPP handle\n  * @param destination\n  *   CPP id\n- * @param address\n+ * @param offset\n  *   Offset into CPP target\n- * @param kernel_vaddr\n+ * @param address\n  *   Buffer for result\n  * @param length\n  *   Number of bytes to read\n@@ -963,20 +963,20 @@ nfp_cpp_from_device_name(struct rte_pci_device *dev,\n int\n nfp_cpp_read(struct nfp_cpp *cpp,\n \t\tuint32_t destination,\n-\t\tuint64_t address,\n-\t\tvoid *kernel_vaddr,\n+\t\tuint64_t offset,\n+\t\tvoid *address,\n \t\tsize_t length)\n {\n \tint err;\n \tstruct nfp_cpp_area *area;\n \n-\tarea = nfp_cpp_area_alloc_acquire(cpp, destination, address, length);\n+\tarea = nfp_cpp_area_alloc_acquire(cpp, destination, offset, length);\n \tif (area == NULL) {\n \t\tPMD_DRV_LOG(ERR, \"Area allocation/acquire failed for read\");\n \t\treturn -1;\n \t}\n \n-\terr = nfp_cpp_area_read(area, 0, kernel_vaddr, length);\n+\terr = nfp_cpp_area_read(area, 0, address, length);\n \n \tnfp_cpp_area_release_free(area);\n \treturn err;\n@@ -989,9 +989,9 @@ nfp_cpp_read(struct nfp_cpp *cpp,\n  *   CPP handle\n  * @param destination\n  *   CPP id\n- * @param address\n+ * @param offset\n  *   Offset into CPP target\n- * @param kernel_vaddr\n+ * @param address\n  *   Buffer to read from\n  * @param length\n  *   Number of bytes to write\n@@ -1002,20 +1002,20 @@ nfp_cpp_read(struct nfp_cpp *cpp,\n int\n nfp_cpp_write(struct nfp_cpp *cpp,\n \t\tuint32_t destination,\n-\t\tuint64_t address,\n-\t\tconst void *kernel_vaddr,\n+\t\tuint64_t offset,\n+\t\tconst void *address,\n \t\tsize_t length)\n {\n \tint err;\n \tstruct nfp_cpp_area *area;\n \n-\tarea = nfp_cpp_area_alloc_acquire(cpp, destination, address, length);\n+\tarea = nfp_cpp_area_alloc_acquire(cpp, destination, offset, length);\n \tif (area == NULL) {\n \t\tPMD_DRV_LOG(ERR, \"Area allocation/acquire failed for write\");\n \t\treturn -1;\n \t}\n \n-\terr = nfp_cpp_area_write(area, 0, kernel_vaddr, length);\n+\terr = nfp_cpp_area_write(area, 0, address, length);\n \n \tnfp_cpp_area_release_free(area);\n \treturn err;\n@@ -1026,7 +1026,7 @@ nfp_cpp_write(struct nfp_cpp *cpp,\n  * as those are model-specific\n  */\n uint32_t\n-__nfp_cpp_model_autodetect(struct nfp_cpp *cpp,\n+nfp_cpp_model_autodetect(struct nfp_cpp *cpp,\n \t\tuint32_t *model)\n {\n \tint err;\ndiff --git a/drivers/net/nfp/nfpcore/nfp_mip.h b/drivers/net/nfp/nfpcore/nfp_mip.h\nindex 371c635b97..7fa09ee575 100644\n--- a/drivers/net/nfp/nfpcore/nfp_mip.h\n+++ b/drivers/net/nfp/nfpcore/nfp_mip.h\n@@ -17,6 +17,6 @@ const char *nfp_mip_name(const struct nfp_mip *mip);\n void nfp_mip_symtab(const struct nfp_mip *mip, uint32_t *addr, uint32_t *size);\n void nfp_mip_strtab(const struct nfp_mip *mip, uint32_t *addr, uint32_t *size);\n int nfp_nffw_info_mip_first(struct nfp_nffw_info *state, uint32_t *cpp_id,\n-\t\tuint64_t *off);\n+\t\tuint64_t *offset);\n \n #endif /* __NFP_MIP_H__ */\ndiff --git a/drivers/net/nfp/nfpcore/nfp_mutex.c b/drivers/net/nfp/nfpcore/nfp_mutex.c\nindex 61c491e07e..85c33502ca 100644\n--- a/drivers/net/nfp/nfpcore/nfp_mutex.c\n+++ b/drivers/net/nfp/nfpcore/nfp_mutex.c\n@@ -35,7 +35,7 @@ struct nfp_cpp_mutex {\n };\n \n static int\n-_nfp_cpp_mutex_validate(uint32_t model,\n+nfp_cpp_mutex_validate(uint32_t model,\n \t\tint *target,\n \t\tuint64_t address)\n {\n@@ -87,7 +87,7 @@ nfp_cpp_mutex_init(struct nfp_cpp *cpp,\n \tuint32_t model = nfp_cpp_model(cpp);\n \tuint32_t muw = NFP_CPP_ID(target, 4, 0);    /* atomic_write */\n \n-\terr = _nfp_cpp_mutex_validate(model, &target, address);\n+\terr = nfp_cpp_mutex_validate(model, &target, address);\n \tif (err < 0)\n \t\treturn err;\n \n@@ -152,7 +152,7 @@ nfp_cpp_mutex_alloc(struct nfp_cpp *cpp,\n \t\treturn NULL;\n \t}\n \n-\terr = _nfp_cpp_mutex_validate(model, &target, address);\n+\terr = nfp_cpp_mutex_validate(model, &target, address);\n \tif (err < 0)\n \t\treturn NULL;\n \ndiff --git a/drivers/net/nfp/nfpcore/nfp_nffw.c b/drivers/net/nfp/nfpcore/nfp_nffw.c\nindex 0ae7d9328c..7811363796 100644\n--- a/drivers/net/nfp/nfpcore/nfp_nffw.c\n+++ b/drivers/net/nfp/nfpcore/nfp_nffw.c\n@@ -31,11 +31,11 @@ nffw_res_flg_init_get(const struct nfp_nffw_info_data *res)\n \treturn (res->flags[0] >> 0) & 1;\n }\n \n-/* loaded = loaded__mu_da__mip_off_hi<31:31> */\n+/* loaded = loaded_mu_da_mip_off_hi<31:31> */\n static uint32_t\n nffw_fwinfo_loaded_get(const struct nffw_fwinfo *fi)\n {\n-\treturn (fi->loaded__mu_da__mip_off_hi >> 31) & 1;\n+\treturn (fi->loaded_mu_da_mip_off_hi >> 31) & 1;\n }\n \n /* mip_cppid = mip_cppid */\n@@ -45,18 +45,18 @@ nffw_fwinfo_mip_cppid_get(const struct nffw_fwinfo *fi)\n \treturn fi->mip_cppid;\n }\n \n-/* loaded = loaded__mu_da__mip_off_hi<8:8> */\n+/* loaded = loaded_mu_da_mip_off_hi<8:8> */\n static uint32_t\n nffw_fwinfo_mip_mu_da_get(const struct nffw_fwinfo *fi)\n {\n-\treturn (fi->loaded__mu_da__mip_off_hi >> 8) & 1;\n+\treturn (fi->loaded_mu_da_mip_off_hi >> 8) & 1;\n }\n \n-/* mip_offset = (loaded__mu_da__mip_off_hi<7:0> << 32) | mip_offset_lo */\n+/* mip_offset = (loaded_mu_da_mip_off_hi<7:0> << 32) | mip_offset_lo */\n static uint64_t\n nffw_fwinfo_mip_offset_get(const struct nffw_fwinfo *fi)\n {\n-\tuint64_t mip_off_hi = fi->loaded__mu_da__mip_off_hi;\n+\tuint64_t mip_off_hi = fi->loaded_mu_da_mip_off_hi;\n \n \treturn (mip_off_hi & 0xFF) << 32 | fi->mip_offset_lo;\n }\n@@ -225,7 +225,7 @@ nfp_nffw_info_fwid_first(struct nfp_nffw_info *state)\n int\n nfp_nffw_info_mip_first(struct nfp_nffw_info *state,\n \t\tuint32_t *cpp_id,\n-\t\tuint64_t *off)\n+\t\tuint64_t *offset)\n {\n \tstruct nffw_fwinfo *fwinfo;\n \n@@ -234,7 +234,7 @@ nfp_nffw_info_mip_first(struct nfp_nffw_info *state,\n \t\treturn -EINVAL;\n \n \t*cpp_id = nffw_fwinfo_mip_cppid_get(fwinfo);\n-\t*off = nffw_fwinfo_mip_offset_get(fwinfo);\n+\t*offset = nffw_fwinfo_mip_offset_get(fwinfo);\n \n \tif (nffw_fwinfo_mip_mu_da_get(fwinfo) != 0) {\n \t\tint locality_off;\n@@ -246,8 +246,8 @@ nfp_nffw_info_mip_first(struct nfp_nffw_info *state,\n \t\tif (locality_off < 0)\n \t\t\treturn locality_off;\n \n-\t\t*off &= ~(NFP_MU_ADDR_ACCESS_TYPE_MASK << locality_off);\n-\t\t*off |= NFP_MU_ADDR_ACCESS_TYPE_DIRECT << locality_off;\n+\t\t*offset &= ~(NFP_MU_ADDR_ACCESS_TYPE_MASK << locality_off);\n+\t\t*offset |= NFP_MU_ADDR_ACCESS_TYPE_DIRECT << locality_off;\n \t}\n \n \treturn 0;\ndiff --git a/drivers/net/nfp/nfpcore/nfp_nffw.h b/drivers/net/nfp/nfpcore/nfp_nffw.h\nindex f84be463c4..52e25c090a 100644\n--- a/drivers/net/nfp/nfpcore/nfp_nffw.h\n+++ b/drivers/net/nfp/nfpcore/nfp_nffw.h\n@@ -38,11 +38,11 @@\n \n /* nfp.nffw meinfo */\n struct nffw_meinfo {\n-\tuint32_t ctxmask__fwid__meid;\n+\tuint32_t ctxmask_fwid_meid;\n };\n \n struct nffw_fwinfo {\n-\tuint32_t loaded__mu_da__mip_off_hi;\n+\tuint32_t loaded_mu_da_mip_off_hi;\n \tuint32_t mip_cppid; /* 0 means no MIP */\n \tuint32_t mip_offset_lo;\n };\ndiff --git a/drivers/net/nfp/nfpcore/nfp_nsp.h b/drivers/net/nfp/nfpcore/nfp_nsp.h\nindex 7bf584dcd0..705574b900 100644\n--- a/drivers/net/nfp/nfpcore/nfp_nsp.h\n+++ b/drivers/net/nfp/nfpcore/nfp_nsp.h\n@@ -231,9 +231,9 @@ struct nfp_nsp *nfp_eth_config_start(struct nfp_cpp *cpp, uint32_t idx);\n int nfp_eth_config_commit_end(struct nfp_nsp *nsp);\n void nfp_eth_config_cleanup_end(struct nfp_nsp *nsp);\n \n-int __nfp_eth_set_aneg(struct nfp_nsp *nsp, enum nfp_eth_aneg mode);\n-int __nfp_eth_set_speed(struct nfp_nsp *nsp, uint32_t speed);\n-int __nfp_eth_set_split(struct nfp_nsp *nsp, uint32_t lanes);\n+int nfp_eth_set_aneg(struct nfp_nsp *nsp, enum nfp_eth_aneg mode);\n+int nfp_eth_set_speed(struct nfp_nsp *nsp, uint32_t speed);\n+int nfp_eth_set_split(struct nfp_nsp *nsp, uint32_t lanes);\n \n /* NSP static information */\n struct nfp_nsp_identify {\n@@ -248,7 +248,7 @@ struct nfp_nsp_identify {\n \tuint64_t sensor_mask;  /**< Mask of present sensors available on NIC */\n };\n \n-struct nfp_nsp_identify *__nfp_nsp_identify(struct nfp_nsp *nsp);\n+struct nfp_nsp_identify *nfp_nsp_identify(struct nfp_nsp *nsp);\n \n enum nfp_nsp_sensor_id {\n \tNFP_SENSOR_CHIP_TEMPERATURE,\ndiff --git a/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c b/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c\nindex 08f12f862c..429f639fa2 100644\n--- a/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c\n+++ b/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c\n@@ -24,7 +24,7 @@ struct nsp_identify {\n };\n \n struct nfp_nsp_identify *\n-__nfp_nsp_identify(struct nfp_nsp *nsp)\n+nfp_nsp_identify(struct nfp_nsp *nsp)\n {\n \tint ret;\n \tstruct nsp_identify *ni;\ndiff --git a/drivers/net/nfp/nfpcore/nfp_nsp_eth.c b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c\nindex c01802a516..fba7a1dc12 100644\n--- a/drivers/net/nfp/nfpcore/nfp_nsp_eth.c\n+++ b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c\n@@ -242,7 +242,7 @@ nfp_eth_calc_port_type(struct nfp_eth_table_port *entry)\n }\n \n static struct nfp_eth_table *\n-__nfp_eth_read_ports(struct nfp_nsp *nsp)\n+nfp_eth_read_ports_real(struct nfp_nsp *nsp)\n {\n \tint ret;\n \tuint32_t i;\n@@ -333,7 +333,7 @@ nfp_eth_read_ports(struct nfp_cpp *cpp)\n \tif (nsp == NULL)\n \t\treturn NULL;\n \n-\tret = __nfp_eth_read_ports(nsp);\n+\tret = nfp_eth_read_ports_real(nsp);\n \tnfp_nsp_close(nsp);\n \n \treturn ret;\n@@ -481,7 +481,7 @@ nfp_eth_set_mod_enable(struct nfp_cpp *cpp,\n int\n nfp_eth_set_configured(struct nfp_cpp *cpp,\n \t\tuint32_t idx,\n-\t\tint configed)\n+\t\tint configured)\n {\n \tuint64_t reg;\n \tstruct nfp_nsp *nsp;\n@@ -504,10 +504,10 @@ nfp_eth_set_configured(struct nfp_cpp *cpp,\n \n \t/* Check if we are already in requested state */\n \treg = rte_le_to_cpu_64(entries[idx].state);\n-\tif (configed != (int)FIELD_GET(NSP_ETH_STATE_CONFIGURED, reg)) {\n+\tif (configured != (int)FIELD_GET(NSP_ETH_STATE_CONFIGURED, reg)) {\n \t\treg = rte_le_to_cpu_64(entries[idx].control);\n \t\treg &= ~NSP_ETH_CTRL_CONFIGURED;\n-\t\treg |= FIELD_PREP(NSP_ETH_CTRL_CONFIGURED, configed);\n+\t\treg |= FIELD_PREP(NSP_ETH_CTRL_CONFIGURED, configured);\n \t\tentries[idx].control = rte_cpu_to_le_64(reg);\n \n \t\tnfp_nsp_config_set_modified(nsp, 1);\n@@ -573,7 +573,7 @@ nfp_eth_set_bit_config(struct nfp_nsp *nsp,\n  *   0 or -ERRNO\n  */\n int\n-__nfp_eth_set_aneg(struct nfp_nsp *nsp,\n+nfp_eth_set_aneg(struct nfp_nsp *nsp,\n \t\tenum nfp_eth_aneg mode)\n {\n \treturn NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE,\n@@ -593,7 +593,7 @@ __nfp_eth_set_aneg(struct nfp_nsp *nsp,\n  *   0 or -ERRNO\n  */\n static int\n-__nfp_eth_set_fec(struct nfp_nsp *nsp,\n+nfp_eth_set_fec_real(struct nfp_nsp *nsp,\n \t\tenum nfp_eth_fec mode)\n {\n \treturn NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE,\n@@ -627,7 +627,7 @@ nfp_eth_set_fec(struct nfp_cpp *cpp,\n \tif (nsp == NULL)\n \t\treturn -EIO;\n \n-\terr = __nfp_eth_set_fec(nsp, mode);\n+\terr = nfp_eth_set_fec_real(nsp, mode);\n \tif (err != 0) {\n \t\tnfp_eth_config_cleanup_end(nsp);\n \t\treturn err;\n@@ -651,7 +651,7 @@ nfp_eth_set_fec(struct nfp_cpp *cpp,\n  *   0 or -ERRNO\n  */\n int\n-__nfp_eth_set_speed(struct nfp_nsp *nsp,\n+nfp_eth_set_speed(struct nfp_nsp *nsp,\n \t\tuint32_t speed)\n {\n \tenum nfp_eth_rate rate;\n@@ -679,7 +679,7 @@ __nfp_eth_set_speed(struct nfp_nsp *nsp,\n  *   0 or -ERRNO\n  */\n int\n-__nfp_eth_set_split(struct nfp_nsp *nsp,\n+nfp_eth_set_split(struct nfp_nsp *nsp,\n \t\tuint32_t lanes)\n {\n \treturn NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_PORT,\n",
    "prefixes": [
        "v3",
        "11/27"
    ]
}