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GET /api/patches/131500/?format=api
{ "id": 131500, "url": "http://patchwork.dpdk.org/api/patches/131500/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/patch/20230915091551.1459606-26-chaoyong.he@corigine.com/", "project": { "id": 1, "url": "http://patchwork.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230915091551.1459606-26-chaoyong.he@corigine.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230915091551.1459606-26-chaoyong.he@corigine.com", "date": "2023-09-15T09:15:49", "name": "[v3,25/27] net/nfp: refact the PCIe module", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "1e22d98e39ad3dc9e9b08224e2a19cd3c56637a3", "submitter": { "id": 2554, "url": "http://patchwork.dpdk.org/api/people/2554/?format=api", "name": "Chaoyong He", "email": "chaoyong.he@corigine.com" }, "delegate": { "id": 319, "url": "http://patchwork.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patchwork.dpdk.org/project/dpdk/patch/20230915091551.1459606-26-chaoyong.he@corigine.com/mbox/", "series": [ { "id": 29520, "url": "http://patchwork.dpdk.org/api/series/29520/?format=api", "web_url": "http://patchwork.dpdk.org/project/dpdk/list/?series=29520", "date": "2023-09-15T09:15:24", "name": "refact the nfpcore module", "version": 3, "mbox": "http://patchwork.dpdk.org/series/29520/mbox/" } ], "comments": "http://patchwork.dpdk.org/api/patches/131500/comments/", "check": "success", "checks": "http://patchwork.dpdk.org/api/patches/131500/checks/", "tags": {}, "related": [], "headers": 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"Authentication-Results": "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=corigine.com;", "From": "Chaoyong He <chaoyong.he@corigine.com>", "To": "dev@dpdk.org", "Cc": "oss-drivers@corigine.com, Chaoyong He <chaoyong.he@corigine.com>,\n\t=?utf-8?q?Niklas_S=C3=B6derlund?= <niklas.soderlund@corigine.com>", "Subject": "[PATCH v3 25/27] net/nfp: refact the PCIe module", "Date": "Fri, 15 Sep 2023 17:15:49 +0800", "Message-Id": "<20230915091551.1459606-26-chaoyong.he@corigine.com>", "X-Mailer": "git-send-email 2.39.1", "In-Reply-To": "<20230915091551.1459606-1-chaoyong.he@corigine.com>", "References": "<20230830021457.2064750-1-chaoyong.he@corigine.com>\n <20230915091551.1459606-1-chaoyong.he@corigine.com>", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-ClientProxiedBy": "PH7PR10CA0017.namprd10.prod.outlook.com\n (2603:10b6:510:23d::10) To SJ0PR13MB5545.namprd13.prod.outlook.com\n (2603:10b6:a03:424::5)", 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"=?utf-8?q?x8XZmmM9dby2NQlmWD3SA+Z4Upb3?=\n\t=?utf-8?q?2H5jzYzNI/AyvNVu5OVKuzoXMEWAt00pP1u3Ywz/sfgFf0zLQeCa3oXWmJ3AxKTQA?=\n\t=?utf-8?q?bU8SZKTrqu+tSqXbNWdvhcVvl6Ven66MNOI2lk8ED3dSMC8wXUOOwYyYscshtQCik?=\n\t=?utf-8?q?fut803TEDvox22m0kt0QKaRjcHvR3L38ff+z73qP51VWP881BafYdx7gpQfFRYhDw?=\n\t=?utf-8?q?lelgjudhy1lBqs8fQcTPgSFrtEw5LuPiQqb0C6ZmOwLbqrUrBrLMuTXDT26icg3Ww?=\n\t=?utf-8?q?6j5ndTOlstOPJmvn1mgMSQF5RB6jMTkjfnuCNHGHTXsk2cV7HgLvnT7TfcYU/eGHF?=\n\t=?utf-8?q?Mt5Vc1N2UuF8p8bE7T8avqRN326Rqe14KQYLY8Wm5xeQsiOqke9n4vDF4moRBhKd6?=\n\t=?utf-8?q?55Xcx5PlJ1njOqOaMxRIJG6oQvrzeYxIauVuu2HrpQXAuzeu7vzi7c9ZPxPnGJpfO?=\n\t=?utf-8?q?7ye9DBBVDGFNWlad1zs0FZN1eXp+aAgq6lohQV9aiZWSgWtUnAefY5TAQmqw2FjDk?=\n\t=?utf-8?q?Rt8L5jsDv5ZjLfshfsnmcAEeFR1I45LcIAqXHSE8McpIq8/ST98y7hkWwxXKVkPGJ?=\n\t=?utf-8?q?bCz3IOcejLWhI+eEcuRGEVVYCn4vbRAzv3FLuuStdh48/A+usq+NV+Hdcdyz1HftQ?=\n\t=?utf-8?q?dHGdGekNCljoCkvFYeit+cSVqAyEHO6CnEi5i3y5reAPV37+m68I4fO1DoX+SA6Su?=\n\t=?utf-8?q?n1WcLl2uwWv7DrLx7OunOrumAdCQWXUVXIX1J6Oqm4l5QsKQCx+AEzvlhKIIM5HhI?=\n\t=?utf-8?q?S/EUn2A+T88+gRfzoBtZkehzgySuMYWtu2vf/rl/zuslGmkFr9fpkN44I0mzTdvCk?=\n\t=?utf-8?q?Ve9NGKZqY+enFqTwk272sZRdDlT1asMKGcvAR3t+2nhEjZDgBnWJVVB5uz/axBJl1?=\n\t=?utf-8?q?2OphBi87ZN/chNv4r9R1s+GC4lYTUoOghQCmNjKKu+Ihd5wdCxW3dwFmaXGSHHIdt?=\n\t=?utf-8?q?Og2dWbrLs0oqqCq4XU/fzbii0NAruZhn3yozbbywkMMNtxHdjbYDQaVRssybfZWP/?=\n\t=?utf-8?q?mcbc43p4SAcDyaOOvmsoLDMX3zWDeRhO9LxueGglo4wky8HEy41o9fbhC+bfAceQ/?=\n\t=?utf-8?q?D9EBjzvWn0FSSjwqk+tj57cxTAPIBT6pbQ+wDaHZnVGS2iDcdGcp1k0V2ZI4h+rws?=\n\t=?utf-8?q?Oygh+dLEIa/2CZERh3ixLzZ3FCwtDRDZ2MTbzU2jheEZCPUlUHeq5XPh8psTKdBLG?=\n\t=?utf-8?q?jgZBzd7Ew7RJgKXCnYdaZ84M3NcJrWOlo53e/d3RxUeioDV7z7QdM95sCmxE8I1PH?=\n\t=?utf-8?q?YFgKTuTln+YJFSEtjJRlpGhvQZMhdslHhbsVy+Qe5eID5216y4ST/VKofjCuJQlzM?=\n\t=?utf-8?q?QS/CJA2GFHIsnYpgD1stu4rQAswKndxsKa5kOy9unRU94DuRv2RJ7fZqgzZdabrzy?=\n\t=?utf-8?q?GuynD4ECpaQmrgZWu/fZtPSYfFByrKl9l5UT6pCCtR3rOEoqZWdFexYA+8BhRdeq7?=\n\t=?utf-8?q?2/8EYnghXZt7JB41a/p5Wpv+G69/NpGCPvuqRTRkkHGVZWJ1/nfC9UhwdS3TQFJdJ?=\n\t=?utf-8?q?vYWYom5QrfGrxpwQt0rZcYrVDLBrYq9ckw=3D=3D?=", "X-OriginatorOrg": "corigine.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 1b7fc23c-c35b-4550-ef8a-08dbb5cc88d0", "X-MS-Exchange-CrossTenant-AuthSource": "SJ0PR13MB5545.namprd13.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "15 Sep 2023 09:17:07.9167 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "fe128f2c-073b-4c20-818e-7246a585940c", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n FyOKnK68qYLw6u97b/WN129CsA0ilrZQHLJ4D5nr+jBePyxWqlAOfJ8IGjBQM+IEYnDlUdKshVR6g+vi0esktbdL4pii6oAFd/WG5pOaDrQ=", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CO1PR13MB4773", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Sync the logic from kernel driver and remove the unneeded header\nfile include statements.\n\nSigned-off-by: Chaoyong He <chaoyong.he@corigine.com>\nReviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>\n---\n drivers/net/nfp/nfpcore/nfp6000_pcie.c | 211 +++++++++++++++++--------\n drivers/net/nfp/nfpcore/nfp_cpp.h | 9 ++\n 2 files changed, 150 insertions(+), 70 deletions(-)", "diff": "diff --git a/drivers/net/nfp/nfpcore/nfp6000_pcie.c b/drivers/net/nfp/nfpcore/nfp6000_pcie.c\nindex 45645e04f8..4f453f19a9 100644\n--- a/drivers/net/nfp/nfpcore/nfp6000_pcie.c\n+++ b/drivers/net/nfp/nfpcore/nfp6000_pcie.c\n@@ -16,23 +16,8 @@\n \n #include \"nfp6000_pcie.h\"\n \n-#include <assert.h>\n-#include <stdio.h>\n-#include <stdlib.h>\n #include <unistd.h>\n-#include <stdint.h>\n-#include <stdbool.h>\n #include <fcntl.h>\n-#include <string.h>\n-#include <errno.h>\n-#include <dirent.h>\n-#include <libgen.h>\n-\n-#include <sys/mman.h>\n-#include <sys/file.h>\n-#include <sys/stat.h>\n-\n-#include <ethdev_pci.h>\n \n #include \"nfp_cpp.h\"\n #include \"nfp_logs.h\"\n@@ -43,8 +28,11 @@\n #define NFP_PCIE_BAR(_pf) (0x30000 + ((_pf) & 7) * 0xc0)\n \n #define NFP_PCIE_BAR_PCIE2CPP_ACTION_BASEADDRESS(_x) (((_x) & 0x1f) << 16)\n+#define NFP_PCIE_BAR_PCIE2CPP_ACTION_BASEADDRESS_OF(_x) (((_x) >> 16) & 0x1f)\n #define NFP_PCIE_BAR_PCIE2CPP_BASEADDRESS(_x) (((_x) & 0xffff) << 0)\n+#define NFP_PCIE_BAR_PCIE2CPP_BASEADDRESS_OF(_x) (((_x) >> 0) & 0xffff)\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT(_x) (((_x) & 0x3) << 27)\n+#define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_OF(_x) (((_x) >> 27) & 0x3)\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_32BIT 0\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_64BIT 1\n #define NFP_PCIE_BAR_PCIE2CPP_LENGTHSELECT_0BYTE 3\n@@ -55,7 +43,9 @@\n #define NFP_PCIE_BAR_PCIE2CPP_MAPTYPE_TARGET 2\n #define NFP_PCIE_BAR_PCIE2CPP_MAPTYPE_GENERAL 3\n #define NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS(_x) (((_x) & 0xf) << 23)\n+#define NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS_OF(_x) (((_x) >> 23) & 0xf)\n #define NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS(_x) (((_x) & 0x3) << 21)\n+#define NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS_OF(_x) (((_x) >> 21) & 0x3)\n \n /*\n * Minimal size of the PCIe cfg memory we depend on being mapped,\n@@ -132,7 +122,7 @@ nfp_compute_bar(const struct nfp_bar *bar,\n \tuint32_t newcfg;\n \tuint32_t bitsize;\n \n-\tif (target >= 16)\n+\tif (target >= NFP_CPP_NUM_TARGETS)\n \t\treturn -EINVAL;\n \n \tswitch (width) {\n@@ -182,10 +172,6 @@ nfp_compute_bar(const struct nfp_bar *bar,\n \t\toffset &= mask;\n \t\tbitsize = 40 - 21;\n \t}\n-\n-\tif (bar->bitsize < bitsize)\n-\t\treturn -EINVAL;\n-\n \tnewcfg |= offset >> bitsize;\n \n \tif (bar_base != NULL)\n@@ -434,7 +420,7 @@ nfp6000_area_acquire(struct nfp_cpp_area *area)\n \n \t/* Must have been too big. Sub-allocate. */\n \tif (priv->bar->iomem == NULL)\n-\t\treturn (-ENOMEM);\n+\t\treturn -ENOMEM;\n \n \tpriv->iomem = priv->bar->iomem + priv->bar_offset;\n \n@@ -464,9 +450,9 @@ nfp6000_area_read(struct nfp_cpp_area *area,\n \t\tuint32_t offset,\n \t\tsize_t length)\n {\n+\tint ret;\n \tsize_t n;\n \tint width;\n-\tbool is_64;\n \tuint32_t *wrptr32 = address;\n \tuint64_t *wrptr64 = address;\n \tstruct nfp6000_area_priv *priv;\n@@ -484,47 +470,54 @@ nfp6000_area_read(struct nfp_cpp_area *area,\n \tif (width <= 0)\n \t\treturn -EINVAL;\n \n+\t/* MU reads via a PCIe2CPP BAR support 32bit (and other) lengths */\n+\tif (priv->target == (NFP_CPP_TARGET_MU & NFP_CPP_TARGET_ID_MASK) &&\n+\t\t\tpriv->action == NFP_CPP_ACTION_RW &&\n+\t\t\t(offset % sizeof(uint64_t) == 4 ||\n+\t\t\tlength % sizeof(uint64_t) == 4))\n+\t\twidth = TARGET_WIDTH_32;\n+\n \t/* Unaligned? Translate to an explicit access */\n \tif (((priv->offset + offset) & (width - 1)) != 0) {\n \t\tPMD_DRV_LOG(ERR, \"aread_read unaligned!!!\");\n \t\treturn -EINVAL;\n \t}\n \n-\tis_64 = width == TARGET_WIDTH_64;\n-\n-\t/* MU reads via a PCIe2CPP BAR supports 32bit (and other) lengths */\n-\tif (priv->target == (NFP_CPP_TARGET_ID_MASK & NFP_CPP_TARGET_MU) &&\n-\t\t\tpriv->action == NFP_CPP_ACTION_RW) {\n-\t\tis_64 = false;\n-\t}\n+\tif (priv->bar == NULL)\n+\t\treturn -EFAULT;\n \n-\tif (is_64) {\n-\t\tif (offset % sizeof(uint64_t) != 0 ||\n-\t\t\t\tlength % sizeof(uint64_t) != 0)\n-\t\t\treturn -EINVAL;\n-\t} else {\n+\tswitch (width) {\n+\tcase TARGET_WIDTH_32:\n \t\tif (offset % sizeof(uint32_t) != 0 ||\n \t\t\t\tlength % sizeof(uint32_t) != 0)\n \t\t\treturn -EINVAL;\n-\t}\n \n-\tif (priv->bar == NULL)\n-\t\treturn -EFAULT;\n+\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n+\t\t\t*wrptr32 = *rdptr32;\n+\t\t\twrptr32++;\n+\t\t\trdptr32++;\n+\t\t}\n+\n+\t\tret = n;\n+\t\tbreak;\n+\tcase TARGET_WIDTH_64:\n+\t\tif (offset % sizeof(uint64_t) != 0 ||\n+\t\t\t\tlength % sizeof(uint64_t) != 0)\n+\t\t\treturn -EINVAL;\n \n-\tif (is_64)\n \t\tfor (n = 0; n < length; n += sizeof(uint64_t)) {\n \t\t\t*wrptr64 = *rdptr64;\n \t\t\twrptr64++;\n \t\t\trdptr64++;\n \t\t}\n-\telse\n-\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n-\t\t\t*wrptr32 = *rdptr32;\n-\t\t\twrptr32++;\n-\t\t\trdptr32++;\n-\t\t}\n \n-\treturn n;\n+\t\tret = n;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn ret;\n }\n \n static int\n@@ -533,9 +526,9 @@ nfp6000_area_write(struct nfp_cpp_area *area,\n \t\tuint32_t offset,\n \t\tsize_t length)\n {\n+\tint ret;\n \tsize_t n;\n \tint width;\n-\tbool is_64;\n \tuint32_t *wrptr32;\n \tuint64_t *wrptr64;\n \tstruct nfp6000_area_priv *priv;\n@@ -553,47 +546,53 @@ nfp6000_area_write(struct nfp_cpp_area *area,\n \tif (width <= 0)\n \t\treturn -EINVAL;\n \n+\t/* MU reads via a PCIe2CPP BAR support 32bit (and other) lengths */\n+\tif (priv->target == (NFP_CPP_TARGET_MU & NFP_CPP_TARGET_ID_MASK) &&\n+\t\t\tpriv->action == NFP_CPP_ACTION_RW &&\n+\t\t\t(offset % sizeof(uint64_t) == 4 ||\n+\t\t\tlength % sizeof(uint64_t) == 4))\n+\t\twidth = TARGET_WIDTH_32;\n+\n \t/* Unaligned? Translate to an explicit access */\n \tif (((priv->offset + offset) & (width - 1)) != 0)\n \t\treturn -EINVAL;\n \n-\tis_64 = width == TARGET_WIDTH_64;\n-\n-\t/* MU writes via a PCIe2CPP BAR supports 32bit (and other) lengths */\n-\tif (priv->target == (NFP_CPP_TARGET_ID_MASK & NFP_CPP_TARGET_MU) &&\n-\t\t\tpriv->action == NFP_CPP_ACTION_RW)\n-\t\tis_64 = false;\n+\tif (priv->bar == NULL)\n+\t\treturn -EFAULT;\n \n-\tif (is_64) {\n-\t\tif (offset % sizeof(uint64_t) != 0 ||\n-\t\t\t\tlength % sizeof(uint64_t) != 0)\n-\t\t\treturn -EINVAL;\n-\t} else {\n+\tswitch (width) {\n+\tcase TARGET_WIDTH_32:\n \t\tif (offset % sizeof(uint32_t) != 0 ||\n \t\t\t\tlength % sizeof(uint32_t) != 0)\n \t\t\treturn -EINVAL;\n-\t}\n \n-\tif (priv->bar == NULL)\n-\t\treturn -EFAULT;\n+\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n+\t\t\t*wrptr32 = *rdptr32;\n+\t\t\twrptr32++;\n+\t\t\trdptr32++;\n+\t\t}\n+\n+\t\tret = n;\n+\t\tbreak;\n+\tcase TARGET_WIDTH_64:\n+\t\tif (offset % sizeof(uint64_t) != 0 ||\n+\t\t\t\tlength % sizeof(uint64_t) != 0)\n+\t\t\treturn -EINVAL;\n \n-\tif (is_64)\n \t\tfor (n = 0; n < length; n += sizeof(uint64_t)) {\n \t\t\t*wrptr64 = *rdptr64;\n \t\t\twrptr64++;\n \t\t\trdptr64++;\n \t\t}\n-\telse\n-\t\tfor (n = 0; n < length; n += sizeof(uint32_t)) {\n-\t\t\t*wrptr32 = *rdptr32;\n-\t\t\twrptr32++;\n-\t\t\trdptr32++;\n-\t\t}\n \n-\treturn n;\n-}\n+\t\tret = n;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n \n-#define PCI_DEVICES \"/sys/bus/pci/devices\"\n+\treturn ret;\n+}\n \n static int\n nfp_acquire_process_lock(struct nfp_pcie_user *desc)\n@@ -706,6 +705,74 @@ nfp6000_set_serial(struct rte_pci_device *dev,\n \treturn 0;\n }\n \n+static int\n+nfp6000_get_dsn(struct rte_pci_device *pci_dev,\n+\t\tuint64_t *dsn)\n+{\n+\toff_t pos;\n+\tsize_t len;\n+\tuint64_t tmp = 0;\n+\n+\tpos = rte_pci_find_ext_capability(pci_dev, RTE_PCI_EXT_CAP_ID_DSN);\n+\tif (pos <= 0) {\n+\t\tPMD_DRV_LOG(ERR, \"PCI_EXT_CAP_ID_DSN not found\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tpos += 4;\n+\tlen = sizeof(tmp);\n+\n+\tif (rte_pci_read_config(pci_dev, &tmp, len, pos) < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"nfp get device serial number failed\");\n+\t\treturn -ENOENT;\n+\t}\n+\n+\t*dsn = tmp;\n+\n+\treturn 0;\n+}\n+\n+static int\n+nfp6000_get_interface(struct rte_pci_device *dev,\n+\t\tuint16_t *interface)\n+{\n+\tint ret;\n+\tuint64_t dsn = 0;\n+\n+\tret = nfp6000_get_dsn(dev, &dsn);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\t*interface = dsn & 0xffff;\n+\n+\treturn 0;\n+}\n+\n+static int\n+nfp6000_get_serial(struct rte_pci_device *dev,\n+\t\tuint8_t *serial,\n+\t\tsize_t length)\n+{\n+\tint ret;\n+\tuint64_t dsn = 0;\n+\n+\tif (length < NFP_SERIAL_LEN)\n+\t\treturn -ENOMEM;\n+\n+\tret = nfp6000_get_dsn(dev, &dsn);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\tserial[0] = (dsn >> 56) & 0xff;\n+\tserial[1] = (dsn >> 48) & 0xff;\n+\tserial[2] = (dsn >> 40) & 0xff;\n+\tserial[3] = (dsn >> 32) & 0xff;\n+\tserial[4] = (dsn >> 24) & 0xff;\n+\tserial[5] = (dsn >> 16) & 0xff;\n+\n+\treturn 0;\n+}\n+\n static int\n nfp6000_set_barsz(struct rte_pci_device *dev,\n \t\tstruct nfp_pcie_user *desc)\n@@ -789,6 +856,10 @@ static const struct nfp_cpp_operations nfp6000_pcie_ops = {\n \t.free = nfp6000_free,\n \n \t.area_priv_size = sizeof(struct nfp6000_area_priv),\n+\n+\t.get_interface = nfp6000_get_interface,\n+\t.get_serial = nfp6000_get_serial,\n+\n \t.area_init = nfp6000_area_init,\n \t.area_acquire = nfp6000_area_acquire,\n \t.area_release = nfp6000_area_release,\ndiff --git a/drivers/net/nfp/nfpcore/nfp_cpp.h b/drivers/net/nfp/nfpcore/nfp_cpp.h\nindex 34ed50ceca..0f36ba0b50 100644\n--- a/drivers/net/nfp/nfpcore/nfp_cpp.h\n+++ b/drivers/net/nfp/nfpcore/nfp_cpp.h\n@@ -16,6 +16,8 @@ struct nfp_cpp_area;\n \n #define NFP_SERIAL_LEN 6\n \n+#define NFP_CPP_NUM_TARGETS 16\n+\n /*\n * NFP CPP operations structure\n */\n@@ -33,6 +35,13 @@ struct nfp_cpp_operations {\n \t */\n \tvoid (*free)(struct nfp_cpp *cpp);\n \n+\tint (*get_interface)(struct rte_pci_device *dev,\n+\t\t\tuint16_t *interface);\n+\n+\tint (*get_serial)(struct rte_pci_device *dev,\n+\t\t\tuint8_t *serial,\n+\t\t\tsize_t length);\n+\n \t/*\n \t * Initialize a new NFP CPP area\n \t * NOTE: This is _not_ serialized\n", "prefixes": [ "v3", "25/27" ] }